JPH0448390A - Simulating method for logic circuit - Google Patents

Abstract

PURPOSE:To efficiently perform the simulation of a combination circuit by generating a second pointer on a first table, and changing a first address held with a first pointer to a second address. CONSTITUTION:When change occur in the plural digits of an input patterns, the first table on the first address in which the input pattern just before generating the change is retrieved by the instruction of an indication pointer 4, and it is decided whether or not the link pointers 6 of all the plural digits where input change occur exist. When the link pointers 6 exist in all the digits, the link pointer 6 is traced digit by digit, and the output pattern 3 of the table of the final link destination is read, and a result is outputted. Thereby, the simulation of the combination circuit can be efficiently performed even when the same input pattern is inputted, and also, a simulating method for a logic circuit with small capacity of required memory can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a simulation method for simulating the operation of a logic circuit when designing the logic circuit.

[Prior art] Generally, the event method used in logic simulations is a method in which logic operations are performed only on elements where the input signal has changed, and the simulation is performed while propagating the results to the next element for output light. Tell me how to do it.

FIG. 3 is an example of processing of a logic simulator using the conventional event method as described above. Figure nioi T, (13)
(tANT) element, (14) HN OT element, (15
) is an OR element, (16) is a NAND element, (17) is a logical connection II connecting these logic elements, and (2) is an input signal.

(3) is the output signal.

Next, the operation of this device will be explained. It is assumed that "1" is given to all input signals (2) at a certain time. This signal value string is called an input pattern, and in this case is "1111". At the next time, the OR element (1
5) When there is a signal change (event) of "1" or "0" in the input signal, the logic simulator changes the OR element (15)
performs the logical operation and sets "1" to the output light of the OR element (15).
Next, the NAND element (1
6) is performed, and a signal change of ro J = 5r 1 j is propagated to the output signal (3) as an output pattern.

In this way, a simulation is performed to examine changes in the output pattern by sequentially changing the input pattern.

As mentioned above, a circuit in which the output turn is uniquely determined when the input pattern is determined is called a combinational circuit. Further, a circuit whose current output depends not only on the current input value but also on the history of past input values is called a sequential circuit. It is common for general logic circuits to contain a mixture of these combinational circuits and sequential circuits.

[Problems to be Solved by the Invention] Since the conventional logic circuit simulation method is configured as described above, 1. For example, when a combinational circuit is connected to a sequential circuit, 3 combinational circuits have the same input pattern. Even so, logical operations had to be performed each time an output of a sequential circuit occurred.

This invention was made to solve the above problems, and even when the same input pattern is input, two
The purpose of this invention is to obtain a logic circuit simulation method that can efficiently simulate combinational circuits.

[Means for solving the problem] A logic circuit simulation method according to the present invention includes:
In a combinational circuit of logic circuits whose output pattern is uniquely determined by a pattern consisting of multiple bits, when a 1-bit change occurs in the input pattern, the first signal at the first address indicated by the first pointer is The step of searching the table is to insert a second pointer on the first table that points to a second table in which the changed input pattern and the output pattern when a logical operation is performed using this input pattern are stored in advance. a step of searching; a step of performing a logical operation only on each element of the combinational circuit to which the change propagates due to a change in the input pattern if the second pointer is not found in this step;
a step of creating the second table at a second address based on the result of the logical operation in this step and generating the second pointer on the first table; The first address is changed to the second address.

[Operation] The table in this invention stores the input pattern and the output pattern when a logical operation is performed using this input pattern each time a new human cover turn occurs, so only the patterns necessary for the simulation at that time are stored. will be stored.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described based on the drawings. FIG. 1 is a block diagram showing the signal flow when the present invention is used to simulate the logic circuit shown in FIG. 3. In FIG. 2, (1) is a table.

It consists of an input pattern (2) and an output pattern (3) when a logical operation is performed using this input pattern (2). (4) is an instruction pointer that is a first pointer that indicates input pattern (2) immediately before input pattern (2) changes. Each input pattern (2) is a signal value (5) and an input pattern (2) when this signal value (5) changes.
and a contact pointer (6), which is a second pointer pointing to a second table storing the information. In FIG. 1, a black circle in the digit where the contact pointer (6) is stored indicates that a contact pointer exists, and a white circle indicates that there is no contact pointer.

Next, the operation of this device will be explained. Figure 2 is a flowchart showing the flow of operations.
This will be explained based on the diagram. When a change occurs in multiple digits of the input line (step 7), the first table at the first address stores the input pattern immediately before the change occurs according to the instruction of the instruction pointer (4). 9, and it is determined whether there is a contact pointer (6) for multiple commands in which a change in human power has occurred (step 8). If all the contact pointers (6) exist, trace the contact pointers (6) one digit at a time, read the output pattern (3) of the final contact table, and output the result (step 9). 6), perform the simulation using the event method (step 10), trace the existing contact pointer (6), invert the rlJJOJ of the digit where the contact pointer (6) does not exist in the final contact table, and output it. Creates a new table that stores the pattern and outputs the result, as well as a contact pointer to that table (
6) is generated (Step II).

Thereafter, the first address of the instruction pointer is changed to the address where the final contact table is stored, and the operation ends (step 12). Figure 1 shows the state where the simulation of the logic circuit in Figure 3 has been completed, and the input pattern (2) just before it changes is the first table from the top, and the fourth digit rN changes to "0". To obtain the output pattern (3) when
You can get J. Note that at this time, the instruction pointer (4) is.

It indicates the address of the second table from the top, which is the final contact point.

In the above embodiment, an example of a combinational circuit with four human power and one output was shown, but this is not the case if it is a nine combinational circuit.

[Effects of the Invention] As described above, according to the present invention, each time a new input pattern is generated, this input pattern and the output pattern when a logical operation is performed using this input pattern are stored. , even when the same input pattern is input, it is possible to efficiently simulate a two-combination circuit, and there is an effect that a logic circuit simulation method that requires less memory can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the signal flow of a logic circuit simulation method according to an embodiment of the present invention, and FIG. 2 is a flowchart showing its operation. FIG. In the figure, (1) is a table, (2) is an input pattern, (3) is an output pattern, (4) is an instruction pointer (first pointer), (5) is a signal value, and (6) is a contact pointer (first pointer). 2 pointer). In addition, in FIG. 1, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] In a combinational circuit of logic circuits where an output pattern is uniquely determined by an input pattern consisting of multiple bits, when a 1-bit change occurs in the input pattern, the first pointer at the first address pointed to by the first pointer The step of searching the table is to insert a second pointer on the first table that points to a second table that stores in advance the changed input pattern and the output pattern when a logical operation is performed using this input pattern. a step of searching; a step of performing a logical operation only on each element of the combinational circuit to which the change propagates due to a change in the input pattern if the second pointer is not found in this step;
a step of creating the second table at a second address based on the result of the logical operation in this step and generating the second pointer on the first table; A logic circuit simulation method comprising the step of changing one address to the second address.