JPH0446453B2 - - Google Patents
Info
- Publication number
- JPH0446453B2 JPH0446453B2 JP60173020A JP17302085A JPH0446453B2 JP H0446453 B2 JPH0446453 B2 JP H0446453B2 JP 60173020 A JP60173020 A JP 60173020A JP 17302085 A JP17302085 A JP 17302085A JP H0446453 B2 JPH0446453 B2 JP H0446453B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- presser
- chip
- frame
- heat block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68778—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting substrates others than wafers, e.g. chips
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
 
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP60173020A JPS6233432A (ja) | 1985-08-06 | 1985-08-06 | リ−ドフレ−ム押圧器 | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP60173020A JPS6233432A (ja) | 1985-08-06 | 1985-08-06 | リ−ドフレ−ム押圧器 | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPS6233432A JPS6233432A (ja) | 1987-02-13 | 
| JPH0446453B2 true JPH0446453B2 (OSRAM) | 1992-07-30 | 
Family
ID=15952717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP60173020A Granted JPS6233432A (ja) | 1985-08-06 | 1985-08-06 | リ−ドフレ−ム押圧器 | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPS6233432A (OSRAM) | 
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPH03233947A (ja) * | 1990-02-09 | 1991-10-17 | Fujitsu Ltd | リードフレームインナーリード押え治具 | 
| KR20020069885A (ko) * | 2001-02-28 | 2002-09-05 | 앰코 테크놀로지 코리아 주식회사 | 반도체패키지용 클램프 | 
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPS595976Y2 (ja) * | 1975-12-26 | 1984-02-23 | 株式会社新川製作所 | リ−ドフレ−ムオサエソウチ | 
| JPS60113438A (ja) * | 1983-11-24 | 1985-06-19 | Nec Corp | ベ−スリボン保持機構 | 
- 
        1985
        - 1985-08-06 JP JP60173020A patent/JPS6233432A/ja active Granted
 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPS6233432A (ja) | 1987-02-13 | 
Similar Documents
| Publication | Publication Date | Title | 
|---|---|---|
| JPH0446453B2 (OSRAM) | ||
| JPH03228339A (ja) | ボンディングツール | |
| JPS61163602A (ja) | 電子部品の製造方法 | |
| JP2731584B2 (ja) | リードフレーム及びこれを用いた電子部品パッケージの製造方法 | |
| JP2897086B2 (ja) | 電子部品へのリード線の位置決め固定方法 | |
| JPH0635382Y2 (ja) | 混成集積回路のリード端子取付構造 | |
| JPH0442934Y2 (OSRAM) | ||
| JPS63278264A (ja) | Mosfetモジユ−ル | |
| JP3029023B2 (ja) | ボンディングツール | |
| JP3293757B2 (ja) | 半導体装置製造用リードフレーム組立体の製造方法 | |
| JPH04324948A (ja) | ボンディング方法 | |
| JPS61287212A (ja) | 電子部品用リ−ドフレ−ム | |
| KR20030001328A (ko) | 높은 품질과 높은 생산성으로 tab테이프들의내부리드들을 전극패드들에 접합할 수 있는 접합도구와접합방법 | |
| JPH03233947A (ja) | リードフレームインナーリード押え治具 | |
| JPS63240055A (ja) | 半導体装置 | |
| JPH036034A (ja) | ワイヤボンディング装置 | |
| JPS61255043A (ja) | 電子部品装置 | |
| JPS6351648A (ja) | 半導体装置の製造方法 | |
| JPH0384941A (ja) | 半導体装置の製造方法 | |
| JPH0294646A (ja) | ボンディング用ツール | |
| JPS5896742A (ja) | 半導体素子の接続方法 | |
| JPS6339457A (ja) | リニアステッピングモータの製造方法 | |
| JPS6218057A (ja) | リ−ドフレ−ム加工方法 | |
| JPH0543294B2 (OSRAM) | ||
| JPH0287641A (ja) | 半導体集積回路 |