JPH0445400U - - Google Patents

Info

Publication number
JPH0445400U
JPH0445400U JP8830990U JP8830990U JPH0445400U JP H0445400 U JPH0445400 U JP H0445400U JP 8830990 U JP8830990 U JP 8830990U JP 8830990 U JP8830990 U JP 8830990U JP H0445400 U JPH0445400 U JP H0445400U
Authority
JP
Japan
Prior art keywords
transfer gate
memory device
semiconductor integrated
signal line
integrated memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8830990U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8830990U priority Critical patent/JPH0445400U/ja
Publication of JPH0445400U publication Critical patent/JPH0445400U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)
JP8830990U 1990-08-23 1990-08-23 Pending JPH0445400U (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8830990U JPH0445400U (ko) 1990-08-23 1990-08-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8830990U JPH0445400U (ko) 1990-08-23 1990-08-23

Publications (1)

Publication Number Publication Date
JPH0445400U true JPH0445400U (ko) 1992-04-17

Family

ID=31821441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8830990U Pending JPH0445400U (ko) 1990-08-23 1990-08-23

Country Status (1)

Country Link
JP (1) JPH0445400U (ko)

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