JPH0443286B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a reactive power compensator for a power system using a thyristor phase control reactor formed by connecting a reactor and a bidirectional thyristor in series.

[Technical background of the invention and its problems]

When performing reactive power compensation in a power system, conventionally a thyristor phase control reactor, which is made by connecting a reactor and a bidirectional thyristor in series, is used as a voltage standard that allows the voltage reference value to follow the slow voltage fluctuations of the power system. A value variable method (hereinafter referred to as Vref variable method) is used. This Vref variable method will be explained using FIGS. 1 and 2.

FIG. 1 shows a circuit diagram of a conventional variable Vref type thyristor phase control reactor, in which a power supply system S and a load power system L are connected via a bus 1. In FIG. A thyristor phase control reactor 3 and a capacitance 8, in which antiparallel thyristors 5 and 6 and a reactor 4 are connected in series, are connected to the bus bar 1 via circuit breakers 2 and 7, respectively. The bus 1 is provided with a control device 10 that controls the thyristor phase control reactor 3 based on the voltage detected from the voltage transformer 9. This control device 10 is constructed by connecting two adders 11 and 13, a constant voltage control circuit 15, a phase control circuit 16, and a gate control circuit 17 in series on the secondary side of a voltage transformer 9. . The output of this gate control circuit 17 is input to the gate terminals of the thyristors 5 and 6 of the thyristor phase control reactor. In addition, the output of the voltage transformer 9 is introduced into a first-order lag circuit 12, and the output of this first-order lag circuit 12 is set as a voltage reference value Vref.
Adder 1 subtracts this voltage reference value Vref.
Add to 1. On the other hand, the bias value from the bias setting circuit 14 is added to the adder 13 .

Next, the operation of the conventional variable Vref type thyristor phase control circuit shown in FIG. 1 will be explained.

The system voltage value detected by voltage transformer 9 is input to adder 11 and first-order lag circuit 12 . The output voltage value of this first-order lag circuit 12 is set as the voltage reference value.
Vref, and input it to the adder 11 so as to subtract this voltage reference value Vref. The adder 13 adds the bias value of the bias setting circuit 14 to the input from the adder 11. With this added voltage deviation as input, the constant voltage control circuit 15 operates to determine the current passing through the reactor 4 required to maintain the power system voltage at the voltage reference value Vref, and the phase control circuit 16
The firing phase of the thyristors 5 and 6 is calculated by . Based on this calculated value, a firing pulse is issued from the gate control circuit 17 to the thyristors 5 and 6 to operate the thyristors 5 and 6, and a necessary amount of current flows through the reactor 4. That is, the reactive power of the power system will be controlled, and therefore the voltage of the power system will also be controlled. The first-order delay circuit 12 responds to slow voltage fluctuations in the power system and provides a variable voltage reference value Vref.

By the way, the characteristics of the thyristor phase control reactor will be explained with reference to FIG. In the same figure, if the horizontal axis represents the reactor passing current i or reactive power, and the vertical axis represents the voltage v (unit: PU) on the circuit breaker side of the reactor, then the voltage on the vertical axis matches the voltage of the power system. , when this voltage is 1PU, it is a straight line
The characteristic is shown by L ₁ . Point B ₁ on the straight line L ₁ is created by the bias value from the bias setting circuit 14 in FIG. 1, and the bias value is adjusted so that 1 PU is obtained at point B ₁ . Centering on this point B ₁ ,
It operates along straight line _L1 and supplies or absorbs delayed reactive power to suppress or increase the voltage of the power system.

Now, the voltage of the power system is slowly rising, and the first
Assume that the first-order lag circuit 12 shown in the figure follows and reaches the voltage reference value Vref of 1 PU or more. This is the straight line L ₂
corresponds to At this time, in order to suppress overvoltage on the power grid side, the range in which delayed reactive power can be supplied is as follows:
In terms of the current passing through the reactor, the point on the straight line L ₂
This is the current in the range corresponding to point B ₂ to point X ₂ . Here, if the voltage reference value Vref does not follow the slow voltage rise of the power grid, even if the grid voltage becomes (1+α) PU, the characteristics of the thyristor phase control reactor will remain on the straight line _L1 . It is. Therefore, the operation at that time will be centered around point A on straight line _L1 , and the range in which delayed reactive power can be supplied to suppress overvoltage on the power grid side is point A on straight line _L1 . The range is only from to point X ₁ . That is, by using the Vref variable method, when the voltage of the power system exceeds 1 PU, the margin for overvoltage suppression can be increased.

On the other hand, assume that a slow voltage drop occurs on the power grid side and the voltage reference value becomes (1-α)PU using the Vref variable method. The characteristic of the thyristor phase control reactor at this time is a straight line L ₃ ,
The delayed reactive power supply range is from point B ₃ to point X ₃ on straight line L ₃ . Moreover, even though the voltage on the power grid side is decreasing, the bias setting circuit 14
As a result, delayed reactive power corresponding to point _B3 is supplied. In other words, unnecessary delayed reactive power is supplied. In such a case, if the load's power grid is cut off,
For example, assuming that the power system for the load is a DC transmission system consisting of a conversion transformer and an AC/DC converter, and if this DC transmission system performs load shedding for some reason, the capacitor 8 having a filter configuration is connected to the busbar. 1, which causes an increase in the bus voltage. When the bus voltage increases, the amount of delayed reactive power supplied by the thyristor phase control reactor increases, but the maximum increase range is from point B ₃ to point X ₃ on straight line L ₃ . There is a problem in that the capacitance of the thyristor phase control reactor cannot be utilized to the maximum extent for suppressing overvoltage.

[Purpose of the invention]

This invention has been made in view of the above points of the present invention, and its purpose is to avoid unnecessary delayed reactive power supply when the slow voltage fluctuation on the power grid side becomes 1 PU or less in the Vref variable system. It is an object of the present invention to provide a reactive power compensator for a power system, which avoids the occurrence of overvoltage on the power system side and is more effective against the occurrence of overvoltage on the power system side.

[Summary of the invention]

In order to achieve the above object, the present invention connects a thyristor phase control reactor formed by connecting a reactor and a bidirectional thyristor in series to a power system, and a voltage transformer for detecting the voltage of the power system, and connects the voltage transformer to the power system. The output of the thyristor phase control reactor is introduced into a first-order lag circuit, and the energizing current of the thyristor phase control reactor is controlled so that the difference between the output of the voltage transformer and the output of the first-order lag circuit becomes zero. In a reactive power compensator for a power system, a voltage setting device and a high value selection circuit are provided, the output of the voltage setting device and the output of the first-order lag circuit are introduced into the high value selection circuit, and the output of the high value selection circuit is The energizing current of the thyristor phase control reactor is controlled so that the difference between the output of the thyristor phase control reactor and the output of the voltage transformer becomes zero.

[Embodiments of the invention]

An embodiment of the present invention will be described with reference to the drawings.
FIG. 3 shows a circuit diagram of a reactive power compensator for a power system according to the present invention, and the same parts as in FIG. 1 are given the same reference numerals for explanation. A power supply system S and a load power system L are connected through a bus 1, and a thyristor phase control reactor 3 and a capacitor 8 are connected to the bus 1. They are connected via circuit breakers 2 and 7, respectively. The bus 1 is provided with a control device 20 that controls the thyristor phase control reactor 3 based on the voltage detected from the voltage transformer 9. This control device 20 includes two adders 1 on the secondary side of the voltage transformer 9.
1, 13 constant voltage control circuit 15, phase control circuit 16
and a gate control circuit 17 are connected in series, and one adder 11 selects the high value of the output of the voltage transformer 9 that has passed through the first-order lag circuit 12 and the voltage reference value set by the voltage reference value setting device 19. The other adder 13 is configured to add the input from the adder 11 to the bias value set by the bias setting circuit 14. The output of the adder 13 is input to the phase control circuit 16 via the constant voltage control circuit 15, and the phase control circuit 16 controls the thyristors 5 and 6.
The firing phase of the thyristor phase control reactor 3 is calculated and the thyristors 5 and 6 of the thyristor phase control reactor 3 are controlled through the gate control circuit 17, thereby controlling the current flowing through the reactor 4. Note that the reference value set by the voltage reference value setter 19 is the rated voltage (1PU) of the power system.

Next, the operation of the reactive power compensator according to the present invention will be explained.

Currently, slow voltage fluctuations on the power grid side are causing
If it exceeds 1PU, the output of the first-order lag circuit 12
Vref exceeds 1PU. Therefore, high value selection circuit 1
8 selects the output Vref of the first-order lag circuit 12,
The voltage reference value is set to a value (1+α) PU that exceeds 1 PU, and the characteristic diagram in Figure 2 shifts from straight line L ₁ to straight line L ₂ , and delayed reactive power is supplied to suppress overvoltage on the power grid side. As before, it functions to expand the possible range to the range of point B ₂ and point X ₂ .

On the other hand, when the slow voltage fluctuation on the power system side is 1 PU or less, the output Vref of the first-order lag circuit 12 becomes (1-α) PU, which is 1 PU or less. Therefore, in the high value selection circuit 18, the voltage reference setter 19
1PU set by is selected. Then, in the characteristic diagram of Fig. 2, from straight line L ₁ to straight line L ₃
The straight line L ₁ will be maintained as it is without shifting to
The range is from point C on _L1 to point _X1 , which is larger than the range from point _B3 to point _X3 when moving to straight line _L3 . In other words, the effect of suppressing overvoltage that suddenly occurs when the voltage of the power system slowly drops is greater than that of the conventional variable Vref system.

FIG. 4 shows another embodiment of the present invention, and the same parts as in the previous embodiment are given the same reference numerals and will be described.

Power supply system S and load power system L via bus 1
A thyristor phase control reactor 3, in which a reactor 4 is connected in series to antiparallel thyristors 5 and 6, and a capacitor 8 are connected to the bus 1 via circuit breakers 2 and 7, respectively. ing. This bus 1 has a voltage transformer 9
A control device 21 is provided to control the thyristor phase control reactor 3 based on the voltage detected from the voltage transformer 9, and this control device 21 has two adders 11 and 13 on the secondary side of the voltage transformer 9. A constant voltage control circuit 15, a phase control circuit 16, and a gate control circuit 17 are connected in series, and one adder 11 includes a voltage transformer 9 that passes through a first-order lag circuit 12.
and the voltage reference value set by the voltage reference value setter 19 are added so as to decrease through the high value selection circuit 18, and the other adder 13 has an adder 11
The output of the bias setting circuit 22 is added to the bias value set by the bias setting circuit 22. This bias setting circuit 22 is configured to give the output of the first-order lag circuit 12, and this output is 1PU
If this is the case, a bias value corresponding to point B ₁ or point B ₂ in FIG. 2 is given to the adder 13. Also, 1
If the output of the next delay circuit 12 is less than 1 PU, the bias value given to the adder 13 is set to 0.

Next, to explain its effect, if the slow voltage change in the power system becomes 1 PU or more,
The output of the first-order lag circuit 12 exceeds 1 PU. Therefore, the high value selection circuit 18 selects the output of the first-order lag circuit 12, and the voltage reference value exceeds 1PU (1PU).
+α) When set to PU, the characteristic diagram in Figure 2 shifts from straight line L ₁ to straight line L ₂ , and the point is the range where delayed reactive power can be supplied to suppress overvoltage on the power grid side.
The range extends from B ₂ to point X ₂ and spreads out in the same manner as in the previous embodiment.

On the other hand, slow voltage changes in the power system
If it becomes less than 1 PU, the output of the first-order delay circuit 12 will also be less than 1 PU, and the bias value given to the adder 13 will be 0, so the thyristor phase control reactor 3 is on standby at point Y ₁ in Fig. 2. It turns out. In other words, when the voltage of the power system is decreasing, unnecessary delayed reactive power is not supplied, and in the event of an overvoltage, a state is maintained in which the maximum delayed reactive power can be supplied. Expressing this in terms of reactor passing current, the second
This means that it can be supplied over a wide range from point Y ₁ to point X ₁ in the figure.

In addition, in the description of each of the above embodiments, the value set by the voltage standard setting device is the rated voltage value of the power system.
Although 1PU is used, it is needless to say that this setting value does not need to be limited to 1PU and can be freely selected according to the characteristics of the power system.

〔Effect of the invention〕

According to the present invention, it is possible to increase the effect of suppressing overvoltage that suddenly occurs when the voltage of the power system gradually decreases. Furthermore, it is possible to reduce unnecessary reactive power supply when the power system voltage drops, and to reduce loss in the thyristor phase control reactor.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a conventional variable Vref type thyristor phase control reactor, Fig. 2 is a characteristic diagram of the thyristor phase control reactor, and Figs. 3 and 4 are circuit diagrams of different embodiments of the present invention. . S...Power system, L...Load power system, 1...
... bus bar, 2, 7 ... circuit breaker, 3 ... thyristor phase control reactor, 8 ... capacitor, 9 ... voltage transformer, 10, 20, 21 ... control device, 1
1, 13... Adder, 12... First-order delay circuit, 1
4, 22... Bias value setting circuit, 15... Constant voltage control circuit, 16... Phase control circuit, 17... Gate control circuit, 18... High value selection circuit, 19...
Voltage reference value setter.

Claims (1)

[Claims] 1. A thyristor phase control reactor formed by directly connecting a reactor and a bidirectional thyristor, and a voltage transformer for detecting the voltage of the power system are connected to the power system, and the output of the voltage transformer is introduced into a first-order lag circuit. , and a reactive power compensator for a power system that controls the current flowing through the thyristor phase control reactor so that the difference between the output of the voltage transformer and the output of the first-order lag circuit becomes zero, the voltage setting an output of the voltage setting device and an output of the first-order lag circuit are introduced into the high value selection circuit, and a difference between the output of the high value selection circuit and the output of the voltage transformer is provided. A reactive power compensator for a power system, characterized in that the energizing current of the thyristor phase control reactor is controlled so that the current becomes zero.