JPH04346460A - Multilayer interconnection forming method - Google Patents

Abstract

PURPOSE:To lessen capacity both between a first wiring and a second wiring and between second wiring layers without increasing processes in number by a method wherein an insulating film is formed only on tone intersection of the first and the second wiring, and the first and the second wiring are formed with air bridges. CONSTITUTION:A first wiring layer 2 and an insulating film 3 are formed on a semiconductor substrate 1, a laminar metal is deposited to serve as the intersection of the first and the second wiring, and a patterning process is carried out so as to leave a resist 5 in a required region. Then, a metal wiring 4 is processed using the resist 5 as a mask, and the resist 5 is removed. In succession, a resist 6 is applied, and an opening 6a is provided to a region where the second wiring is made to serve as a metal wiring 4. Next, a plating feeding layer 7 is deposited, and an opening 8a is provided to a region which serves as the second and the third wiring. In succession, metal is made to grow to form air-bridge wirings 9 as the second and the third wiring, whereby the second and the third wiring can be formed in an air-bridge structure excluding an intersection where they intersect each other.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a multilayer wiring having an air bridge structure in a semiconductor device.

0002

2. Description of the Related Art FIGS. 3 and 4 are process cross-sectional views showing a conventional method for forming multilayer wiring having an air bridge structure. In the figure, 1 is a semiconductor substrate on which FETs etc. are formed in advance, 2 is a first layer wiring formed on the substrate 1, 3 is an insulating film, 4 is a second layer wiring, and 5 is a second layer wiring formed on the insulating film 3. A resist (A) is used as a masking material when processing the layer wiring 4, 6 is a resist (B) for separating it from the lower layer when forming an air bridge, 7 is a plating power supply layer, and 8 is a masking material when forming the third layer wiring. The resist (C) 9 is the third layer wiring formed by plating.

Next, the operation will be explained. After forming a first layer wiring 2 and an insulating film 3 on a semiconductor substrate 1 on which elements such as FETs have been formed in advance, a layered metal of Ti/Au is formed on the entire surface of the insulating film 3 by sputtering or the like. A second layer wiring 4 is deposited, and then a resist (A) 5 is patterned in a desired area of the second wiring 4 as shown in FIG. 3(a). Next, the second layer wiring 4 is patterned by ion milling using the resist (A) 5 as a masking material, and then the resist (A) 5 is removed (
Figure 3(b)).

Next, a resist (B) 6 is applied on the second layer wiring 4 and the insulating film 3 formed above, and then a plated power supply layer 7 of Ti/Au or the like is deposited on the top surface of the resist (B). The resist (C) 8 is patterned to form an opening 8a in a desired area to form a pattern as shown in FIG. 3(c). Next, Au or the like is grown in the opening 8a of the resist (C) 8 by electrolytic plating or the like.
Third layer wiring 9 is formed as shown in FIG. 4(a). Next, after removing the resist (C), the plating power supply layer 7 is removed by ion milling or the like, and the resist (B) 6 is further removed to form a pattern as shown in FIG. 4(b).

[0005]

[Problems to be Solved by the Invention] Since the conventional method for forming multilayer wiring using an air bridge is configured as described above, it is difficult to form connections between third layer wiring and second layer wiring and between third layer wiring. Although the capacity can be reduced by the effect of air bridge,
There was a problem that the capacitance between the first layer wiring and the second layer wiring could not be reduced.

The present invention was made in order to solve the above-mentioned problems, and in forming multilayer wiring with an air bridge structure, it is possible to easily connect the first layer wiring and the second layer wiring without increasing the number of manufacturing steps. The purpose of this is to reduce the capacitance, the capacitance between the second layer wirings, etc.

[0007]

[Means for Solving the Problems] A method for forming multilayer wiring using an air bridge according to the present invention provides a method for forming a multilayer wiring using an air bridge.
Only the intersecting portions of the layer wiring are formed on the insulating film, and then the second layer wiring and the third layer wiring are simultaneously formed using an air bridge.

[0008]

[Operation] The method for forming multilayer wiring in this invention is as follows.
All of the layer wiring other than the intersection with the third layer wiring can be formed as an air bridge structure, and at the same time, the third layer wiring is also formed as an air bridge, so the wiring capacitance can be reduced without increasing the manufacturing process. This is possible.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. Figures 1(a) to (c) and Figures 2(a) to (d)
) is a process sectional view showing an embodiment of the present invention, in which 1 to 3 indicate the same parts as FIGS. 3 and 4,
4 is a metal wiring formed at the intersection of the second layer wiring and the third layer wiring, 5 is a resist (A) which is a masking material when processing the metal wiring 4, and 6 is used to form an air bridge structure. Resist (B), 7 is a plating power supply layer, 8 is a resist (C) that serves as a masking material when forming an air bridge,
9 is an air bridge wiring formed by plating.

As shown in FIG. 1(a), after forming a first layer wiring 2 made of a laminated metal of Ti/Au and an insulating film 3 of SiO2 on a semiconductor substrate 1 on which elements such as FETs have been formed in advance, A Ti/Au layered metal layer forming the intersection of the second layer wiring and the third layer wiring is deposited by sputtering or the like, and is further patterned so as to leave a resist (A) 5 in a desired area. Next, this resist (A) 5
After processing the metal wiring 4 by ion milling or the like using as a masking material, the resist (A) 5 is removed to form a pattern as shown in FIG. 1(b). Next, after applying a resist (B) 6, an opening 6a is formed in a region where the second layer wiring is to be connected to the metal wiring 4, thereby forming a pattern shown in FIG. 1(c).

Next, after depositing a plated power supply layer 7 made of a laminated metal such as Ti/Au to a thickness of about 0.2 to 0.5 μm by sputtering or the like, a resist (C) 8 is used to form the second layer wiring and the third layer wiring. Opening 8 in the area that will become the layer wiring
a to form a pattern as shown in FIG. 2(a). Next, a metal such as Au is grown by electroplating or the like to form air bridge wiring 9 as second layer wiring and third layer wiring to a thickness of 1 to 5 μm as shown in FIG. 2(b).

Next, after removing the resist (C) 8, the entire surface is etched by ion milling or the like to remove the unnecessary power supply layer 7 (FIG. 2(c)). At this time, the thickness of the air bridge wiring 9 is also slightly reduced, but this has no effect because there is a difference in the initial thickness. Next, resist (B) 6
By removing , a multilayer wiring having an air bridge structure as shown in FIG. 2(d) can be obtained.

[0013]

[Effects of the Invention] As explained above, according to the method of the present invention, the second layer wiring and the third
All of the layer wiring except for the intersections can be obtained by an air bridge structure, which has a great effect on reducing the wiring capacitance.

[Brief explanation of drawings]

FIG. 1A to FIG. 1C are process cross-sectional views showing an embodiment of the present invention.

2(a) to 2(d) are process sectional views showing an embodiment of the present invention following FIGS. 1(a) to 1(c). FIG.

3(a) to 3(c) are process cross-sectional views showing a conventional method for forming multilayer wiring having an air bridge structure.

FIG. 4(a) and FIG. 4(b) are FIG. 3(a) showing a method of forming a multilayer wiring having a conventional air bridge structure;
It is a process cross-sectional view following FIG. 3(c).

[Explanation of symbols]

1 Semiconductor substrate 2 First layer wiring 3 Insulating film 4 Metal wiring 5 Resist (A) 6 Resist (B) 7 Plated power supply layer 8 Resist (C) 9 Air bridge wiring

Claims (1)

[Claims] 1. A multilayer wiring having an air bridge structure, characterized in that the wiring in the uppermost layer and at least part of the wiring in the layer below form the air bridge structure, and the air bridge structures are formed simultaneously. How to form multilayer wiring.