JPH0713962B2 - Semiconductor device having multilayer wiring structure - Google Patents

Description

The present invention relates to a semiconductor device having a multilayer wiring structure using a coating film as an interlayer insulating film.

[Prior Art] Recently, it has become necessary to flatten the interlayer insulating film due to the demand for finer wiring and multi-layering. Therefore, a coating film such as polyimide is used as the interlayer insulating film.

That is, as shown in FIG. 3, an insulating film is formed on the semiconductor substrate 21.
22 is formed, and a first group of aluminum (Al) wiring layers 23 is patterned on the insulating film 22. And
A first interlayer insulating film 24 is formed on the first Al wiring layer 23 and the insulating film 22.
Are formed on the first interlayer insulating film 24.
Al wiring layers 25 and 25a are patterned. The second A
The first Al wiring layer 23 does not exist immediately below the wiring layer 25a. Then, a second interlayer insulating film 26 made of polyimide is applied on the second Al wiring layers 25, 25a and the first interlayer insulating film 24. A third group of Al wiring layers (not shown) is formed on the second interlayer insulating film 26.

[Problems to be Solved by the Invention] However, when this polyimide coating film is used as the interlayer insulating film 26, as shown in FIG. 3, the thickness of the coating film (interlayer insulating film 26) is The position X on the wiring layer 25 may be different from the position Y on the wiring layer 25a. Therefore, when a through hole is formed in the interlayer insulating film 26, if the through hole 27X is provided by etching in accordance with the X position as shown in FIG. 4, the through hole 27X is not opened at the Y position. Open failure occurs.

On the other hand, as shown in FIG. 5, when the through hole 27Y is formed by etching in accordance with the position of Y, the through hole opened at the position of X is over-etched and is formed on the second polyimide interlayer insulating film 26. A so-called step break 29 occurs in the third group of Al wiring layers 28. As a result, disconnection of the upper wiring layer 28 occurs, or when the etching gas contains O ₂ , the surface of the lower wiring layer 25 is oxidized and the oxide film 30 is formed.
Are formed, the through-hole resistance increases, and an open defect occurs.

Further, as shown in FIG. 6, as the second interlayer insulating film 26,
When the laminated body of the inorganic insulating film 31, the organic siloxane polymer film 32 and the inorganic insulating film 33 is used, the third Al wiring layer 28 is formed on the interlayer insulating film 26 because it is used as an interlayer film in combination with the inorganic film. Since the outgas from the interlayer insulating film 26 is concentrated in the openings 34 when aluminum is sputter-deposited in order to prevent the adhesion failure of aluminum. This adhesion failure is more likely to occur as the area of the coating film (interlayer insulating film 26) exposed on the side surface of the opening 34 is larger. Therefore, X
Even if the processing condition is set so that the defect does not occur at the position of, the defect occurs at the position of Y.

The present invention has been made in view of such problems,
An object of the present invention is to provide a semiconductor device having a multilayer wiring structure in which an interlayer insulating film is flat and the film thickness is uniform, and it is possible to prevent occurrence of a defect in a contact for connecting upper and lower wiring layers. And

[Means for Solving the Problems] A semiconductor device having a multilayer wiring structure according to the present invention is a multilayer structure in which a plurality of wiring pattern groups including a plurality of wiring layers are laminated with an interlayer insulating film disposed therebetween. In a semiconductor device having a wiring structure, a first wiring layer belonging to a wiring pattern group of the nth group and a specific wiring layer belonging to the wiring pattern group of the (n + 1) th group above the wiring layer It is characterized in that a dummy pattern for uniformizing the film thickness of the interlayer insulating film between the n-th wiring pattern group and the (n + 1) th wiring pattern group is provided.

[Operation] In the present invention, the interlayer insulating film is provided with a contact for connecting a specific wiring layer belonging to the nth wiring pattern group and a specific wiring layer belonging to the n + 1th wiring pattern group above the wiring pattern group. However, this is the case when the wiring layer of the m-th group (m <n) wiring pattern group is omitted in the region immediately below this contact, and the wiring pattern group of the n-th group and the n + 1-th wiring pattern group are removed. When the film thickness of the interlayer insulating film between the wiring pattern groups of the group is likely to be locally increased, a dummy pattern is provided at this cutout position to form the film thickness of the interlayer insulating film between the wiring pattern groups. To make it uniform. That is, conventionally, when the lower wiring layer is omitted, the interlayer insulating film is not flat and the film thickness becomes thicker at the removed position. Therefore, in contrast to the conventional case where the film thickness is nonuniform, in the present invention, the film thickness of the interlayer insulating film between the wiring pattern groups, that is, the film thickness of the interlayer insulating film in the contact formation portion is uniform. Defects are prevented. The dummy pattern may be formed below the n-th group, for example, the l-th group.
When the wiring layer is omitted in the wiring pattern group of the group (l <n, l ≠ m), the dummy pattern may be provided in the m-th group instead of providing the dummy pattern in the l-th group.

[Embodiment] Next, an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a vertical sectional view showing a semiconductor device according to a first embodiment of the present invention. Insulating film 2 provided on semiconductor substrate 1
After aluminum (Al) is deposited thereon by a method such as sputtering, a first group of Al wiring layers 3 and a dummy pattern 4 are formed by patterning. The dummy pattern 4 is a semiconductor element (not shown) formed on the semiconductor substrate 1.
It is not connected between the first Al wiring layer 3 and
The same unevenness or level difference is given on the insulating film 2.

Then, polyimide is applied to the entire surface to form the first interlayer insulating film 5
After forming a through hole (not shown) in the first interlayer insulating film 5, a second group of Al wiring layers 6 and 6a is formed.

Then, polyimide is applied to the entire surface to form the second interlayer insulating film 7
To form a second Al wiring layer in the second interlayer insulating film 7.
Through holes 7a and 7b are opened at the positions where 6 and 6a are arranged, respectively.

Then, fill the through holes 7a and 7b,
A third group of Al wiring layers 8 is formed. This through hole 7a, 7
In b, the third Al wiring layer 8 is electrically connected to the second Al wiring layers 6 and 6a.

In the semiconductor device having such a configuration, the first group
When forming the Al wiring layer 3, the dummy pattern 4 is simultaneously formed.
Also formed. The dummy pattern 4 does not have any relation to the function of the semiconductor device, but by disposing the dummy pattern 4 between the first Al wiring layers 3,
The pitch of the irregularities or steps on the surface of the first interlayer insulating film 5 formed on the insulating film 2 becomes smaller, and the height of the irregularities or steps also becomes smaller. Therefore, the surface of the second interlayer insulating film 7 applied on the first interlayer insulating film 5 becomes substantially flat. That is, as in the conventional case (see FIG. 3), when the dummy pattern 4 is not provided, the second Al wiring layer 2
The surface of the first interlayer insulating film 24 at the position where the 5a is arranged and the second A
There is a large step between the wiring layer 25 and the surface of the first interlayer insulating film 24.
The thickness of the applied second interlayer insulating film 26 on 24 has a large difference between the two positions. However, in this embodiment, as shown in FIG. 1, the distance between the first Al wiring layers 3 is wide, and the film thickness of the upper second interlayer insulating film 7 in the through hole 7b is locally increased. Since the dummy pattern 4 is formed at a position where the above is expected, the film thickness of the second interlayer insulating film 7 becomes substantially uniform. Therefore, through holes
The etching of 7a and 7b can be easily controlled, and a stable through hole yield can be obtained.

FIG. 2 is a vertical sectional view showing a semiconductor device according to the second embodiment of the present invention.

An insulating film 12 is formed on a semiconductor substrate 11, and a dummy pattern 13 is arranged at the same time when a first Al wiring layer (not shown) is formed on the insulating film 12.

Next, the first interlayer insulating film 14 is formed on the entire surface. And
After patterning the second Al wiring layer 15 at a predetermined position on the first interlayer insulating film 14, polyimide is applied to form a second interlayer insulating film.
Forming 16. The surface of the second interlayer insulating film 16 is flattened by the dummy pattern 13.

Next, a third Al wiring layer 17 is patterned on the second interlayer insulating film 16, and polyimide is applied to the entire surface to form a third interlayer insulating film 18.

In the semiconductor device thus obtained, the third Al
In order to make the film thickness of the polyimide interlayer insulating film 18 in the through hole formation portion between the wiring layer 17 and the fourth Al wiring layer (not shown) formed thereon constant, a dummy is formed when the first Al wiring layer is formed. A pattern 13 is formed.

In the first embodiment, in order to make the film thickness of the interlayer insulating film 7 forming the through hole 7b uniform, the dummy pattern 4 is formed in the interlayer insulating film 5 immediately thereunder at the same time when the first Al wiring layer 3 is formed. Is forming. However, if it is difficult to provide the dummy pattern 4 in the wiring pattern group of the first group to which the wiring layer 3 immediately below is located due to the layout, use the wiring pattern group of a lower layer as in the second embodiment. However, the same effect is obtained.

Incidentally, in each of the above-mentioned examples, the polyimide interlayer insulating film and the Al wiring layer are laminated, but the present invention is not limited to this, and as the interlayer insulating film, a coating film of an organic siloxane polymer or the like, or A laminate of an inorganic material film may be used, and further, a wiring layer formed of a metal other than Al, polycrystalline silicon, silicide, or the like may be used.

As described above, according to the present invention, the nth group and the n + th group
Since a dummy pattern for equalizing the film thickness of the interlayer insulating film between these wiring pattern groups is provided immediately below the contact that connects the specific wiring layers belonging to each wiring pattern group of one group, It is possible to prevent the film thickness of the interlayer insulating film in the through hole opening portion from locally fluctuating greatly.
As a result, the controllability of through-hole etching is improved, and various defects such as defective opening of the through-hole opening, disconnection, increase in through-hole resistance, and defective adhesion of wiring metal are avoided. Further, it is possible to suppress defects caused by the thick coating film being exposed on the side wall of the through hole.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing a first embodiment of the present invention, FIG. 2 is a vertical sectional view showing a second embodiment of the present invention, and FIGS. 3 to 6 are problems of a conventional semiconductor device. It is a longitudinal cross-sectional view for explaining the points. 1,11,21; semiconductor substrate, 2,12,22; insulating film, 3,23; first Al wiring layer, 4,13; dummy pattern, 5,14, 24; first interlayer insulating film,
6,6a, 15,25,25a; second Al wiring layer, 7,16,26; second interlayer insulating film, 7a, 7b, 27X, 27Y; through hole, 8,17; third Al wiring layer,
18: Third interlayer insulating film

Claims (3)

[Claims] 1. A semiconductor device having a multi-layered wiring structure in which a plurality of wiring pattern groups including a plurality of wiring layers are stacked with an interlayer insulating film disposed between them, and a specific wiring pattern group belonging to the nth wiring pattern group is specified. Wiring layer and the n + 1th layer above it
A dummy pattern for equalizing the film thickness of the interlayer insulating film between the nth group and the (n + 1) th group of wiring pattern groups is provided immediately below the contact that connects with a specific wiring layer belonging to the group of wiring pattern groups. A semiconductor device having a multilayer wiring structure. 2. A semiconductor device having a multilayer wiring structure according to claim 1, wherein at least one layer of the interlayer insulating film is a coating film of a polyimide compound. 3. A semiconductor device having a multilayer wiring structure according to claim 1, wherein at least one layer of the interlayer insulating film is a coating film of an organic siloxane polymer.