JPH0434184B2 - - Google Patents
Info
- Publication number
- JPH0434184B2 JPH0434184B2 JP58056606A JP5660683A JPH0434184B2 JP H0434184 B2 JPH0434184 B2 JP H0434184B2 JP 58056606 A JP58056606 A JP 58056606A JP 5660683 A JP5660683 A JP 5660683A JP H0434184 B2 JPH0434184 B2 JP H0434184B2
- Authority
- JP
- Japan
- Prior art keywords
- central processing
- processing unit
- external medium
- cpu
- cpu2
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000015654 memory Effects 0.000 claims description 24
- 230000008878 coupling Effects 0.000 claims description 10
- 238000010168 coupling process Methods 0.000 claims description 10
- 238000005859 coupling reaction Methods 0.000 claims description 10
- 230000005856 abnormality Effects 0.000 claims description 9
- 238000003745 diagnosis Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 230000002159 abnormal effect Effects 0.000 claims description 4
- 101100005916 Arabidopsis thaliana CER3 gene Proteins 0.000 description 4
- 101150088221 FLP1 gene Proteins 0.000 description 4
- 101100299619 Mus musculus Ptpn18 gene Proteins 0.000 description 4
- 101100220842 Schizosaccharomyces pombe (strain 972 / ATCC 24843) clp1 gene Proteins 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 101000854862 Homo sapiens Vacuolar protein sorting-associated protein 35 Proteins 0.000 description 2
- 102100020822 Vacuolar protein sorting-associated protein 35 Human genes 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 101100029765 Arabidopsis thaliana PIA2 gene Proteins 0.000 description 1
- 102100035587 Distal membrane-arm assembly complex protein 1 Human genes 0.000 description 1
- 101000930299 Homo sapiens Distal membrane-arm assembly complex protein 1 Proteins 0.000 description 1
- 201000007902 Primary cutaneous amyloidosis Diseases 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 208000031684 primary localized cutaneous 1 amyloidosis Diseases 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0709—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a distributed system consisting of a plurality of standalone computer nodes, e.g. clusters, client-server systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58056606A JPS59180760A (ja) | 1983-03-31 | 1983-03-31 | リモ−トダンプ方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58056606A JPS59180760A (ja) | 1983-03-31 | 1983-03-31 | リモ−トダンプ方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59180760A JPS59180760A (ja) | 1984-10-13 |
JPH0434184B2 true JPH0434184B2 (fr) | 1992-06-05 |
Family
ID=13031887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58056606A Granted JPS59180760A (ja) | 1983-03-31 | 1983-03-31 | リモ−トダンプ方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59180760A (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE112007002219B8 (de) * | 2006-09-21 | 2016-04-28 | Autonetworks Technologies, Ltd. | Elektrisches Steuersystem |
JP5435205B2 (ja) * | 2009-01-29 | 2014-03-05 | 日本電気株式会社 | マルチノードシステム、ノード、メモリダンプ処理方法、及びプログラム |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5523579A (en) * | 1978-08-08 | 1980-02-20 | Panafacom Ltd | Coupler |
-
1983
- 1983-03-31 JP JP58056606A patent/JPS59180760A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5523579A (en) * | 1978-08-08 | 1980-02-20 | Panafacom Ltd | Coupler |
Also Published As
Publication number | Publication date |
---|---|
JPS59180760A (ja) | 1984-10-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4894828A (en) | Multiple sup swap mechanism | |
JP3481737B2 (ja) | ダンプ採取装置およびダンプ採取方法 | |
US5267246A (en) | Apparatus and method for simultaneously presenting error interrupt and error data to a support processor | |
CN112650612A (zh) | 一种内存故障定位方法及装置 | |
JPH0434184B2 (fr) | ||
JPH02132528A (ja) | 二重化処理装置におけるチェック方法 | |
JP2855633B2 (ja) | マルチプロセッサシステムにおけるデュアルポートメモリの故障診断装置 | |
JP3127941B2 (ja) | 二重化装置 | |
TWI823556B (zh) | 記憶體異常檢測系統、主機板、電子裝置及異常檢測方法 | |
JPS62271153A (ja) | 共通バス構造における診断方式 | |
JP2584466B2 (ja) | ディスクコントローラの自己診断方法 | |
JP3190694B2 (ja) | ローカルメモリの診断方式 | |
JPH0375939A (ja) | 情報処理システム | |
JP2007531084A (ja) | マルチプロセッサシステムを整備する保守インターフェースユニット | |
JP3161532B2 (ja) | Dma診断装置 | |
JP3334174B2 (ja) | 障害処理検証装置 | |
TW202411840A (zh) | 記憶體異常檢測系統、主機板、電子裝置及異常檢測方法 | |
JP2580311B2 (ja) | 多重化システムの相互監視処理方式 | |
JPH03253945A (ja) | データ処理システムの異常回復処理機能確認方式 | |
WO1990003067A1 (fr) | Circuit logique de verification de validation de bus de donnees | |
JPH04328646A (ja) | 障害情報の採取方式 | |
CN117909109A (zh) | 一种内存错误信息处理方法及计算设备 | |
JPH0553934A (ja) | バスライン監視方式 | |
JPH0797327B2 (ja) | 故障検出方法 | |
JPH0746344B2 (ja) | 通信システムの障害情報収集方法 |