JPH04323835A - Manufacture of copper bonding wire - Google Patents

Manufacture of copper bonding wire

Info

Publication number
JPH04323835A
JPH04323835A JP3092443A JP9244391A JPH04323835A JP H04323835 A JPH04323835 A JP H04323835A JP 3092443 A JP3092443 A JP 3092443A JP 9244391 A JP9244391 A JP 9244391A JP H04323835 A JPH04323835 A JP H04323835A
Authority
JP
Japan
Prior art keywords
gold
wire
copper bonding
bonding wire
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3092443A
Other languages
Japanese (ja)
Inventor
Kuniaki Kimoto
国明 紀本
Koichi Tamura
幸一 田村
Mitsuru Tanaka
満 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP3092443A priority Critical patent/JPH04323835A/en
Publication of JPH04323835A publication Critical patent/JPH04323835A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/43—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/43—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/43—Manufacturing methods
    • H01L2224/438—Post-treatment of the connector
    • H01L2224/43848—Thermal treatments, e.g. annealing, controlled cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/012—Semiconductor purity grades
    • H01L2924/01205—5N purity grades, i.e. 99.999%

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To manufacture a copper bonding wire which is not expensive and has loop characteristics equivalent to the characteristics of a gold or gold alloy wire and can be used in place of expensive gold or gold alloy wire. CONSTITUTION:A copper wire whose purity is not less than 99.999% is completely annealed and, after annealing, modified so as to have its 0.2% yield 15-22kg/mm<2> by a skin-pass process with a die. A copper bonding wire which is not expensive and has performance equivalent to the performance of a gold or gold alloy wire can be obtained.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】本発明は、銅ボンディングワイヤ
の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing copper bonding wire.

【０００２】0002

【従来の技術】従来、シリコン半導体素子上の電極と外
部リード間を接続するボンディングワイヤとしては、金
細線および純金に微量の添加元素を加えた金合金細線が
使用されている。2. Description of the Related Art Conventionally, thin gold wires and thin gold alloy wires made of pure gold with a trace amount of additive elements have been used as bonding wires for connecting electrodes on silicon semiconductor devices and external leads.

【０００３】0003

【発明が解決しようとする課題】シリコン半導体が大量
生産されるようになった現在、資源的にも少なく、かつ
高価な金および金合金線を従来通り使用した場合、シリ
コン半導体の製造原価低減に寄与しない。このため、安
価で金および金合金線と同等の性能を持つ代替ワイヤの
出現が望まれる。[Problem to be solved by the invention] Now that silicon semiconductors are being mass-produced, it is difficult to reduce the manufacturing cost of silicon semiconductors if gold and gold alloy wires, which are scarce and expensive in terms of resources, are used as before. Does not contribute. Therefore, there is a desire for an alternative wire that is inexpensive and has performance equivalent to gold and gold alloy wires.

【０００４】本発明は以上の点に鑑みなされたものであ
り、高価な金および金合金線に代わる安価で、かつ金お
よび金合金線と同等のループ特性を持つ銅ボンディング
ワイヤの製造方法を提供することを目的とするものであ
る。The present invention has been made in view of the above points, and provides a method for manufacturing a copper bonding wire that is an inexpensive alternative to expensive gold and gold alloy wires and has loop characteristics equivalent to gold and gold alloy wires. The purpose is to

【０００５】[0005]

【課題を解決するための手段】上記目的は、純度９９．
９９９％以上の銅ワイヤを完全焼鈍し、焼鈍後ダイスに
よりスキンパス加工を行ない、０．２％耐力の値を１５
〜２２ｋｇ／ｍｍ２　に調質することにより、達成され
る。[Means for solving the problem] The above object has a purity of 99.
A copper wire of 999% or more is completely annealed, and after annealing, skin pass processing is performed using a die to reduce the 0.2% yield strength to 15.
This is achieved by tempering to ~22 kg/mm2.

【０００６】[0006]

【作用】上記手段を設けたので、安価で金および金合金
線と同等のループ特性を持つ銅ボンディングワイヤが得
られるようになる。[Operation] Since the above means is provided, a copper bonding wire can be obtained at low cost and having loop characteristics equivalent to gold and gold alloy wires.

【０００７】[0007]

【実施例】次に本発明を実施例により具体的に説明する
。[Examples] Next, the present invention will be explained in detail with reference to Examples.

【０００８】〔実施例　　１〕本実施例では純度９９．
９９９％以上の銅ワイヤを完全焼鈍し、焼鈍後ダイスに
よりスキンパス加工を行ない、０．２％耐力の値を１５
〜２２ｋｇ／ｍｍ２　に調質した。このようにすること
により、安価で金および金合金線と同等のループ特性を
持つ銅ボンディングワイヤが得られるようになり、高価
な金および金合金線に代わる安価で、かつ金および金合
金線と同等のループ特性を持つ銅ボンディングワイヤの
製造方法を得ることができる。[Example 1] In this example, the purity was 99.
A copper wire of 999% or more is completely annealed, and after annealing, skin pass processing is performed using a die to reduce the 0.2% yield strength to 15.
It was tempered to ~22 kg/mm2. By doing this, it becomes possible to obtain a copper bonding wire that is inexpensive and has the same loop characteristics as gold and gold alloy wires, and is an inexpensive alternative to expensive gold and gold alloy wires. A method for producing copper bonding wires with comparable loop characteristics can be obtained.

【０００９】すなわち純度９９．９９９％以上の銅線を
、中間焼鈍を施して常温で伸線加工していき、スキンパ
ス前の各々の所定サイズのものを５種類作製した。この
ものを不活性ガス雰囲気中で連続走行焼鈍（温度２００
〜５０００Ｃ、線速１０〜８０ｍ／分）を行ない、焼鈍
後３０μにスキンパスダイス加工を行なった。その後、
これらのサンプルを自動ボンダーでシリコン半導体上の
電極と外部リードとを接続し、実体顕微鏡でループ形状
の観察を行ない、評価した。表１にループ形状評価結果
を示す。That is, copper wires with a purity of 99.999% or more were subjected to intermediate annealing and then drawn at room temperature, and five types of wires of predetermined sizes were produced before being skin-passed. This material was continuously annealed in an inert gas atmosphere (temperature 200
~5000C, linear velocity 10~80m/min), and skin pass die processing was performed at 30μ after annealing. after that,
These samples were evaluated by connecting the electrodes on the silicon semiconductor and external leads using an automatic bonder, and observing the loop shape using a stereomicroscope. Table 1 shows the loop shape evaluation results.

【００１０】0010

【表１】[Table 1]

【００１１】同表から明らかなように、実施例１〜５は
０．２％耐力の値を１５〜２２ｋｇ／ｍｍ２　に調質し
たものであり、ループ特性は良好であった。比較例１、
２は０．２％耐力の値が実施例のそれより低いものであ
るが、ループ形状が不安定となり、リード線接触が認め
られた。比較例３、４は０．２％耐力の値が実施例のそ
れよりも高いものであり、ループ形状に折れ曲がり等が
認められた。As is clear from the same table, Examples 1 to 5 were tempered to have a 0.2% yield strength of 15 to 22 kg/mm 2 and had good loop characteristics. Comparative example 1,
Sample No. 2 had a 0.2% proof stress value lower than that of Example, but the loop shape became unstable and lead wire contact was observed. In Comparative Examples 3 and 4, the 0.2% proof stress value was higher than that of the example, and bending and the like were observed in the loop shape.

【００１２】このように本実施例によればループ形状異
常によるワイヤ同志の接触不良や半導体素子上の電極接
続不良等のトラブルを解消でき、ボンディング速度の増
速、多ピン半導体の接続にも対応できる。As described above, according to this embodiment, troubles such as poor contact between wires and poor electrode connection on semiconductor elements due to abnormal loop shapes can be solved, and it is also possible to increase the bonding speed and connect multi-pin semiconductors. can.

【００１３】また、銅ボンディングワイヤの使用により
、半導体素子の原価低減が可能となる。[0013] Furthermore, the use of copper bonding wires makes it possible to reduce the cost of semiconductor devices.

【００１４】なお、純度９９．９９９％以上の銅線を不
活性ガス雰囲気中でバッチ焼鈍あるいは連続走行焼鈍を
行ない、温度と焼鈍時間、温度と走行焼鈍速度を０．２
％耐力が１５〜２２ｋｇ／ｍｍ２　の範囲に入るような
条件で焼鈍を実施しても、実施例と同様な目的を達成で
きる。Copper wire with a purity of 99.999% or higher was subjected to batch annealing or continuous running annealing in an inert gas atmosphere, and the temperature, annealing time, and temperature and running annealing rate were set to 0.2.
Even if annealing is performed under conditions such that the % proof stress falls within the range of 15 to 22 kg/mm2, the same objective as in the example can be achieved.

【００１５】[0015]

【発明の効果】上述のように本発明は、純度９９．９９
９％以上の銅ワイヤを完全焼鈍し、焼鈍後ダイスにより
スキンパス加工を行ない、０．２％耐力の値を１５〜２
２ｋｇ／ｍｍ２　に調質したので、安価で金および金合
金線と同等のループ特性を持つ銅ボンディングワイヤが
得られるようになり、高価な金および金合金線に代わる
安価で、かつ金および金合金線と同等のループ特性を持
つ銅ボンディングワイヤの製造方法を得ることができる
。Effects of the Invention As mentioned above, the present invention has a purity of 99.99.
A copper wire of 9% or more is completely annealed, and after annealing, skin pass processing is performed using a die to reduce the 0.2% yield strength to 15 to 2.
Since it is tempered to 2 kg/mm2, it is now possible to obtain a copper bonding wire that is inexpensive and has the same loop characteristics as gold and gold alloy wire, and is an inexpensive alternative to expensive gold and gold alloy wire. A method for manufacturing a copper bonding wire having loop characteristics equivalent to that of a wire can be obtained.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】純度９９．９９９％以上の銅ワイヤを完全
焼鈍し、焼鈍後ダイスによりスキンパス加工を行ない、
０．２％耐力の値を１５〜２２ｋｇ／ｍｍ２　に調質し
たことを特徴とする銅ボンディングワイヤの製造方法。Claim 1: Completely annealing a copper wire with a purity of 99.999% or more, and performing skin pass processing with a die after annealing,
A method for producing a copper bonding wire, characterized in that the value of 0.2% proof stress is tempered to 15 to 22 kg/mm2.
JP3092443A 1991-04-23 1991-04-23 Manufacture of copper bonding wire Pending JPH04323835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3092443A JPH04323835A (en) 1991-04-23 1991-04-23 Manufacture of copper bonding wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3092443A JPH04323835A (en) 1991-04-23 1991-04-23 Manufacture of copper bonding wire

Publications (1)

Publication Number Publication Date
JPH04323835A true JPH04323835A (en) 1992-11-13

Family

ID=14054556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3092443A Pending JPH04323835A (en) 1991-04-23 1991-04-23 Manufacture of copper bonding wire

Country Status (1)

Country Link
JP (1) JPH04323835A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009027096A (en) * 2007-07-23 2009-02-05 Hitachi Cable Ltd Solder-plated wire for solar cell and manufacturing method thereof
JP2021072393A (en) * 2019-10-31 2021-05-06 タツタ電線株式会社 Bonding wire and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009027096A (en) * 2007-07-23 2009-02-05 Hitachi Cable Ltd Solder-plated wire for solar cell and manufacturing method thereof
JP4656100B2 (en) * 2007-07-23 2011-03-23 日立電線株式会社 Solder-plated wire for solar cell and manufacturing method thereof
JP2021072393A (en) * 2019-10-31 2021-05-06 タツタ電線株式会社 Bonding wire and semiconductor device

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