JPH04323572A - Method for inspecting circuit pattern - Google Patents

Abstract

PURPOSE:To prevent generation of failures by measuring electrostatic capacities twice when a probe is lowered and raised, and calculating the electrostatic capacity of a pattern to be inspected from the measured values if the difference between the values is not more than a specified value, so as to make a decision as to whether the pattern is good or bad. CONSTITUTION:When inspection is started, a probe 17a is raised and separated from a pattern 19 to be inspected, and under this state an electrostatic capacity CUP is measured in order to correct changes in the value of the electrostatic capacity due to the influence of the probe. Then the probe 17b is lowered and the electrostatic capacity CDOWN is measured: In order to correct the amount of changes in the electrostatic capacity due to the influence of the probe, an electrostatic capacity CP(= CDOWN-CUP) is calculated from these values and is utilized in making a decision as to whether the circuit pattern is good or bad. When the result of the decision shows that the pattern has passed the inspection or is short, operation for making a decision again is not performed but the next measurement is started and when the result of the measurement shows that the pattern has an open failure, operation for making a decision again is performed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting circuit patterns on printed wiring boards, and more particularly to a re-judgment method for inspecting circuit patterns for open or short circuits.

0002

2 is a flowchart showing an example of a conventional circuit pattern inspection method, and FIG. 3 is a side view showing the operating state of a probe in the embodiment of FIG. 1 and the example of FIG.
(a) is a diagram showing a raised state of the probe, and (b) is a diagram showing a lowered state of the probe.

[0003] In a method for inspecting a circuit pattern of a printed wiring board, the conventional judgment method for inspecting an open or short circuit pattern is to measure the capacitance of the circuit pattern to be inspected (pattern to be inspected), and A method is used to determine whether an open defect or a short defect exists by comparing the value with a value theoretically calculated from the designed length of the circuit pattern.

That is, as shown in FIG. 2, when the inspection is started (reference numeral 1), the probe is in the raised state (FIG. 3(a)
), the probe 17a touches the pattern 19 to be inspected.
Measure the capacitance CUP (at a distance from
(reference number 2), and then the lowering state of the probe (Fig. 3(b)).
The capacitance CDWN is measured (reference numeral 3) in the state shown in FIG. From the value, the capacitance CP (
= CDWN - CUP) (reference numeral 4), and from that value determine the acceptability of the circuit pattern (reference numeral 5). If the judgment result is a pass or short judgment, the re-judgment operation is not performed and the next The process moves on to measurement of the pattern to be inspected (next pattern) (reference numeral 16). If the judgment result is an open failure, measure the capacitance CN again (reference number 6) with the probe in the lowered state (the state shown in Fig. 3(b)), and from the measured value, calculate the capacitance CS (= CN-CU
P) is calculated (reference numeral 14), the quality of the inspected pattern is determined from the recalculated value (reference numeral 15), and the next inspection pattern (next pattern) is measured (reference numeral 16). .

[0005]

[Problems to be Solved by the Invention] In the conventional re-judgment method for inspecting open or short circuit patterns of printed wiring boards as described above, as a re-judgment operation to exclude pseudo-open defects, the probe is Because the capacitance is remeasured only in the falling state (the state shown in Figure 3(b)) and the quality of the circuit pattern is determined based on the measured value, erroneous measurements that are the cause of spurious open defects occur. If there is no countermeasure against erroneous measurements when the probe is in the raised state (the state shown in Figure 3(a)), and a pseudo-open failure occurs due to erroneous measurements in the raised state of the probe, a re-judgment is performed. However, it has the disadvantage that the open failure will occur again.

[0006] Furthermore, as to whether or not the measurement is being performed correctly, there is no special countermeasure since the measurement is simply remeasured, so if there is an error in the remeasured value due to noise, it is necessary to open the system again. It also has the problem of becoming defective.

[0007]

[Means for Solving the Problems] The circuit pattern inspection method of the present invention is a determination method for inspecting open or short circuit patterns in a circuit pattern inspection method of a printed wiring board, and is a method for inspecting an arbitrary circuit pattern. If the judgment is that the capacitance is open, the capacitance is remeasured with the probe lowered, and the measurement is repeated until the measured value is almost equal to the previous measurement value, and then the capacitance is remeasured with the probe lowered. Measure the capacitance again in the current state, repeat the measurement until the measured value is almost equal to the previous measured value, calculate the capacitance of the circuit pattern from these values, and re-evaluate. It includes that.

[0008]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a flowchart showing one embodiment of the present invention, and FIG. 3 is a side view showing the operating state of the probe in the embodiment of FIG. 1 and the example of FIG. 2, and (a) shows the rising state of the probe. FIG. 5B is a diagram showing a lowered state of the probe.

In this embodiment, as shown in FIG. 1, when the inspection is started (reference numeral 1), the probe 17a is raised and separated from the pattern to be inspected 19, as shown in FIG. 3(a). , in order to correct the change in capacitance value due to the influence of the probe, the capacitance CUP is measured in that state (reference numeral 2). Next, the capacitance CDWN is measured (reference numeral 3) with the probe in the lowered state (the state shown in FIG. 3(b)). Here, in order to correct the change in capacitance value due to the influence of the probe, we calculate the capacitance CP (
=CDWN-CUP) (reference numeral 4), and the quality of the circuit pattern is determined from that value (reference numeral 5). If the judgment result is a pass or short judgment, the re-judgment operation is not performed and the next pattern to be inspected (next pattern) is executed.
(reference numeral 16). If the judgment result is an open failure, a re-judgment operation is performed. In the re-judgment operation, first measure the capacitance CN with the probe in the lowered state (reference number 6), then measure the capacitance C again in the same state.
N+1 measurements are taken (reference number 7). After this, a comparison is made between capacitance CN and capacitance CN+1 (reference numeral 8), and if CN and CN+1 are not approximately equal, then
Repeat the above operation. When CN and CN+1 are almost equal, measure the capacitance CM with the probe 17a in the raised state (reference number 9), and then measure the capacitance CM+1 again in the same state (reference number 10).
). Thereafter, capacitance CM and capacitance CM+1 are compared (reference numeral 11), and if CM and CM+1 are not approximately equal, the above-described operation is repeated. CM and C
When M+1 becomes almost equal, the capacitance CR (=CN - CM) of the pattern to be inspected is calculated (reference numeral 12), re-judgment is performed based on this value (reference numeral 13), and the next The process moves on to measurement of the pattern to be inspected (next pattern) (reference numeral 16).

[0011]

[Effects of the Invention] As explained above, in the circuit pattern inspection method of the present invention, capacitance is measured two or more times with the probe in the lowered state, and if the difference is less than a specified value, the measurement is completed. Then, in order to correct the change in capacitance value due to the influence of the probe, we moved to measuring capacitance with the probe in the raised state, and measured the capacitance two or more times with the probe in the raised state, and confirmed the difference between them. If it is less than the specified value, the measurement is completed, and the capacitance of the pattern to be inspected is calculated from those values to determine pass/fail, thereby preventing false open-circuits caused by erroneous measurements due to deviations in measurement timing, etc. This has the effect of preventing defects from occurring.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing one embodiment of the present invention.

FIG. 2 is a flowchart illustrating an example of a conventional circuit pattern inspection method.

FIG. 3 is a side view showing the operating state of the probe in the embodiment of FIG. 1 and the example of FIG. 2, in which (a) is a diagram showing the probe in the raised state, and (b) is a diagram showing the probe in the lowered state. .

[Explanation of symbols]

1 Start 2 Measurement with the probe in the raised state 3 Measurement with the probe in the lowered state 4 Pattern capacitance calculation 5 Pattern pass/fail judgment 6 Re-measurement with the probe in the lowered state 7 Re-measurement with the probe in the lowered state 8 Judgment 9 Probe Re-measurement 10 in the rising state of
Re-measurement with the probe in the raised state 11 Judgment 12 Re-calculation of pattern capacitance 13 Re-determination of pattern 14 Re-calculation of pattern capacitance 15 Re-determination of pattern 16 Go to next pattern

Claims (2)

[Claims] Claim 1: A determination method for inspecting open or short circuit patterns in a method for inspecting circuit patterns of printed wiring boards, wherein when the determination of any circuit pattern is an open defect determination, the probe is lowered. re-measure the capacitance with the probe in the raised state, repeat the measurement until the measured value is approximately equal to the previous measured value, then re-measure the capacitance with the probe in the raised state, and the measured value Repeat the measurement until the value is almost equal to the previous measurement value,
A method for inspecting a circuit pattern, comprising calculating the capacitance of the circuit pattern from these values and re-judging it. 2. A determination method for inspecting open or short circuit patterns in a method for inspecting circuit patterns of printed wiring boards, the method comprising measuring capacitance in a raised state of a probe and in a lowered state of the probe. When the capacitance of the circuit pattern is calculated from those values and the circuit pattern is judged to be good or bad from the calculated value, if the judgment is open failure, the capacitance is Take a new measurement and repeat the measurement until the measured value is approximately equal to the previous measured value, then remeasure the capacitance with the probe in the raised state and the measured value is approximately equal to the previous measured value. 1. A method for inspecting a circuit pattern, comprising repeating measurements until a value is obtained, calculating the capacitance of the circuit pattern from these values, and re-judging the capacitance of the circuit pattern.