JP2006214860A - Inspection method and device for semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inspection method and inspection device for improving anomalous current detection accuracy lowered owing to the fluctuating tendency of IDDQ measurement values. <P>SOLUTION: This inspection method comprises: a process for repeatedly performing stationary power source current measurement while sequentially switching inspection patterns to obtain series of stationary power source current measurement data corresponding to the respective inspection patterns; a process for dividing each of the series of stationary power source current measurement data, in a measurement order, into partial series each comprising stationary power source current measurement data less in number than the total of the inspection patterns; and a process for calculating a quality determination index for each partial series by using the measurement data to perform quality determination on each semiconductor integrated circuit which is the inspecting object by comparing the determination index with a quality determination standard value. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor integrated circuit inspection method and inspection apparatus using a Quiescent Power Supply Current (hereinafter referred to as IDDQ).

  The IDDQ inspection is one of inspection methods for a semiconductor integrated circuit, and determines whether or not there is a failure in the circuit based on the value of the power supply current when the semiconductor integrated circuit to be inspected is in a stationary state.

  In general, in a CMOS circuit, a P-type MOS transistor is connected to the power supply side and an N-type MOS transistor is connected to the ground side with the output terminal at each stage as the center. Due to the complementary nature of the P-type and N-type MOS transistors regardless of the pattern applied to the input terminal of each stage, there is at least one transistor in the OFF state on all paths between the power supply and the ground.

  Therefore, conventionally, in a normal CMOS circuit without a failure, the current flowing between the power source and the ground in a stationary state, that is, the power source current is due to the leakage current of the MOS transistor, and the value is usually very small.

  On the other hand, when a fault exists in the CMOS circuit, a current other than the leakage current may flow in a stationary state. For example, when two adjacent wirings are short-circuited by some foreign matter, when the CMOS circuit is in an internal state in which one wiring is driven to the power supply level and the other wiring is driven to the ground level, the foreign matter is removed. Thus, a current path that cannot be a normal CMOS circuit is formed between the power source and the ground. At this time, since a current larger than the leakage current flows, a failure is easily detected by comparing the IDDQ measurement value with a single / fixed set value.

  However, the miniaturization of the manufacturing process has progressed, the leakage current of the MOS transistor has increased, and the integration scale has also increased, so that the value of IDDQ in a normal CMOS circuit has greatly increased. As a result, the current component due to the failure in the IDDQ measurement value becomes relatively small, and the accuracy of the failure detection has been lowered. At the same time, variations in IDDQ with respect to variations in manufacturing conditions are increasing, and IDDQ inspection by comparison with single and fixed set values as described above is becoming virtually impossible.

  Several methods have been proposed in order to improve the problems of the IDDQ inspection as described above and to effectively apply the IDDQ inspection even to a semiconductor integrated circuit using a fine process. In these methods, a semiconductor integrated circuit to be inspected is sequentially set to a plurality of different internal states, for example, by giving an inspection pattern from the outside, and IDDQ in each internal state is measured. Then, by performing predetermined data processing for all IDDQ measurement values, the current component when the semiconductor integrated circuit is normal in the IDDQ measurement value is offset, and the current component due to the failure is detected. The following two examples are shown as specific examples.

  ΔIDDQ method: A method based on the idea that a current component due to a failure is calculated by a difference between measured IDDQ values. Examples of how to take the difference include taking the difference between the maximum and minimum values of all measured values. If the difference value exceeds the set value, the semiconductor integrated circuit to be inspected is determined to be defective. (See Non-Patent Document 1).

  Current Ratio method: A method that utilizes the property that the ratio between the maximum value and the minimum value of IDDQ measurement values is substantially constant among non-defective products in the same type of semiconductor integrated circuit. An internal state that minimizes IDDQ is determined in advance by prior evaluation, and a ratio between the maximum value and the minimum value is obtained. There are two upper and lower limit setting values for pass / fail judgment. The upper limit is a product of the IDDQ measurement value in the predetermined internal state and the above ratio plus a margin, and the lower limit is the predetermined internal state. It is assumed that the margin is subtracted from the IDDQ measurement value in (see Patent Document 1 and Non-Patent Document 2).

  Hereinafter, an existing IDDQ inspection improvement method will be described.

  FIG. 7 is a block diagram illustrating a configuration example of an inspection apparatus for implementing the IDDQ inspection improvement technique. The inspection apparatus 400 illustrated in FIG. 7 includes an inspection pattern application apparatus 410, a power supply current measurement apparatus 420, a quality determination index calculation apparatus 440, a quality determination apparatus 450, and a control apparatus 470.

  The inspection pattern application device 410 applies the inspection pattern 411 to the semiconductor integrated circuit 490 to be inspected according to the inspection pattern control signal 471 from the control device 470. The test pattern 411 includes a data pattern for setting the internal state of the semiconductor integrated circuit 490 and a mode setting pattern including IDDQ measurement mode setting.

  The power supply current measuring device 420 is disposed on a path through which the power supply 421 supplies power supply current to the semiconductor integrated circuit 490 to be inspected, and measures the power supply current according to the current measurement instruction signal 472 from the control device 470. The measurement result is output as power supply current measurement data 422.

  The pass / fail determination index calculation device 440 takes in and stores the power supply current measurement data 422 in accordance with the data take-in instruction signal 473 from the control device 470. Further, the pass / fail judgment index 441 is calculated and output using the stored power source current measurement data 422 in accordance with the pass / fail judgment index calculation instruction signal 475 from the control device 470.

  The pass / fail judgment device 450 takes the pass / fail judgment index 441, compares it with the pass / fail judgment standard value stored therein, judges pass / fail of the semiconductor integrated circuit 490 to be inspected, and outputs a pass / fail judgment result 451.

Based on the operation of each device described above, the operation of the control device 470 and the IDDQ inspection by the inspection device 400 will be described. Hereinafter, 100 patterns are prepared as inspection patterns.
(1) The control device 470 causes the inspection pattern application device 410 to start outputting the inspection pattern through the inspection pattern control signal 471. When the setting of the internal state of the semiconductor integrated circuit 490 using the inspection pattern is completed, the semiconductor integrated circuit 490 is set to the IDDQ measurement mode.
(2) The control device 470 outputs a current measurement instruction signal 472. The power supply current measuring device 420 receives the current measurement instruction signal 472, performs IDDQ measurement, and outputs the measurement result as power supply current measurement data 422.
(3) The control device 470 outputs a data capture instruction signal 473. The quality determination index calculation device 440 receives the data acquisition instruction signal 473 and acquires the power supply current measurement data 422. When the ΔIDDQ method is adopted as the inspection method, the maximum value selected and stored from the measured power supply current measurement data 422 each time the pass / fail judgment index calculation device 440 newly takes in the power supply current measurement data 422. The maximum value and minimum value data of the power supply current measurement data 422 are updated in comparison with the minimum value data. In the case of the Current Ratio method, in addition to the above operation, in order to identify the power supply current measurement data 422 corresponding to the test pattern that minimizes the IDDQ measurement value set in the previous evaluation, the data capture instruction signal 473 is used. Use additional information. The pass / fail judgment index calculation device 440 stores the power supply current measurement data 422 separately from other data only when the data capture instruction signal 473 indicates IDDQ minimum setting data.
(4) Repeating (1) to (3) 100 times, the data of the maximum value and the minimum value among the 100 IDDQ measurement values corresponding to the 100 inspection patterns is stored in the pass / fail judgment index calculation device 440. . In the case of the Current Ratio method, in addition to the above data, power supply current measurement data 422 corresponding to a test pattern that minimizes a preset IDDQ measurement value is stored separately.
(5) The control device 470 outputs a pass / fail judgment index calculation instruction signal 475. The quality determination index calculation device 440 receives the quality determination index calculation instruction signal 475, calculates a quality determination index using the stored data, and outputs the result. In the case of the ΔIDDQ method, the difference between the data of the maximum value and the minimum value in the power supply current measurement data 422 that has been last updated is calculated and output as the pass / fail judgment index 441. In the case of the Current Ratio method, the upper and lower limits of the pass / fail judgment are calculated from the separately stored IDDQ minimum setting data, and the values obtained by subtracting the maximum and minimum values of the power supply current measurement data 422 that have been updated last are passed. Output as determination index 441.
(6) The pass / fail judgment device 450 takes the pass / fail judgment index 441, makes a pass / fail judgment by comparing with the pass / fail judgment standard value stored therein, and outputs the result.
JP 2000-171529 A AC Miller, “IDDQ Testing In Deep Submicron Integrated Circuits”, Proceedings International Test Conference, pp724-729, 1999 P. Maxwell et al., “Current Ratios: A Self-Scaling Technique for Production IDDQ Testing”, Proceedings International Test Conference, pp738-746, 1999

  By the way, when the IDDQ inspection is actually introduced in the mass production shipment inspection of the semiconductor integrated circuit product, between the execution of the inspection pattern for setting the internal state of the semiconductor integrated circuit and the IDDQ measurement in order to shorten the inspection time. Only a minimum waiting time for stabilizing the measurement can be set. Further, even during the period from the IDDQ measurement to the start of execution of the next test pattern, the power supply voltage is not switched, and the power supply current always flows through the semiconductor integrated circuit to be tested.

  In the inspection environment as described above, an increasing tendency as shown in FIG. 8A is seen in the series of IDDQ measurement values. Here, the horizontal axis is the number of the inspection pattern assigned according to the execution order, and the vertical axis is the IDDQ measurement value for each inspection pattern. A large variation in the IDDQ measurement values between the local inspection pattern numbers appears throughout the series of IDDQ measurement values.

  In addition, when there is an inspection item in which the IDDQ measurement target circuit operates at a high frequency immediately before the IDDQ inspection, a decreasing tendency as shown in FIG. 8B is seen in the IDDQ measurement value series.

  When the IDDQ measurement value series has a fluctuation tendency as shown in FIG. 8, if the data processing is uniformly performed on the IDDQ measurement value series, the failure detection capability decreases. That is, the detection accuracy decreases because the ratio of the current component due to the failure decreases. Also, in the case where the current component due to the failure appears only in a very limited inspection pattern, depending on the occurrence location, what should be the maximum value in the IDDQ measurement value is concealed by the characteristic variation and is not detected at all. Will occur.

  Accordingly, an object of the present invention is to solve the above-described problems, and in an inspection environment with severe restrictions such as mass-production shipping inspection, a decrease in abnormal current detection accuracy due to a tendency of variation in IDDQ measurement values is reduced. An object of the present invention is to provide a semiconductor integrated circuit inspection method and inspection apparatus that can be improved and that can effectively carry out IDDQ inspection.

  In order to achieve the above object, a method for inspecting a semiconductor integrated circuit according to claim 1 of the present invention applies an inspection pattern to a semiconductor integrated circuit to be inspected, and the internal state of the semiconductor integrated circuit to be inspected. Is set, and the semiconductor integrated circuit to be inspected is set in a static state to measure a power supply current. A semiconductor integrated circuit inspection method using a stationary power supply current measurement, wherein the stationary pattern is switched while sequentially switching the inspection pattern. The process of repeatedly performing power supply current measurement to obtain a series of quiescent power supply current measurement data corresponding to each of the test patterns, and the series of the quiescent power supply current measurement data is less than the total number of the test patterns in the order of measurement. A process of dividing into a plurality of partial series consisting of the quiescent power supply current measurement data, and a pass / fail judgment using the quiescent power supply current measurement data for each partial series Calculating a target, and a process of performing quality determination of the semiconductor integrated circuit of the test object by comparing the quality determination standard value.

  3. The semiconductor integrated circuit inspection method according to claim 2, wherein an inspection pattern is applied to the semiconductor integrated circuit to be inspected, an internal state of the semiconductor integrated circuit to be inspected is set, and then the semiconductor integrated circuit to be inspected. A method for inspecting a semiconductor integrated circuit using quiescent power supply current measurement for measuring a power supply current by setting the quiescent state, wherein the quiescent power supply current measurement is repeatedly performed while sequentially switching the inspection patterns, and the inspection pattern Obtaining a series of quiescent power supply current measurement data corresponding to each of the above, a process of calculating a fluctuation tendency of the whole series of the quiescent power supply current measurement data, and canceling the fluctuation tendency with respect to the quiescent power supply current measurement data To calculate the quiescent power supply current corrected data by applying the correction, and to calculate the pass / fail judgment index using the quiescent power supply current corrected data. And a process of performing quality determination of the semiconductor integrated circuit of the test object by comparing a determination standard value.

  4. The semiconductor integrated circuit inspection method according to claim 3, wherein an inspection pattern is applied to the semiconductor integrated circuit to be inspected, an internal state of the semiconductor integrated circuit to be inspected is set, and then the semiconductor integrated circuit to be inspected. A method for inspecting a semiconductor integrated circuit using quiescent power supply current measurement for measuring a power supply current by setting the quiescent state, wherein the quiescent power supply current measurement is repeatedly performed while sequentially switching the inspection patterns, and the inspection pattern And obtaining a series of quiescent power supply current measurement data corresponding to each of the above, and the subsequence of the quiescent power supply current measurement data in the order of measurement, the subsequence consisting of a smaller number of the quiescent power supply current measurement data than the total number of the test patterns A process of calculating a variation tendency of the entire partial series for each partial series of the stationary power supply current measurement data, and the stationary Applying a correction to offset the fluctuation tendency to the source current measurement data to calculate quiescent power supply current corrected data, and using the quiescent power supply current corrected data to calculate a pass / fail judgment index And a step of determining pass / fail of the semiconductor integrated circuit to be inspected by comparing with a standard value.

  4. The semiconductor integrated circuit inspection method according to claim 4, wherein the fluctuation of the entire partial series is detected in one or more of the partial series of the quiescent power supply current measurement data. The process of calculating the trend and the process of calculating the quiescent power supply current corrected data by applying the correction that offsets the fluctuation tendency is not performed, and the quiescent power supply current measurement data is corrected as it is Data.

  A semiconductor integrated circuit inspection apparatus according to claim 5, wherein an inspection pattern application apparatus that applies an inspection pattern for setting an internal state to a semiconductor integrated circuit to be inspected, and a power supply current of the semiconductor integrated circuit to be inspected A power supply current measuring device that measures and outputs power supply current measurement data corresponding to the inspection pattern, and uses the power supply current measurement data captured from the power supply current measurement device to calculate and output the pass / fail judgment index A determination index calculation device, a pass / fail determination device that compares the pass / fail determination index with a pass / fail determination standard value, performs pass / fail determination of the semiconductor integrated circuit to be inspected, and outputs a pass / fail determination result, and the number of times the power supply current is measured When the count result reaches a predetermined number of times, the test is performed with respect to the pass / fail judgment index calculation device after the start of inspection or the previous output of the pass / fail judgment index. Instructing the calculation of the pass / fail judgment index based on the measured power supply current measurement data, initializing the counting result, and controlling the inspection pattern application device with respect to application, holding and selection of the inspection pattern And a controller for instructing the power source current measuring device to perform power source current measurement and for instructing the acceptance / rejection determination index calculating device to capture the power source current measurement data.

  7. The semiconductor integrated circuit inspection apparatus according to claim 6, wherein an inspection pattern applying apparatus that applies an inspection pattern to the semiconductor integrated circuit to be inspected, a power supply current of the semiconductor integrated circuit to be inspected are measured, and the inspection pattern A power supply current measuring device that outputs power supply current measurement data corresponding to the power supply current, and a fluctuation tendency of the power supply current measurement data captured after the start of inspection from the power supply current measurement device is calculated, and the fluctuation with respect to the power supply current measurement data is calculated. A data correction device that outputs a result of applying correction for canceling a trend as power supply current corrected data, a pass / fail determination index using the power supply current corrected data, and a pass / fail determination index calculation device that outputs the result The pass / fail judgment index and the pass / fail judgment standard value are compared, the pass / fail judgment of the semiconductor integrated circuit to be inspected is made, and the pass / fail judgment result is output. And a control for applying, holding, and selecting an inspection pattern to the inspection pattern application device, instructing the power supply current measurement device to perform a power supply current measurement, and to the data correction device to measure the power supply current. Data acquisition is instructed, and after the power supply current measurement data corresponding to all of the inspection patterns is obtained, the data correction device is instructed to calculate the fluctuation tendency and apply the correction, and the pass / fail And a control device that instructs the determination index calculation device to calculate the pass / fail determination index.

  8. A semiconductor integrated circuit inspection apparatus according to claim 7, wherein a test pattern applying apparatus that applies a test pattern to the semiconductor integrated circuit to be inspected, a power source current of the semiconductor integrated circuit to be inspected, and a power source current measurement A power supply current measuring device that outputs data, and a fluctuation trend of the power supply current measurement data captured from the power supply current measurement device is calculated, and a result of applying a correction that cancels the fluctuation trend to the power supply current measurement data is obtained. A data correction device that outputs the power supply current corrected data, a pass / fail determination index calculation device that calculates and outputs a pass / fail judgment index using the power supply current corrected data, and the pass / fail determination index and pass / fail judgment standard value. In comparison, the semiconductor integrated circuit to be inspected is judged to be good or bad, and a good or bad judgment device that outputs a good or bad judgment result is counted, and the number of power supply current measurements is counted When the counting result reaches a predetermined number of times, the data correction device is subjected to the calculation of the fluctuation tendency based on the power supply current measurement data acquired after the start of inspection or the previous power supply current corrected data output, and Instructing the application of the correction, and instructing the quality determination index calculation device to calculate the quality determination index based on the power supply current corrected data acquired after the start of inspection or the previous quality determination index output. A control device for initializing the counting result, and a control for applying, holding and selecting an inspection pattern to the inspection pattern application device, instructing the power supply current measurement device to perform a power supply current measurement, and the data And a control device that instructs the correction device to take in the power supply current measurement data.

  The semiconductor integrated circuit inspection device according to claim 8 is the semiconductor integrated circuit inspection device according to claim 7, wherein the counting device has reached the predetermined number of times at a preset specific time. However, when the data correction device does not instruct the calculation of the fluctuation trend and the application of the correction, the data correction device does not have the instruction of the calculation of the fluctuation trend and the application of the correction. In addition, the power supply current measurement data is output as the power supply current corrected data without performing calculation of the fluctuation tendency of the power supply current measurement data and correction for canceling the fluctuation tendency.

  According to the method for inspecting a semiconductor integrated circuit according to the first aspect of the present invention, the series of quiescent power supply current measurement data is divided into a partial series composed of a smaller number of quiescent power supply current measurement data than the total number of test patterns in the order of measurement. Since each process includes a process for calculating a pass / fail judgment index using the quiescent power supply current measurement data and comparing with a pass / fail judgment standard value, the pass / fail judgment of the semiconductor integrated circuit to be inspected is performed. By dividing the entire IDDQ measurement value series into partial series in the order of measurement, it is possible to reduce the influence of fluctuation tendency in the IDDQ measurement value series and to improve the decrease in the current component due to the failure. For this reason, the detection accuracy of abnormal current is improved. Further, in the case where the current component due to the failure appears only in a very limited inspection pattern, it is possible to avoid a situation where what should originally be the maximum value in the IDDQ measurement value is concealed in the fluctuation tendency, so that an abnormal current is also generated. Detection accuracy is improved.

  According to the method for inspecting a semiconductor integrated circuit according to claim 2 of the present invention, the process of calculating the fluctuation tendency of the entire series of quiescent power supply current measurement data and the correction for canceling the fluctuation tendency with respect to the quiescent power supply current measurement data are performed. Applying quiescent power supply current corrected data and applying quiescent power supply current corrected data to calculate pass / fail judgment index and comparing it with pass / fail judgment standard value to judge pass / fail of semiconductor integrated circuit to be inspected Therefore, by calculating the fluctuation tendency of the entire IDDQ measurement value series and applying a correction that cancels the fluctuation tendency, the influence of the fluctuation tendency in the IDDQ measurement value series is reduced. The decrease in current component can be eliminated. For this reason, the detection accuracy of abnormal current is improved. Further, similarly to the first aspect, it is possible to avoid a situation where what is supposed to be the maximum value in the IDDQ measurement value is concealed in the fluctuation tendency.

  According to the method for inspecting a semiconductor integrated circuit according to claim 3 of the present invention, the series of quiescent power supply current measurement data is divided into a partial series composed of a smaller number of quiescent power supply current measurement data than the total number of test patterns in the order of measurement. For each partial series of quiescent power supply current measurement data, the process of calculating the fluctuation tendency of the entire partial series, and the quiescent power supply current corrected data by applying correction that offsets the fluctuation tendency to the quiescent power supply current measurement data IDDQ, and a process of calculating a pass / fail judgment index using the quiescent power supply current corrected data and comparing with a pass / fail judgment standard value to determine pass / fail of the semiconductor integrated circuit to be inspected. By dividing the entire series of measurement values into partial series in the order of measurement, and calculating the fluctuation tendency of IDDQ measurement values for each partial series, and applying a correction to offset this More reduce the influence of variation trend in the sequence of IDDQ measurements can eliminate the decrease in the current component failure due more effectively. For this reason, the detection accuracy of abnormal current is further improved. Further, similarly to the first aspect, it is possible to further avoid a situation where what is supposed to be the maximum value in the IDDQ measurement value is concealed in the fluctuation tendency.

  According to a fourth aspect of the present invention, the process for calculating the fluctuation tendency of the entire partial series and the correction for canceling the fluctuation tendency are applied to one or more of the partial series of the static power supply current measurement data to obtain the corrected static power supply current corrected data. Since the calculation process is not performed and the quiescent power supply current measurement data is used as the quiescent power supply current corrected data as it is, the calculation of the fluctuation tendency of the IDDQ measurement value and the application of the correction for canceling this are avoided by the partial series. Thus, when the fluctuation tendency of the IDDQ measurement value is clarified by the prior evaluation, the time required for data processing can be reduced without reducing the detection accuracy of abnormal current. This is effective because it shortens the inspection time.

  According to the semiconductor integrated circuit inspection apparatus of the fifth aspect of the present invention, the number of times of measurement of the power supply current is counted, and when the count result reaches a predetermined number of times, the inspection for the pass / fail judgment index calculation apparatus is started or Since it has a counting device that instructs the calculation of the pass / fail judgment index based on the power supply current measurement data captured after the previous output of the pass / fail judgment index and initializes the counting result, the counting device counts the number of IDDQ measurements. The IDDQ measurement value series can be divided into partial series by instructing the calculation of the pass / fail judgment index with a smaller number of times than the total number of inspection patterns. For this reason, the influence of the fluctuation tendency of the IDDQ measurement value is reduced, and the detection accuracy of the abnormal current is improved.

  According to the semiconductor integrated circuit inspection apparatus of the sixth aspect of the present invention, the fluctuation tendency of the power supply current measurement data taken after the start of the inspection is calculated from the power supply current measurement apparatus, and the fluctuation tendency is calculated with respect to the power supply current measurement data. Since the data correction device that outputs the result of applying the correction for canceling as power supply current corrected data is provided, the fluctuation tendency of the IDDQ measurement value is calculated by this data correction device, and the correction for canceling this is applied. , The influence of fluctuation tendency of the IDDQ measurement value is reduced, and the detection accuracy of abnormal current is improved.

  According to the semiconductor integrated circuit inspection apparatus of the seventh aspect of the present invention, the fluctuation tendency of the power supply current measurement data fetched from the power supply current measurement apparatus is calculated, and the correction that cancels the fluctuation tendency with respect to the power supply current measurement data is performed. A data correction device that outputs the applied result as power supply current corrected data, and counts the number of times the power supply current is measured. When the count result reaches a predetermined number, the data correction device starts the inspection or the previous power supply Instructs calculation of fluctuation tendency and application of correction based on power supply current measurement data captured after current corrected data output, to start / stop inspection or after previous pass / fail judgment index output to the pass / fail judgment index calculation device Since it has a counting device that instructs the calculation of pass / fail judgment index based on the captured power supply current corrected data and initializes the counting result, the counting device The IDDQ measurement count is counted, the IDDQ measurement value fluctuation tendency is calculated with a smaller number than the total number of inspection patterns, and the application of correction for canceling the IDDQ measurement value is instructed. By applying the canceling correction, the IDDQ measurement value series is divided into partial series and the influence of fluctuation tendency of the IDDQ measurement values is reduced, so that the detection accuracy of abnormal current is improved.

  According to an eighth aspect of the present invention, the counting device does not instruct the data correction device to calculate the fluctuation tendency and to apply the correction even if the counting result reaches a predetermined number of times at a specific time set in advance. The data correction device does not calculate the fluctuation trend of the power supply current measurement data and does not perform the correction for offsetting the fluctuation tendency when there is no instruction to calculate the fluctuation trend and to apply the correction. Is output as power supply current corrected data as it is, by calculating the tendency of fluctuation of the IDDQ measurement value by the partial series and by operating the counting device and the data correction device so as to avoid the application of correction for canceling this. If the IDDQ measurement value fluctuation tendency is clarified by prior evaluation, the time required for data processing without deteriorating the detection accuracy of abnormal current It can be reduced. This is effective because it shortens the inspection time.

  A first embodiment of the present invention will be described with reference to FIG. FIG. 1 shows an inspection method for a semiconductor integrated circuit according to the first embodiment of the present invention.

  In this semiconductor integrated circuit inspection method, an inspection pattern is applied to a semiconductor integrated circuit to be inspected, the internal state of the semiconductor integrated circuit to be inspected is set, and then the semiconductor integrated circuit to be inspected is set to a stationary state. The process of obtaining a series of static power supply current measurement data corresponding to each of the test patterns by repeatedly performing the static power supply current measurement while sequentially switching the test patterns using the static power supply current measurement for measuring the power supply current, and the static power supply The process of dividing the current measurement data series into a partial series consisting of a smaller number of static power supply current measurement data than the total number of test patterns in the order of measurement, and a pass / fail judgment index using the static power supply current measurement data for each partial series And determining whether or not the semiconductor integrated circuit to be inspected is good or bad by comparing with a standard value for determining good or bad.

  In this case, in the graph in the figure, the horizontal axis is the number of the inspection pattern assigned according to the execution order, and in the present embodiment, it is from the first pattern to the 1000th pattern. On the other hand, the vertical axis represents IDDQ measurement values for each inspection pattern.

  The graph plots the IDDQ measurement values obtained from the first pattern to the 1000th pattern, and is a series of the first measurement value to the 1000th measurement value. The IDDQ measurement value is indicated by ♦ and includes the case where there is an abnormal current component. The case where there is no abnormality is indicated by ◇, and the difference between the two is an abnormal current component. When the IDDQ test is executed alone, or when the operation frequency of the IDDQ measurement target circuit is low in the test item immediately before the IDDQ test, as shown in FIG. It becomes a tendency.

  First, for the entire series of 1000 IDDQ measurement values, the first measurement value to the 10th measurement value are the first partial series, the 11th measurement value to the 20th measurement value are the second partial series,. The 991st measurement value to the 1000th measurement value are divided into 100th partial series, and so on, into 100 partial series consisting of 10 IDDQ measurement values.

  Next, a pass / fail determination index is calculated for each partial series. When the ΔIDDQ method that takes the difference between the maximum value and the minimum value is adopted as a pass / fail judgment index, first, in the first partial series of IDDQ measurement values, the maximum and minimum measurements from the first measurement value to the tenth measurement value A value is selected and the difference between them is taken as the first ΔIDDQ value. Subsequently, in the second partial series, the maximum and minimum measurement values are selected from the eleventh measurement value to the twentieth measurement value, and the difference between them is taken as the second ΔIDDQ value. Thereafter, the ΔIDDQ value can be calculated similarly from the third partial series to the 100th partial series, and the third ΔIDDQ value,..., The 100th ΔIDDQ value are obtained, respectively.

  The first ΔIDDQ value,..., The 100th ΔIDDQ value is compared with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected. It can be seen that the ratio of the abnormal current component is increased as compared with the case where the ΔIDDQ value is calculated by obtaining the maximum value and the minimum value in the entire IDDQ measurement value series.

  When dividing the entire IDDQ measurement value series into partial series, it is not necessary to include the same number of IDDQ measurement values in all partial series. For example, the same effect can be obtained by finely dividing a portion where the fluctuation tendency of the IDDQ measurement value is large and dividing a portion where the fluctuation tendency is small.

  In the above description, the entire series of IDDQ measurement values is once acquired and then divided into partial series and calculation of the pass / fail judgment index is described later. These data processing may be performed in parallel. That is, in the above example, each time 10 IDDQ measurement values are acquired, ΔIDDQ value is calculated, and each time, the pass / fail judgment of the semiconductor integrated circuit to be inspected is performed by comparing with the pass / fail judgment standard value. Is possible.

  A second embodiment of the present invention will be described with reference to FIG. FIG. 2 shows a method for inspecting a semiconductor integrated circuit according to the second embodiment of the present invention.

  This semiconductor integrated circuit inspection method uses quiescent power supply current measurement in the same manner as in the first embodiment, repeatedly performs quiescent power supply current measurement while sequentially switching the inspection pattern, and quiescent power supply current corresponding to each of the inspection patterns. The process of obtaining the measurement data series, the process of calculating the fluctuation tendency of the whole series of quiescent power supply current measurement data, and the quiescent power supply current corrected data by applying correction that offsets the fluctuation tendency to the quiescent power supply current measurement data And a step of calculating a pass / fail judgment index using the quiescent power supply current corrected data and comparing with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected.

  In the present embodiment, as shown in FIG. 2A, the first pattern to the 100th pattern are used as the inspection patterns.

  The graph plots the IDDQ measurement values obtained from the first pattern to the 100th pattern, and is a series of the first measurement value to the 100th measurement value. However, although 1000 inspection patterns were originally prepared and the IDDQ measurement value series as a whole consisted of the same number of IDDQ measurement values, it is assumed that only the first 100 patterns are implemented in order to shorten the inspection time. is doing. As in FIG. 1, the IDDQ measurement value is indicated by ♦ and includes the case where there is an abnormal current component. The case where there is no abnormality is indicated by ◇, and the difference between the two is an abnormal current component. When the operation frequency of the IDDQ measurement target circuit is high in the inspection item immediately before the IDDQ inspection, as shown in FIG. 2A, the IDDQ measurement value series tends to be flat and then flat. In the present embodiment, it is assumed that only the decreasing tendency is included in the first 100 patterns.

  First, a pass / fail determination index is calculated for the entire data series (first inspection pattern to 100th inspection pattern). When the ΔIDDQ method that takes the difference between the maximum value and the minimum value is adopted as the pass / fail judgment index, the maximum and minimum measurement values are selected from the first measurement value to the 100th measurement value, and the difference is taken to obtain ΔIDDQ A value is obtained. The ΔIDDQ value is compared with a pass / fail determination standard value to determine pass / fail of the semiconductor integrated circuit to be inspected.

  Here, consider a case where an abnormal current component due to a failure is small and appears only for a limited inspection pattern. Since the IDDQ measurement value including the abnormal current is not recognized as the maximum IDDQ measurement value in the partial series, the failure is overlooked.

  For the above problem, it is effective to perform a correction that cancels the fluctuation tendency of the IDDQ measurement value series. When applied to the entire data series of FIG. 2A, first, the fluctuation tendency is calculated from the first measurement value to the 100th measurement value plot. As an example, a straight line approximation is performed by the method of least squares, and the approximate straight line is set as a fluctuation tendency in the entire data series.

  Next, the approximate straight line is rotated around point A in FIG. 2B until it is parallel to the horizontal axis, and the fluctuation tendency is corrected. That is, the first measurement value to the 100th measurement value are moved in the vertical axis direction along with the rotation of the approximate line while maintaining the distance in the vertical axis direction from the approximate line, and the 100th corrected value is obtained from the first corrected data. Data is obtained. Here, in the explanatory diagram of the correction of the fluctuation tendency in FIG. 2B, the corrected data is represented by ◇ with hatching with respect to the original IDDQ measurement value (= data before correction).

  After the above operation, the largest and smallest data are selected from the first corrected data to the 100th corrected data, and the difference between them is taken as the ΔIDDQ value.

  In calculating the fluctuation tendency, a method other than the linear approximation by the least square method may be used.

  A third embodiment of the present invention will be described with reference to FIG. FIG. 3 shows an inspection method for a semiconductor integrated circuit according to the third embodiment of the present invention.

  This semiconductor integrated circuit inspection method uses quiescent power supply current measurement in the same manner as in the first embodiment, repeatedly performs quiescent power supply current measurement while sequentially switching the inspection pattern, and quiescent power supply current corresponding to each of the inspection patterns. The process of obtaining the measurement data series, the process of dividing the quiescent power supply current measurement data series into sub-sequences consisting of a smaller number of quiescent power supply current measurement data than the total number of test patterns in the measurement order, and the quiescent power supply current measurement data For each subseries, the process of calculating the fluctuation tendency of the entire subseries, the process of calculating the quiescent power supply current corrected data by applying the correction that offsets the fluctuation tendency to the quiescent power supply current measurement data, and the quiescent power supply current The process of calculating pass / fail judgment index using corrected data and comparing the result with the pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected Including the.

  In the present embodiment, as shown in FIG. 3A, the first pattern to the 1000th pattern are used as the inspection patterns.

  The graph plots the IDDQ measurement values obtained from the first pattern to the 1000th pattern, and is a series of the first measurement value to the 1000th measurement value. As in FIG. 1, the IDDQ measurement value is indicated by ♦ and includes the case where there is an abnormal current component. The case where there is no abnormality is indicated by ◇, and the difference between the two is an abnormal current component. When the operation frequency of the IDDQ measurement target circuit is high in the inspection item immediately before the IDDQ inspection, as shown in FIG. 3A, the IDDQ measurement value series tends to be flat and then flat.

  First, for the entire series of 1000 IDDQ measurement values, the first measurement value to the 10th measurement value are the first partial series, the 11th measurement value to the 20th measurement value are the second partial series,. The 991st measurement value to the 1000th measurement value are divided into 100th partial series, and so on, into 100 partial series consisting of 10 IDDQ measurement values.

  Next, a pass / fail determination index is calculated for each partial series. When the ΔIDDQ method that takes the difference between the maximum value and the minimum value is adopted as a pass / fail judgment index, first, in the first partial series of IDDQ measurement values, the maximum and minimum measurements from the first measurement value to the tenth measurement value A value is selected and the difference between them is taken as the first ΔIDDQ value. Subsequently, in the second partial series, the maximum and minimum measurement values are selected from the eleventh measurement value to the twentieth measurement value, and the difference between them is taken as the second ΔIDDQ value. Thereafter, the ΔIDDQ value can be calculated similarly from the third partial series to the 100th partial series, and the third ΔIDDQ value,..., The 100th ΔIDDQ value are obtained, respectively.

  The first ΔIDDQ value,..., The 100th ΔIDDQ value is compared with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected.

  Here, consider a case where an abnormal current component due to a failure is small and appears only for a limited inspection pattern. Since the IDDQ measurement value including the abnormal current is not recognized as the maximum IDDQ measurement value in the partial series, the failure is overlooked.

  For the above problem, it is effective to perform a correction that cancels the fluctuation tendency of the IDDQ measurement value series. When applied to the first partial series of FIG. 3A, first, the fluctuation tendency is calculated for the plots of the first measurement value to the tenth measurement value. As an example, linear approximation is performed by the method of least squares, and the approximate straight line is set as a variation tendency in the first partial series.

  Next, the approximate straight line is rotated around point A in FIG. 3B until it is parallel to the horizontal axis, and the fluctuation tendency is corrected. That is, the first measurement value to the tenth measurement value are moved in the vertical axis direction along with the rotation of the approximate line while maintaining the distance in the vertical axis direction from the approximate line, and the tenth corrected value is obtained from the first corrected data. Data is obtained. Here, in the explanatory diagram of the correction of the fluctuation tendency in FIG. 3B, the corrected data is represented by ◇ with hatching with respect to the original IDDQ measurement value (= data before correction).

  After the above operation, the largest and smallest data are selected from the first corrected data to the tenth corrected data, and the difference between them is taken as the first ΔIDDQ value. ΔIDDQ values of other partial series can be calculated by the same operation.

  When dividing the entire IDDQ measurement value series into partial series, it is not necessary to include the same number of IDDQ measurement values in all partial series. In calculating the fluctuation tendency, a method other than the linear approximation by the least square method may be used.

  Further, in the above description, the entire IDDQ measurement value series is acquired once, and later divided into partial series, calculation of fluctuation tendency and correction for canceling this, and calculation of pass / fail judgment index are performed. Although described as above, acquisition of IDDQ measurement values and subsequent data processing may be performed in parallel. That is, in the above example, every time 10 IDDQ measurement values are acquired, the fluctuation tendency is calculated, the correction is performed, and the ΔIDDQ value is calculated and compared with the pass / fail judgment standard value each time. It is also possible to determine whether the semiconductor integrated circuit is good or bad.

  By the way, if it is known in advance that the fluctuation tendency is small in the partial series, it is set in advance so as to avoid the calculation of the fluctuation tendency in the partial series and the application of correction to cancel this. May be. In this case, since the time required for various calculations is reduced, the inspection time is shortened.

  A fourth embodiment of the present invention will be described with reference to FIG. FIG. 4 is a block diagram showing a semiconductor integrated circuit inspection apparatus according to the fourth embodiment of the present invention. The inspection apparatus can be used for the inspection method of the first embodiment.

  The inspection apparatus 100 illustrated in FIG. 4 includes an inspection pattern application apparatus 110, a power supply current measurement apparatus 120, a quality determination index calculation apparatus 140, a quality determination index apparatus 150, a counting apparatus 160, and a control apparatus 170.

  The inspection pattern application device 110 applies the inspection pattern 111 to the semiconductor integrated circuit 190 to be inspected according to the inspection pattern control signal 171 from the control device 170. The inspection pattern 111 includes a data pattern for setting the internal state of the semiconductor integrated circuit 190 and a mode setting pattern including IDDQ measurement mode setting.

  The power supply current measuring device 120 is arranged on a path through which the power supply 121 supplies power supply current to the semiconductor integrated circuit 190 to be inspected, and the power supply current of the semiconductor integrated circuit 190 to be inspected according to the current measurement instruction signal 172 from the control device 170. Measure. The measurement result is output as power supply current measurement data 122 corresponding to the inspection pattern 111.

  The pass / fail determination index calculation device 140 captures and stores the power supply current measurement data 122 according to the data capture instruction signal 173 from the control device 170. Further, according to the pass / fail judgment index calculation instruction signal 165 from the counting device 160, the pass / fail judgment index 141 is calculated and output using the stored power source current measurement data 122.

  The pass / fail judgment device 150 takes the pass / fail judgment index 141, compares it with the pass / fail judgment standard value stored therein, judges pass / fail of the semiconductor integrated circuit 190 to be inspected, and outputs a pass / fail judgment result 151.

  The counting device 160 is initialized prior to the IDDQ inspection, and counts the current measurement instruction signal 172 from the control device 170 after the start of the IDDQ inspection. When the count result reaches a predetermined number of times, a pass / fail judgment index calculation instruction signal 165 is output corresponding to the current measurement instruction signal 172. After outputting the pass / fail determination index calculation instruction signal 165, the counting device 160 initializes the counting result.

  The control device 170 controls the inspection pattern application device 110 regarding the application, holding, and selection of the inspection pattern 111, instructs the power supply current measurement device 120 to perform power supply current measurement, and instructs the pass / fail judgment index calculation device 140. And instruct to take in the power supply current measurement data 122.

Based on the operation of each device described above, the operation of the control device 170 and the IDDQ inspection by the inspection device 100 will be described. Hereinafter, 1000 patterns are prepared as inspection patterns, and the predetermined number of counting results in the counting device 160 is 10.
(1) Prior to the start of inspection, the counting device 160 initializes the counting result.
(2) The control device 170 causes the inspection pattern application device 110 to start outputting the inspection pattern through the inspection pattern control signal 171. When the setting of the internal state of the semiconductor integrated circuit 190 using the inspection pattern is completed, the semiconductor integrated circuit 190 is set to the IDDQ measurement mode.
(3) The control device 170 outputs a current measurement instruction signal 172. The power supply current measuring device 120 receives the current measurement instruction signal 172, performs IDDQ measurement, and outputs the measurement result as power supply current measurement data 122. Subsequently, the control device 170 outputs a data capture instruction signal 173. The quality determination index calculation device 140 receives and stores the power supply current measurement data 122 in response to the data acquisition instruction signal 173.
(4) The counting device 160 receives the current measurement instruction signal 172 and increases the counting result by 1. However, the counting device 160 does nothing because the counting result has not reached the predetermined number of times.
(5) If (2) to (4) are repeated eight times, nine IDDQ measurement values are stored in the pass / fail judgment index calculation device 140, and the count result of the counting device 160 is nine.
(6) When steps (2) to (3) are repeated once, the quality determination index calculation device 140 is in a state where ten IDDQ measurement values are stored. The counting device 160 receives the current measurement instruction signal 172, increases the count result by 1, and reaches a predetermined number of 10 and outputs a pass / fail judgment index calculation instruction signal 165. The quality determination index calculation device 140 receives the quality determination index calculation instruction signal 165, calculates a quality determination index, and outputs the result.
(7) The pass / fail judgment device 150 takes the pass / fail judgment index 141, makes a pass / fail judgment by comparing with the pass / fail judgment standard value stored therein, and outputs the result.
(8) The counting device 160 initializes the counting result.
(9) Repeating (2) to (8) 100 times completes the IDDQ inspection for 1000 patterns.

  A fifth embodiment of the present invention will be described with reference to FIG. FIG. 5 is a block diagram showing a semiconductor integrated circuit inspection apparatus according to the fifth embodiment of the present invention. The inspection apparatus can be used for the inspection method of the second embodiment.

  The inspection apparatus 200 shown in FIG. 5 includes an inspection pattern application apparatus 210, a power supply current measurement apparatus 220, a data correction apparatus 230, a pass / fail determination index calculation apparatus 240, a pass / fail determination apparatus 250, and a control apparatus 270.

  The inspection pattern application device 210 applies the inspection pattern 211 to the semiconductor integrated circuit 290 to be inspected according to the inspection pattern control signal 271 from the control device 270. The inspection pattern 211 includes a data pattern for setting the internal state of the semiconductor integrated circuit 290 and a mode setting pattern including IDDQ measurement mode setting.

  The power supply current measuring device 220 is arranged on a path through which the power supply 221 supplies power supply current to the semiconductor integrated circuit 290 to be inspected, and the power supply current of the semiconductor integrated circuit 290 to be inspected according to the current measurement instruction signal 272 from the control device 270. Measure. The measurement result is output as power supply current measurement data 222 corresponding to the inspection pattern 211.

  The data correction device 230 captures and stores the power supply current measurement data 222 according to the data capture instruction signal 273 from the control device 270. Further, a fluctuation tendency of the stored power supply current measurement data 222 is calculated in accordance with the data correction instruction signal 274 from the control device 270, and correction for canceling the fluctuation tendency is applied. The correction application result is output as power supply current corrected data 231.

  The pass / fail determination index calculation device 240 fetches and stores the power source current corrected data 231 in accordance with the pass / fail determination index calculation instruction signal 275 from the control device 270. Next, the pass / fail judgment index 241 is calculated and output using the stored power source current corrected data 231.

  The pass / fail judgment device 250 takes the pass / fail judgment index 241, compares it with the pass / fail judgment standard value stored therein, performs pass / fail judgment of the semiconductor integrated circuit 290 to be inspected, and outputs a pass / fail judgment result 251.

  The control device 270 controls the inspection pattern application device 210 to apply, hold, and select the inspection pattern 211, instructs the power supply current measurement device 220 to perform power supply current measurement, and supplies the power to the data correction device 230. After instructing the acquisition of the current measurement data 222 and obtaining the power supply current measurement data 222 corresponding to all of the test patterns 111, the data correction device 230 is instructed to calculate the fluctuation tendency and apply the correction. The determination index calculation device 240 is instructed to calculate a pass / fail determination index.

Based on the operation of each device described above, the operation of the control device 270 and the IDDQ inspection by the inspection device 200 will be described. Hereinafter, it is assumed that 100 patterns are prepared as inspection patterns.
(1) The control device 270 causes the inspection pattern application device 210 to start outputting the inspection pattern through the inspection pattern control signal 271. When the internal state setting of the semiconductor integrated circuit 290 by the inspection pattern is completed, the semiconductor integrated circuit 290 is set to the IDDQ measurement mode.
(2) The control device 270 outputs a current measurement instruction signal 272. The power supply current measuring device 220 receives the current measurement instruction signal 272, performs IDDQ measurement, and outputs the measurement result as power supply current measurement data 222. Subsequently, the control device 270 outputs a data capture instruction signal 273. The data correction device 230 receives the data capture instruction signal 273 and captures and stores the power supply current measurement data 222.
(3) If (1) and (2) are repeated 99 times, the data correction device 230 is in a state where 100 IDDQ measurement values are stored.
(4) The control device 270 outputs the data correction instruction signal 274 because execution of all 100 test patterns has been completed. The data correction device 230 receives the data correction instruction signal 274, calculates the fluctuation tendency of the stored power supply current measurement data 222, and applies correction for canceling this. The correction application result is output as power supply current corrected data 231.
(5) The control device 270 outputs a pass / fail determination index calculation instruction signal 275. In response to the pass / fail determination index calculation instruction signal 275, the pass / fail determination index calculation device 240 captures and stores the power source current corrected data 231. Subsequently, the pass / fail judgment index 241 is calculated using the stored power source current corrected data 231 and the result is output.
(6) The pass / fail judgment device 250 takes the pass / fail judgment index 241, compares with a pass / fail judgment standard value stored therein, and performs pass / fail judgment, and outputs the result. Thus, 100 patterns of IDDQ inspection are completed.

  In the present embodiment, the various instruction signals have been described as separate signals. However, the inspection apparatus may be configured by combining a plurality of instruction signals as one signal.

  A sixth embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing a semiconductor integrated circuit inspection apparatus according to the sixth embodiment of the present invention. This inspection apparatus can be used for the inspection method of the third embodiment.

  The inspection apparatus 300 illustrated in FIG. 6 includes an inspection pattern application apparatus 310, a power supply current measurement apparatus 320, a data correction apparatus 330, a quality determination index calculation apparatus 340, a quality determination index apparatus 350, a counting apparatus 360, and a control apparatus 370. The

  The inspection pattern application device 310 applies the inspection pattern 311 to the semiconductor integrated circuit 390 to be inspected according to the inspection pattern control signal 371 from the control device 370. The inspection pattern 311 includes a data pattern for setting the internal state of the semiconductor integrated circuit 390 and a mode setting pattern including IDDQ measurement mode setting.

  The power supply current measuring device 320 is disposed on a path through which the power supply 321 supplies power supply current to the semiconductor integrated circuit 390 to be inspected, and the power supply current of the semiconductor integrated circuit 390 to be inspected according to the current measurement instruction signal 372 from the control device 370. Measure. The measurement result is output as power supply current measurement data 322 corresponding to the inspection pattern 311.

  The data correction device 330 captures and stores the power supply current measurement data 322 according to the data capture instruction signal 373 from the control device 370. Further, the fluctuation tendency of the stored power source current measurement data 322 is calculated according to the data correction instruction signal 364 from the counting device 360, and correction for canceling the fluctuation tendency is applied. The correction application result is output as power supply current corrected data 331.

  The pass / fail determination index calculation device 340 fetches and stores the power source current corrected data 331 in accordance with the pass / fail determination index calculation instruction signal 365 from the counting device 360. Next, the pass / fail judgment index 341 is calculated and output using the stored power source current corrected data 331.

  The pass / fail judgment device 350 takes the pass / fail judgment index 341, compares it with the pass / fail judgment standard value stored therein, judges the pass / fail of the semiconductor integrated circuit 390 to be inspected, and outputs a pass / fail judgment result 351.

  The counting device 360 is initialized prior to the IDDQ test, and counts the current measurement instruction signal 372 from the control device 370 after the start of the IDDQ test. When the count result reaches a predetermined number of times, a pass / fail judgment index calculation instruction signal 365 is output corresponding to the current measurement instruction signal 372. After outputting the pass / fail determination index calculation instruction signal 365, the counting device 360 initializes the counting result.

  The control device 370 controls the inspection pattern application device 310 regarding application, holding, and selection of the inspection pattern, instructs the power supply current measurement device 320 to perform power supply current measurement, and instructs the data correction device 330 to supply power current. Instructs the acquisition of the measurement data 322.

Based on the operation of each device described above, the operation of the control device 370 and the IDDQ inspection by the inspection device 300 will be described. Hereinafter, 1000 patterns are prepared as inspection patterns, and the predetermined number of counting results in the counting device 360 is 10.
(1) Prior to the start of inspection, the counting device 360 initializes the counting result.
(2) The control device 370 causes the inspection pattern application device 310 to start outputting the inspection pattern through the inspection pattern control signal 371. When the setting of the internal state of the semiconductor integrated circuit 390 using the inspection pattern is completed, the semiconductor integrated circuit 390 is set to the IDDQ measurement mode.
(3) The control device 370 outputs a current measurement instruction signal 372. The power supply current measuring device 320 receives the current measurement instruction signal 372, performs IDDQ measurement, and outputs the measurement result as power supply current measurement data 322. Subsequently, the control device 370 outputs a data capture instruction signal 373. The data correction device 330 receives the data capture instruction signal 373 and captures and stores the power supply current measurement data 322.
(4) The counting device 360 receives the current measurement instruction signal 372 and increases the counting result by 1, but does nothing because the counting result has not reached the predetermined number of times.
(5) When (2) to (4) are repeated eight times, the counting result of the counting device 360 is 9, and the data correction device 330 is in a state where nine IDDQ measurement values are stored.
(6) When (2) to (3) are repeated once, the data correction device 330 is in a state where ten IDDQ measurement values are stored. The counting device 360 receives the current measurement instruction signal 372, increases the count result by 1, and reaches a predetermined number of 10 and outputs a data correction instruction signal 364. The data correction device 330 receives the data correction instruction signal 364, calculates the fluctuation tendency of the stored power supply current measurement data 322, and applies correction for canceling this. The correction application result is output as power supply current corrected data 331.
(7) The counting device 360 outputs a pass / fail determination index calculation instruction signal 365. The pass / fail judgment index calculation device 340 receives the pass / fail judgment index calculation instruction signal 365 and takes in and stores the power source current corrected data 331. Subsequently, the pass / fail judgment index 341 is calculated using the stored power source current corrected data 331, and the result is output.
(8) The pass / fail judgment device 350 takes the pass / fail judgment index 341, makes a pass / fail judgment by comparing with a pass / fail judgment standard value stored therein, and outputs the result.
(9) The counting device 360 initializes the counting result.
(10) Repeating (2) to (9) 100 times completes the IDDQ inspection for 1000 patterns.

  In the present embodiment, the various instruction signals have been described as separate signals. However, the inspection apparatus may be configured by combining a plurality of instruction signals as one signal.

  By the way, for a partial series whose fluctuation tendency is known to be small in the partial series, calculation of the fluctuation tendency in the partial series and application of correction for offsetting the fluctuation tendency may be avoided.

  In this case, the counting device 360 has a function of counting the number of times that the counting result reaches a predetermined number of times, and calculates the tendency of fluctuation of the IDDQ measurement value and the application of the subsequence that should avoid the application of correction to cancel this. Information is stored in advance. Then, every time the counting result reaches a predetermined number of times, it is determined whether or not to calculate the fluctuation tendency of the IDDQ measurement value and to apply a correction that cancels the calculation.

  When the data correction instruction signal 364 is not output, the data correction device 330 outputs the stored power supply current measurement data 322 as the power supply current corrected data 331 as it is.

  When calculation of the fluctuation tendency of the IDDQ measurement value and application of correction for canceling this are avoided, the data correction instruction signal 364 is not output in (6) in the above description. Therefore, the data correction device 330 outputs the stored power supply current measurement data 322 as the power supply current corrected data 331 as it is.

  In the partial series in which the fluctuation tendency of the IDDQ measurement value is small, the time required for various calculations and the like is reduced without lowering the detection accuracy of abnormal current, leading to a reduction in inspection time.

  The semiconductor integrated circuit inspection method and inspection apparatus according to the present invention can reduce the influence of fluctuation tendency in a series of IDDQ measurement values and can improve the decrease in current component caused by a failure, so that the detection accuracy of abnormal current is improved. It is effective and is useful as a semiconductor integrated circuit inspection method and inspection apparatus using IDDQ.

It is explanatory drawing regarding the division | segmentation into the partial series of the IDDQ measured value concerning the 1st Embodiment of this invention. It is explanatory drawing regarding calculation of the fluctuation tendency of IDDQ measurement value concerning the 2nd Embodiment of this invention, and application of data correction. It is explanatory drawing regarding the division | segmentation into the partial series of the IDDQ measurement value concerning the 3rd Embodiment of this invention, calculation of the fluctuation tendency of the IDDQ measurement value in a partial series, and application of data correction. It is a block diagram which shows the structural example for performing the division | segmentation into the partial series of the IDDQ measured value concerning the 4th Embodiment of this invention. It is explanatory drawing regarding calculation of the fluctuation tendency of IDDQ measurement value concerning the 5th Embodiment of this invention, and application of data correction. FIG. 11 is a block diagram illustrating a configuration example for dividing an IDDQ measurement value into partial series according to the sixth embodiment of the present invention, calculating a fluctuation tendency of an IDDQ measurement value within the partial series, and applying data correction; FIG. It is a block diagram which shows the structural example of the test | inspection apparatus for performing the IDDQ test | inspection by the conventional (DELTA) IDDQ method or Current Ratio method. It is a figure which shows the case where the fluctuation tendency of an IDDQ measurement value series and an abnormal current are not recognized.

Explanation of symbols

100, 200, 300, 400 Inspection device 110, 210, 310, 410 Inspection pattern application device 111, 211, 311, 411 Inspection pattern 120, 220, 320, 420 Power supply current measurement device 121, 221, 321, 421 Power supply 122, 222, 322, 422 Power supply current measurement data 230, 330 Data correction device 231, 331 Power supply current corrected data 140, 240, 340, 440 Pass / fail judgment index calculation device 141, 241, 341, 441 Pass / fail judgment index 150, 250, 350 , 450 Pass / fail judgment device 151, 251, 351, 451 Pass / fail judgment result 160, 360 Counting device 364 Data correction instruction signal 165, 365 Pass / fail judgment index calculation instruction signal 170, 270, 370, 470 Controller 171, 271, 371 71 Inspection pattern control signal 172,272,372,472 Current measurement instruction signal 173,273,373,473 Data acquisition instruction signal 274 Data correction instruction signal 275,475 Pass / fail judgment index calculation instruction signal 190, 290, 390, 490 Inspection object Semiconductor integrated circuit

Claims (8)

A test pattern is applied to a semiconductor integrated circuit to be inspected, and after setting the internal state of the semiconductor integrated circuit to be inspected, the semiconductor integrated circuit to be inspected is set to a static state and a power supply current is measured A method for inspecting a semiconductor integrated circuit using power supply current measurement,
Repeatedly performing the quiescent power supply current measurement while sequentially switching the inspection patterns to obtain a series of quiescent power supply current measurement data corresponding to each of the inspection patterns;
Dividing the series of the quiescent power supply current measurement data into a partial series of the quiescent power supply current measurement data having a number smaller than the total number of the inspection patterns in the order of measurement;
A semiconductor integrated circuit including a step of calculating a pass / fail judgment index using the quiescent power supply current measurement data for each of the partial series and comparing with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected Circuit inspection method. A test pattern is applied to a semiconductor integrated circuit to be inspected, and after setting the internal state of the semiconductor integrated circuit to be inspected, the semiconductor integrated circuit to be inspected is set to a static state and a power supply current is measured A method for inspecting a semiconductor integrated circuit using power supply current measurement,
Repeatedly performing the quiescent power supply current measurement while sequentially switching the inspection patterns to obtain a series of quiescent power supply current measurement data corresponding to each of the inspection patterns;
Calculating a variation tendency of the entire series of the quiescent power supply current measurement data;
Applying a correction that offsets the fluctuation tendency to the quiescent power supply current measurement data to calculate quiescent power supply current corrected data;
A method for testing a semiconductor integrated circuit, comprising: calculating a pass / fail judgment index using the quiescent power supply current corrected data and comparing the result with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected. A test pattern is applied to a semiconductor integrated circuit to be inspected, and after setting the internal state of the semiconductor integrated circuit to be inspected, the semiconductor integrated circuit to be inspected is set to a static state and a power supply current is measured A method for inspecting a semiconductor integrated circuit using power supply current measurement,
Repeatedly performing the quiescent power supply current measurement while sequentially switching the inspection patterns to obtain a series of quiescent power supply current measurement data corresponding to each of the inspection patterns;
Dividing the series of the quiescent power supply current measurement data into a partial series of the quiescent power supply current measurement data having a number smaller than the total number of the inspection patterns in the order of measurement;
For each partial series of the quiescent power supply current measurement data, calculating a fluctuation tendency of the entire partial series;
Applying a correction that offsets the fluctuation tendency to the quiescent power supply current measurement data to calculate quiescent power supply current corrected data;
A method for testing a semiconductor integrated circuit, comprising: calculating a pass / fail judgment index using the quiescent power supply current corrected data and comparing the result with a pass / fail judgment standard value to judge pass / fail of the semiconductor integrated circuit to be inspected.   In one or more of the partial series of the quiescent power supply current measurement data, the process of calculating the fluctuation tendency of the entire partial series, and the correction of offsetting the fluctuation tendency is applied to correct the quiescent power supply current 4. The method for inspecting a semiconductor integrated circuit according to claim 3, wherein the process of calculating data is not performed and the static power supply current measurement data is used as the static power supply current corrected data as it is. An inspection pattern application apparatus for applying an inspection pattern for setting an internal state to a semiconductor integrated circuit to be inspected;
A power supply current measuring device for measuring a power supply current of the semiconductor integrated circuit to be inspected and outputting power supply current measurement data corresponding to the inspection pattern;
A pass / fail judgment index calculation device that calculates and outputs a pass / fail judgment index using the power source current measurement data captured from the power source current measurement device;
A pass / fail judgment device that compares the pass / fail judgment index with a pass / fail judgment standard value, performs pass / fail judgment of the semiconductor integrated circuit to be inspected, and outputs a pass / fail judgment result;
Counting the number of times of measurement of the power supply current, and when the count result reaches a predetermined number of times, the power supply current measurement taken after the start of inspection or the output of the quality determination index last time for the quality determination index calculation device A counting device for instructing calculation of the pass / fail judgment index based on data and initializing the counting result;
The test pattern application device is controlled to apply, hold, and select a test pattern, instructs the power supply current measurement device to perform power supply current measurement, and the pass / fail judgment index calculation device supplies the power supply current measurement data. And a control device for instructing to take in the semiconductor integrated circuit. An inspection pattern application device for applying an inspection pattern to a semiconductor integrated circuit to be inspected;
A power supply current measuring device for measuring a power supply current of the semiconductor integrated circuit to be inspected and outputting power supply current measurement data corresponding to the inspection pattern;
The fluctuation trend of the power supply current measurement data taken after the start of inspection from the power supply current measurement device is calculated, and the result of applying the correction that offsets the fluctuation tendency to the power supply current measurement data is the power supply current corrected data A data correction device to output;
A pass / fail judgment index calculating device that calculates and outputs a pass / fail judgment index using the power source current corrected data;
A pass / fail judgment device that compares the pass / fail judgment index with a pass / fail judgment standard value, performs pass / fail judgment of the semiconductor integrated circuit to be inspected, and outputs a pass / fail judgment result;
The test pattern application device is controlled to apply, hold, and select a test pattern, instructs the power supply current measurement device to perform power supply current measurement, and the data correction device loads the power supply current measurement data. After the power supply current measurement data corresponding to all of the inspection patterns is obtained, the data correction device is instructed to calculate the fluctuation tendency and to apply the correction, and to calculate the pass / fail judgment index. A semiconductor integrated circuit inspection device comprising: a control device that instructs the device to calculate the pass / fail determination index. An inspection pattern application device for applying an inspection pattern to a semiconductor integrated circuit to be inspected;
A power supply current measuring device for measuring a power supply current of the semiconductor integrated circuit to be inspected and outputting power supply current measurement data corresponding to the inspection pattern;
Data correction for calculating a fluctuation tendency of the power supply current measurement data fetched from the power supply current measuring apparatus and outputting a result of applying a correction for canceling the fluctuation tendency to the power supply current measurement data as power supply current corrected data Equipment,
A pass / fail judgment index calculating device that calculates and outputs a pass / fail judgment index using the power source current corrected data;
A pass / fail judgment device that compares the pass / fail judgment index with a pass / fail judgment standard value, performs pass / fail judgment of the semiconductor integrated circuit to be inspected, and outputs a pass / fail judgment result;
Counts the number of power supply current measurements. When the count reaches a predetermined number of times, the data correction device receives the power supply current measurement data captured after the start of inspection or the last power supply current corrected data output. Based on the power supply current corrected data fetched after the start of inspection or the previous pass / fail judgment index output to the pass / fail judgment index calculation device, instructing the calculation of the fluctuation tendency and the application of the correction based on A counting device for instructing calculation of the pass / fail judgment index and initializing the counting result;
The test pattern application device is controlled to apply, hold, and select a test pattern, instructs the power supply current measurement device to perform power supply current measurement, and the data correction device loads the power supply current measurement data. And a control device for instructing the semiconductor integrated circuit. The counting device does not instruct the data correction device to calculate the fluctuation tendency and to apply the correction to the data correction device even if the counting result reaches a predetermined number of times at a preset specific time. ,
The data correction device does not perform the calculation of the fluctuation tendency and the calculation of the fluctuation tendency of the power supply current measurement data and the correction for offsetting the fluctuation tendency when there is no instruction to apply the correction. 8. The semiconductor integrated circuit inspection apparatus according to claim 7, wherein the power supply current measurement data is directly output as the power supply current corrected data.

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