JPH04312961A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPH04312961A
JPH04312961A JP2849891A JP2849891A JPH04312961A JP H04312961 A JPH04312961 A JP H04312961A JP 2849891 A JP2849891 A JP 2849891A JP 2849891 A JP2849891 A JP 2849891A JP H04312961 A JPH04312961 A JP H04312961A
Authority
JP
Japan
Prior art keywords
integrated circuit
line
pads
land
inspection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2849891A
Other languages
Japanese (ja)
Other versions
JP2638318B2 (en
Inventor
Masami Senda
千田 政美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3028498A priority Critical patent/JP2638318B2/en
Publication of JPH04312961A publication Critical patent/JPH04312961A/en
Application granted granted Critical
Publication of JP2638318B2 publication Critical patent/JP2638318B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To increase a mount density of components and to facilitate an inspection by specifying the width of a line for coupling an inspection pad disposed at a 2.54mm lattice to a pad for connecting an integrated circuit, a minimum interval of the circuits, and a rectangular area including lands, and the pads. CONSTITUTION:A printed circuit board for mounting a surface mount type integrated circuit having 80 pins with 0.5mm of a terminal pitch and having a line 2 less than 0.25mm of a line width, has inspection lands 3 disposed on a 2.54mm lattice near the pins of the integrated circuit. A pattern in which the width of the line 2 for coupling the land 3 to a pad 1 for connecting the land 3 to the integrated circuit is 0.25mm, the minimum interval of the circuits is 0.25mm, and an area of a rectangle including the land, the line, and the pads is 10.90cm<2> or less, is provided. Here, the twenty pads 1 are aligned at upper, lower, right and left sides at a reference point 4 as a center, and a pitch between the pads is 0.5mm.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、表面実装型集積回路を
搭載する印刷配線板に関し、特に集積回路接続用パッド
から検査用ランドの占有する面積内の回路パターンに関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board on which a surface-mounted integrated circuit is mounted, and more particularly to a circuit pattern within an area occupied by a testing land from an integrated circuit connection pad.

【0002】0002

【従来の技術】従来、この種の表面実装型集積回路の搭
載に用いられる印刷配線板は、図2に示されるように絶
縁層5上に集積回路接続用パッド1と検査用ランド3を
決められた設計基準に従ってランド2で接続して形成し
ていた。
2. Description of the Related Art Conventionally, printed wiring boards used for mounting surface-mounted integrated circuits of this type have integrated circuit connection pads 1 and test lands 3 on an insulating layer 5, as shown in FIG. They were formed by connecting with land 2 in accordance with the established design standards.

【0003】0003

【発明が解決しようとする課題】上述した従来の印刷配
線板には、次のような欠点があった。
The conventional printed wiring board described above has the following drawbacks.

【0004】(1)検査用ランド3を2.54mm格子
にのせると、集積回路接続用パッド1から検査用ランド
3までの距離が長いため、印刷配線板1枚の中で占有す
る面積が大きく部品の実装密度が上がらない。また面積
を小さくするため検査用ランドを2.54mm格子から
外すと汎用布線検査機を使用することができないため、
検査コストが上がる。
(1) When the test land 3 is placed on a 2.54 mm grid, the area occupied on one printed wiring board is reduced because the distance from the integrated circuit connection pad 1 to the test land 3 is long. The mounting density of components cannot be increased significantly. Also, if the inspection land is removed from the 2.54mm grid in order to reduce the area, a general-purpose wiring inspection machine cannot be used.
Inspection costs will increase.

【0005】(2)ライン2の幅は設計基準の制約を受
ける他の信号ラインと同じ細い幅で(例えば0.13m
m)で形成されているため、歩留りも悪く集積回路接続
用パッド1と検査用ランドの間も布線検査を行う必要が
ある。
(2) The width of line 2 is the same narrow width as other signal lines subject to design standards (for example, 0.13 m).
m), the yield is poor and it is necessary to perform a wiring inspection between the integrated circuit connection pad 1 and the inspection land as well.

【0006】本発明の目的は、このような欠点を除去し
、部品の実装密度を上げかつ検査の適用を容易にした印
刷配線板を提供することにある。
[0006] An object of the present invention is to provide a printed wiring board that eliminates these drawbacks, increases the mounting density of components, and facilitates inspection.

【0007】[0007]

【課題を解決するための手段】本発明の構成は、端子ピ
ッチを0.5mmとした80ピンの表面実装型集積回路
を実装し、ライン幅0.25mm未満のラインを有する
印刷配線板において、前記集積回路の各ピン近くに2.
54mm格子に配置された検査用ランドを有し、これら
ランドと集積回路接続用パッドとを結ぶラインの幅が0
.25mm、これらの回路の最小間隙が0.25mmあ
り、前記ランド,ライン,パッドを含む矩形の面積が1
6.52cm2 以下となるパターンを有することを特
徴とする。
[Means for Solving the Problems] The present invention provides a printed wiring board that mounts an 80-pin surface mount integrated circuit with a terminal pitch of 0.5 mm and has lines with a line width of less than 0.25 mm. 2. near each pin of the integrated circuit;
It has test lands arranged in a 54 mm grid, and the width of the line connecting these lands and the integrated circuit connection pads is 0.
.. 25mm, the minimum gap between these circuits is 0.25mm, and the rectangular area including the land, line, and pad is 1.
It is characterized by having a pattern of 6.52 cm2 or less.

【0008】[0008]

【実施例】図1は本発明の一実施例の平面図である。集
積回路接続用パッド1は基準点4を中心として上下左右
それぞれ20個ずつ並び、パッド間ピッチは0.5mm
である。2.54mm格子上にのる検査用ランド3は集
積回路接続用パッド1の外形に位置し、それぞれ2列に
並んでいる。ライン2は、検査用ランド3と集積回路接
続用パッド1とを接続し、ライン2の始点は集積回路接
続用パッドの中心であり、その終点は検査用ランド3の
中心である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a plan view of an embodiment of the present invention. The integrated circuit connection pads 1 are arranged in rows of 20 on each side around the reference point 4, and the pitch between the pads is 0.5 mm.
It is. The test lands 3 on the 2.54 mm grid are located in the outer shape of the integrated circuit connection pads 1, and are arranged in two rows. The line 2 connects the test land 3 and the integrated circuit connection pad 1, the starting point of the line 2 is the center of the integrated circuit connection pad, and the end point is the center of the test land 3.

【0009】本実施例の基準点4を座標値(0,0)の
原点とした時の始点,屈曲点,終点の座標値は次のとお
りである。
When the reference point 4 of this embodiment is taken as the origin of coordinate values (0,0), the coordinate values of the starting point, bending point, and ending point are as follows.

【0010】ここで、(,)は始点、[,]は屈曲点、
{,}は終点を表わし、各数字の単位はミリメートルで
ある。 ・(−4.750,  6.850)[−11.430
,13.653]  [−4.750,  8.073
]{−11.430,13.970}・(−4.250
,  6.850)[−10.414,15.494]
  [−10.414,13.970][−10.16
0,13.653]  [−4.250,  8.58
6]{−11.430,16.510}・(−3.75
0,  6.850)[−8.890,13.653]
  [−3.750,  9.100]{−8.890
,13.970}・(−3.250,  6.850)
[−7.874,15.494]  [−7.874,
13.970][−7.620,13.653]  [
−3.250,  9.613]{−8.890,16
.510}・(−2.750    6.850)[−
6.350,13.653]  [−2.750,10
.126]{−6.350,13.970}・(−2.
250,  6.850)[−5.334,15.49
4]  [−5.334,13.970][−5.08
0,13.653]  [−2.250,10.693
]{−6.350,16.510}・(−1.750,
  6.850)[−3.810,13.653]  
[−1.750,11.152]{−3.810,13
.970}・(−1.250,  6.850)[−2
.794,15.494]  [−2.794,13.
970][−2.540,13.653]  [−1.
250,11.665]{−3.810,16.510
}・(−0.750,  6.850)[−1.270
,13.653]  [−0.750,12.175]
{−1.270,13.970}・(−0.250, 
 6.850)[−0.254,15.494]  [
−0.254,13.970][−0.250,12.
707]  {−1.270,16.510} ・(  0.250,  6.850)[  1.27
0,13.653]  [  0.250,12.69
6]{  1.270,13.970}・(  0.7
50,  6.850)[  2.286,15.49
4]  [  2.286,13.970][  2.
540,13.653]  [  0.750,12.
182]{  1.270,16.510}・(  1
.250,  6.850)[  3.810,13.
653]  [  1.250,11.668]{  
3.810,13.970}・(  1.750,  
6.850)[  4.826,15.494]  [
  4.826,13.970][  5.080,1
3.653]  [  1.750,11.155]{
  3.810,16.510}・(  2.250,
  6.850)[  6.350,13.653] 
 [  2.250,10.642]{  6.350
,13.970]・(  2.750,  6.850
)[  7.366,15.494]  [  7.3
66,13.970][  7.620,13.653
]  [  2.750,10.128]{  6.3
50,16.510}・(  3.250,  6.5
80)[  8.890,13.653]  [  3
.250,  9.615]{  8.890,13.
970}・(  3.750,  6.850)[  
9.906,15.494]  [  9.906,1
3.970][10.160,13.653]  [ 
 3.750,  9.101]{  8.890,1
6.510}・(  4.250,  6.850)[
11.430,13.653]  [  4.250,
  8.588]{11.430,13.970}・(
  4.750,  6.850)[12.446,1
5.494]  [12.446,13.970][1
2.700,13.653]  [  4.750, 
 8.075]{11.430,16.510}上述し
た各座標値は、ライン2の座標の1/4分であり、残り
の座標値は、記述した座標値を基準点4を原点として、
90°180°270°回転することによって得ること
ができる。また、検査用ランド3を2.54mmの格子
にのせるために基準点4の基板原点(図示省略)からの
座標値(X,Y)は、m,nを整数、単位はミリメート
ルとすると、次のように表される。
Here, (,) is the starting point, [,] is the bending point,
{,} represents the end point, and the unit of each number is millimeter.・(-4.750, 6.850) [-11.430
, 13.653] [-4.750, 8.073
] {-11.430, 13.970}・(-4.250
, 6.850) [-10.414, 15.494]
[-10.414, 13.970] [-10.16
0,13.653] [-4.250, 8.58
6] {-11.430, 16.510}・(-3.75
0, 6.850) [-8.890, 13.653]
[-3.750, 9.100] {-8.890
,13.970}・(-3.250, 6.850)
[-7.874, 15.494] [-7.874,
13.970] [-7.620, 13.653] [
−3.250, 9.613] {−8.890, 16
.. 510}・(-2.750 6.850)[-
6.350, 13.653] [-2.750, 10
.. 126] {-6.350, 13.970}・(-2.
250, 6.850) [-5.334, 15.49
4] [-5.334, 13.970] [-5.08
0,13.653] [-2.250,10.693
] {-6.350, 16.510}・(-1.750,
6.850) [-3.810, 13.653]
[-1.750, 11.152] {-3.810, 13
.. 970}・(-1.250, 6.850)[-2
.. 794,15.494] [-2.794,13.
970] [-2.540, 13.653] [-1.
250, 11.665] {-3.810, 16.510
}・(-0.750, 6.850) [-1.270
, 13.653] [-0.750, 12.175]
{-1.270, 13.970}・(-0.250,
6.850) [-0.254, 15.494] [
-0.254,13.970][-0.250,12.
707] {-1.270, 16.510} ・( 0.250, 6.850) [ 1.27
0,13.653] [0.250,12.69
6] { 1.270, 13.970}・( 0.7
50, 6.850) [ 2.286, 15.49
4] [ 2.286, 13.970] [ 2.
540,13.653] [0.750,12.
182] { 1.270, 16.510}・( 1
.. 250, 6.850) [ 3.810, 13.
653] [ 1.250, 11.668] {
3.810, 13.970}・( 1.750,
6.850) [ 4.826, 15.494] [
4.826, 13.970] [ 5.080, 1
3.653] [ 1.750, 11.155] {
3.810, 16.510}・( 2.250,
6.850) [6.350, 13.653]
[ 2.250, 10.642] { 6.350
,13.970]・(2.750, 6.850
) [ 7.366, 15.494] [ 7.3
66,13.970] [7.620,13.653
] [ 2.750, 10.128] { 6.3
50, 16.510}・( 3.250, 6.5
80) [ 8.890, 13.653] [ 3
.. 250, 9.615] { 8.890, 13.
970}・(3.750, 6.850)[
9.906,15.494] [9.906,1
3.970] [10.160, 13.653] [
3.750, 9.101] { 8.890, 1
6.510}・(4.250, 6.850)[
11.430, 13.653] [ 4.250,
8.588] {11.430, 13.970}・(
4.750, 6.850) [12.446,1
5.494] [12.446, 13.970] [1
2.700, 13.653] [ 4.750,
8.075] {11.430, 16.510} Each of the coordinate values mentioned above is 1/4 of the coordinate of line 2, and the remaining coordinate values are the coordinate values described with reference point 4 as the origin,
It can be obtained by rotating 90 degrees, 180 degrees, and 270 degrees. Furthermore, in order to place the inspection land 3 on a 2.54 mm grid, the coordinate values (X, Y) of the reference point 4 from the substrate origin (not shown) are as follows, where m and n are integers and the unit is millimeters. It is expressed as follows.

【0011】 X=2.54n+1.27 Y=2.54m+1.27[0011] X=2.54n+1.27 Y=2.54m+1.27

【発明の効果】以上、説明したように本発明は、次のよ
うな効果がある。
[Effects of the Invention] As explained above, the present invention has the following effects.

【0012】(1)印刷配線板上で検査用ランドを有す
る表面実装型集積回路の占有する面積が10.90cm
2 以下で従来に比べ34%以下となるため実装密度が
上がる。
(1) The area occupied by the surface mount integrated circuit having the inspection land on the printed wiring board is 10.90 cm.
2 or less, the packaging density increases by 34% or less compared to the conventional method.

【0013】(2)検査用ランドが2.54mm格子に
のっているので、汎用布線検査機を使用することができ
る。特に0.5mmピッチのパッドを直接検査するため
には高価な検査装置が必要でかつ接触の不安定等により
品質面でも問題があるため、この効果は大きい。
(2) Since the inspection land is placed on a 2.54 mm grid, a general-purpose wiring inspection machine can be used. In particular, this effect is significant because direct inspection of pads with a pitch of 0.5 mm requires expensive inspection equipment and also poses quality problems due to unstable contact.

【0014】(3)集積回路接続用パッドと、検査用ラ
ンドを結ぶラインのライン幅を従来の回路パターンに比
べて太くでき、その間隔も広くとれるのでオープン・シ
ョート等のトラブルがなくこのライン部分の布線試験を
省略できる。
(3) The width of the line connecting the integrated circuit connection pad and the test land can be made thicker than in conventional circuit patterns, and the spacing between them can be made wider, so there are no problems such as open or short circuits, and this line can be easily wiring test can be omitted.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例による印刷配線板の平面図。FIG. 1 is a plan view of a printed wiring board according to an embodiment of the present invention.

【図2】従来例による印刷配線板の一例の平面図。FIG. 2 is a plan view of an example of a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1    (集積回路)接続パッド 2    ライン 3    検査用ランド 4    基準点 5    絶縁層 1 (Integrated circuit) connection pad 2 Line 3 Inspection land 4 Reference point 5 Insulating layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  端子ピッチを0.5mmとした80ピ
ンの表面実装型集積回路を実装し、ライン幅0.25m
m未満のラインを有する印刷配線板において、前記集積
回路の各ピン近くに2.54mm格子に配置された検査
用ランドを有し、これらランドと集積回路接続用パッド
とを結ぶラインの幅が0.25mm、これらの回路の最
小間隙が0.25mmあり、前記ランド,ライン,パッ
ドを含む矩形の面積が16.52cm2 以下となるパ
ターンを有することを特徴とする印刷配線板。
[Claim 1] An 80-pin surface mount integrated circuit with a terminal pitch of 0.5 mm is mounted, and the line width is 0.25 m.
A printed wiring board having lines of less than m has test lands arranged in a 2.54 mm grid near each pin of the integrated circuit, and the width of the line connecting these lands and the integrated circuit connection pads is 0. .25 mm, the minimum gap between these circuits is 0.25 mm, and the printed wiring board has a pattern such that the rectangular area including the lands, lines, and pads is 16.52 cm2 or less.
JP3028498A 1991-02-22 1991-02-22 Printed wiring board Expired - Lifetime JP2638318B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3028498A JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3028498A JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH04312961A true JPH04312961A (en) 1992-11-04
JP2638318B2 JP2638318B2 (en) 1997-08-06

Family

ID=12250338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3028498A Expired - Lifetime JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2638318B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06181084A (en) * 1992-12-14 1994-06-28 Japan Aviation Electron Ind Ltd Connector for electrical connection
JPH09186195A (en) * 1995-12-28 1997-07-15 Nec Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06181084A (en) * 1992-12-14 1994-06-28 Japan Aviation Electron Ind Ltd Connector for electrical connection
JPH09186195A (en) * 1995-12-28 1997-07-15 Nec Corp Semiconductor device

Also Published As

Publication number Publication date
JP2638318B2 (en) 1997-08-06

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