JP2638318B2 - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JP2638318B2
JP2638318B2 JP3028498A JP2849891A JP2638318B2 JP 2638318 B2 JP2638318 B2 JP 2638318B2 JP 3028498 A JP3028498 A JP 3028498A JP 2849891 A JP2849891 A JP 2849891A JP 2638318 B2 JP2638318 B2 JP 2638318B2
Authority
JP
Japan
Prior art keywords
integrated circuit
wiring board
printed wiring
inspection
lands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3028498A
Other languages
Japanese (ja)
Other versions
JPH04312961A (en
Inventor
政美 千田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP3028498A priority Critical patent/JP2638318B2/en
Publication of JPH04312961A publication Critical patent/JPH04312961A/en
Application granted granted Critical
Publication of JP2638318B2 publication Critical patent/JP2638318B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Wire Bonding (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、表面実装型集積回路を
搭載する印刷配線板に関し、特に集積回路接続用パッド
から検査用ランドの占有する面積内の回路パターンに関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board on which a surface mount type integrated circuit is mounted, and more particularly, to a circuit pattern in an area occupied by an inspection land from a pad for connecting an integrated circuit.

【0002】[0002]

【従来の技術】従来、この種の表面実装型集積回路の搭
載に用いられる印刷配線板は、図2に示されるように絶
縁層5上に集積回路接続用パッド1と検査用ランド3を
決められた設計基準に従ってランド2で接続して形成し
ていた。
2. Description of the Related Art Conventionally, a printed wiring board used for mounting a surface mount type integrated circuit of this type has an integrated circuit connecting pad 1 and an inspection land 3 on an insulating layer 5 as shown in FIG. It was formed by connecting with the land 2 in accordance with the given design standard.

【0003】[0003]

【発明が解決しようとする課題】上述した従来の印刷配
線板には、次のような欠点があった。
The above-mentioned conventional printed wiring board has the following disadvantages.

【0004】(1)検査用ランド3を2.54mm格子
にのせると、集積回路接続用パッド1から検査用ランド
3までの距離が長いため、印刷配線板1枚の中で占有す
る面積が大きく部品の実装密度が上がらない。また面積
を小さくするため検査用ランドを2.54mm格子から
外すと汎用布線検査機を使用することができないため、
検査コストが上がる。
(1) When the test lands 3 are placed on a grid of 2.54 mm, the distance from the integrated circuit connection pads 1 to the test lands 3 is long, so that the area occupied in one printed wiring board is increased. The mounting density of components does not increase significantly. If the inspection land is removed from the 2.54 mm grid to reduce the area, a general-purpose wiring inspection machine cannot be used.
Inspection costs rise.

【0005】(2)ライン2の幅は設計基準の制約を受
ける他の信号ラインと同じ細い幅で(例えば0.13m
m)で形成されているため、歩留りも悪く集積回路接続
用パッド1と検査用ランドの間も布線検査を行う必要が
ある。
(2) The width of the line 2 is the same as the width of other signal lines (for example, 0.13 m), which is restricted by design criteria.
m), the yield is poor, and it is necessary to conduct a wiring test between the integrated circuit connection pad 1 and the inspection land.

【0006】本発明の目的は、このような欠点を除去
し、部品の実装密度を上げかつ検査の適用を容易にした
印刷配線板を提供することにある。
An object of the present invention is to provide a printed wiring board which eliminates such disadvantages, increases the mounting density of components, and facilitates application of inspection.

【0007】[0007]

【課題を解決するための手段】本発明の構成は、端子ピ
ッチを0.5mmとした80ピンの表面実装型集積回路
を実装し、ライン幅0.25mm未満のラインを有する
印刷配線板において、前記集積回路の各ピン近くに2.
54mm格子に配置された検査用ランドを有し、これら
ランドと集積回路接続用パッドとを結ぶラインの幅が
0.25mm、これらの回路の最小間隙が0.25mm
あり、前記ランド,ライン,パッドを含む
According to the present invention, there is provided a printed wiring board on which an 80-pin surface-mounted integrated circuit having a terminal pitch of 0.5 mm is mounted and having a line width of less than 0.25 mm. 1. near each pin of the integrated circuit
It has test lands arranged in a 54 mm grid, the width of the line connecting these lands and the integrated circuit connection pads is 0.25 mm, and the minimum gap between these circuits is 0.25 mm
Yes, including the lands, lines, and pads

【0008】[0008]

【実施例】図1は本発明の一実施例の平面図である。集
積回路接続用パッド1は基準点4を中心として上下左右
それぞれ20個ずつ並び、パッド間ピッチは0.5mm
である。2.54mm格子上にのる検査用ランド3は集
積回路接続用パッド1の外形に位置し、それぞれ2列に
並んでいる。ライン2は、検査用ランド3と集積回路接
続用パッド1とを接続し、ライン2の始点は集積回路接
続用パッドの中心であり、その終点は検査用ランド3の
中心である。
FIG. 1 is a plan view of an embodiment of the present invention. The integrated circuit connection pads 1 are arranged 20 each in the upper, lower, left and right directions around the reference point 4, and the pitch between the pads is 0.5 mm.
It is. The inspection lands 3 on the 2.54 mm grid are located on the outer shape of the integrated circuit connection pads 1 and are arranged in two rows. The line 2 connects the inspection land 3 and the integrated circuit connection pad 1, and the starting point of the line 2 is the center of the integrated circuit connection pad and the end point is the center of the inspection land 3.

【0009】本実施例の基準点4を座標値(0,0)の
原点とした時の始点,屈曲点,終点の座標値は次のとお
りである。
When the reference point 4 of this embodiment is set as the origin of the coordinate value (0, 0), the coordinate values of the starting point, the bending point, and the ending point are as follows.

【0010】ここで、(,)は始点、[,]は屈曲点、
{,}は終点を表わし、各数字の単位はミリメートルで
ある。 ・(−4.750, 6.850)[−11.430,13.653] [−4.750, 8.073]{−11.430,13.970} ・(−4.250, 6.850)[−10.414,15.494] [−10.414,13・970][−10.160,13.653] [−4.250, 8.586]{−11.430,16.510} ・(−3.750, 6.850)[−8.890,13.653] [−3.750, 9.100]{−8.890,13.970} ・(−3.250, 6.850)[−7.874,15.494] [−7.874,13.970][−7.620,13.653] [−3.250, 9.613]{−8.890,16.510} ・(−2.750 6.850)[−6.350,13.653] [−2.750,10.126]{−6.350,13.970} ・(−2.250, 6.850)[−5.334,15.494] [−5.334,13.970][−5.080,13.653] [−2.250,10.639]{−6.350,16.510} ・(−1.750, 6.850)[−3.810,13.653] [−1.750,11.152]{−3.810,13.970} ・(−1.250, 6.850)[−2.794,15.494] [−2.794,13.970][−2.540,13.653] [−1.250,11.665]{−3.810,16.510} ・(−0.750, 6.850)[−1.270,13.653] [−0.750,12.175]{−1.270,13.970} ・(−0.250, 6.850)[−0.254,15.494] [−0.254,13.970][−0.250,12.707] {−1.270,16.510} ・( 0.250, 6.850)[ 1.270,13.653] [ 0.250,12.696]{ 1.270,13.970} ・( 0.750, 6.850)[ 2.286,15.494] [ 2.286,13.970][ 2.540,13.653] [ 0.750,12.182]{ 1.270,16.510} ・( 1.250, 6.850)[ 3.810,13.653] [ 1.250,11.668]{ 3.810,13.970} ・( 1.750, 6.850)[ 4.826,15.494] [ 4.826,13.970][ 5.080,13.653] [ 1.750,11.155]{ 3.810,16.510} ・( 2.250, 6.850)[ 6.350,13.653] [ 2.250,10.642]{ 6.350,13.970] ・( 2.750, 6.850)[ 7.366,15.494] [ 7.366,13.970][ 7.620,13.653] [ 2.750,10.128]{ 6.350,16.510} ・( 3.250, 6.580)[ 8.890,13.653] [ 3.250, 9.615]{ 8.890,13.970} ・( 3.750, 6.850)[ 9.906,15.494] [ 9.906,13.970][10.160,13.653] [ 3.750, 9.101]{ 8.890,16.510} ・( 4.250, 6.850)[11.430,13.653] [ 4.250, 8.588]{11.430,13.970} ・( 4.750, 6.850)[12.446,15.494] [12.446,13.970][12.700,13.653] [ 4.750, 8.075]{11.430,16.510} 上述した各座標値は、ライン2の座標の1/4分であ
り、残りの座標値は、記述した座標値を基準点4を原点
として、90゜180゜270゜回転することによって
得ることができる。また、検査用ランド3を2.54m
mの格子にのせるために基準点4の基板原点(図示省
略)からの座標値(X,Y)は、m,nを整数、単位は
ミリメートルとすると、次のように表される。
Where (,) is the starting point, [,] is the inflection point,
{And} represent end points, and the unit of each number is millimeter. -(-4.750, 6.850) [-11.430, 13.653] [-4.750, 8.073] {-11.430, 13.970}-(-4.250, 6.970) 850) [-10.414, 15.494] [-10.414, 13.970] [-10.160, 13.653] [-4.250, 8.586] {-11.430, 16. 510}-(-3.750, 6.850) [-8.890, 13.653] [-3.750, 9.100] {-8.890, 13.970}-(-3.250, 6.970) 6.850) [-7.874, 15.494] [-7.874, 13.970] [-7.620, 13.653] [-3.250, 9.613]}-8.890, 16.510}-(-2.750 6.850) [-6.350, 13. 653] [-2.750, 10.126] {-6.350, 13.970} (-2.250, 6.850) [-5.334, 15.494] [-5.334, 13] .970] [-5.080, 13.653] [-2.250, 10. 639 ] {-6.350, 16.510}-(-1.750, 6.850) [-3.810, 13.653] [-1.750, 11.152] {-3.810, 13 .970}-(-1.250, 6.850) [-2.794, 15.494] [-2.794, 13.970] [-2.540, 13.653] [-1.250, 11.665] {−3.810, 16.510} • (−0.750, 6.850) [−1.270, 13.653] [−0.750, 12.175]} − 1.270 , 13.970}-(-0.250, 6.850) [-0.254, 15.494] [-0.254, 13.970] [-0.250, 12.707] {-1. 270, 16.510} (0.250, 6.850) [1.270, 13 0.653] [0.250, 12.696] {1.270, 13.970} (0.750, 6.850) [2.286, 15.494] [2.286, 13.970] [ 2.540, 13.653] [0.750, 12.182] {1.270, 16.510}-(1.250, 6.850) [3.810, 13.653] [1.250, 11.668] {3.810, 13.970} • (1.750, 6.850) [4.826, 15.494] [4.826, 13.970] [5.080, 13.653] [1.750, 11.155] {3.810, 16.510} • (2.250, 6.850) [6.350, 13.653] [2.250, 10.652]} 6.350 , 13.970] · (2.750 6.850) [7.366, 15.494] [7,366, 13.970] [7.620, 13.653] [2.750, 10.128] {6.350, 16.510} (3.250, 6.580) [8.890, 13.653] [3.250, 9.615] {8.890, 13.970} • (3.750, 6.850) [9.906 , 15.494] [9.906, 13.970] [10.160, 13.653] [3.750, 9.101] {8.890, 16.510} • (4.250, 6.850) ) [11.430, 13.653] [4.250, 8.588] {11.430, 13.970} • (4.750, 6.850) [12.446, 15.494] [12. 446, 13.970] [12. 00, 13.653] [4.750, 8.075] {11.430, 16.510} Each of the coordinate values described above is a quarter of the coordinate of the line 2, and the remaining coordinate values are described as The obtained coordinate values can be obtained by rotating 90 °, 180 °, and 270 ° with reference point 4 as the origin. The inspection land 3 is 2.54 m
The coordinate values (X, Y) of the reference point 4 from the substrate origin (not shown) to be placed on the grid of m are expressed as follows, where m and n are integers and the unit is millimeters.

【0011】 X=2.54n+1.27 Y=2.54m+1.27X = 2.54n + 1.27 Y = 2.54m + 1.27

【発明の効果】以上、説明したように本発明は、次のよ
うな効果がある。
As described above, the present invention has the following effects.

【0012】(1)印刷配線板上で検査用ランドを有す
る表面実装型集積回路の占有する面積が10.90cm
2 以下で従来に比べ34%以下となるため実装密度が上
がる。
(1) The area occupied by the surface mount type integrated circuit having the inspection land on the printed wiring board is 10.90 cm.
When it is 2 or less, it becomes 34% or less as compared with the conventional one, so that the mounting density increases.

【0013】(2)検査用ランドが2.54mm格子に
のっているので、汎用布線検査機を使用することができ
る。特に0.5mmピッチのパッドを直接検査するため
には高価な検査装置が必要でかつ接触の不安定等により
品質面でも問題があるため、この効果は大きい。
(2) Since the inspection lands are on the 2.54 mm grid, a general-purpose wiring inspection machine can be used. In particular, in order to directly inspect a pad having a pitch of 0.5 mm, an expensive inspection apparatus is required, and there is a problem in quality due to unstable contact and the like.

【0014】(3)集積回路接続用パッドと、検査用ラ
ンドを結ぶラインのライン幅を従来の回路パターンに比
べて太くでき、その間隔も広くとれるのでオープン・シ
ョート等のトラブルがなくこのライン部分の布線試験を
省略できる。
(3) The line connecting the pad for connecting the integrated circuit and the inspection land can be made wider than the conventional circuit pattern, and the interval between them can be widened, so that there is no trouble such as open / short, and this line portion Can be omitted.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例による印刷配線板の平面図。FIG. 1 is a plan view of a printed wiring board according to an embodiment of the present invention.

【図2】従来例による印刷配線板の一例の平面図。FIG. 2 is a plan view of an example of a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1 (集積回路)接続パッド 2 ライン 3 検査用ランド 4 基準点 5 絶縁層 Reference Signs List 1 (integrated circuit) connection pad 2 line 3 inspection land 4 reference point 5 insulating layer

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 端子ピッチを0.5mmとした80ピン
の表面実装型集積回路を実装し、ライン幅0.25mm
未満のラインを有する印刷配線板において、前記集積回
路の各ピン近くに2.54mm格子に配置された検査用
ランドを有し、これらランドと集積回路接続用パッドと
を結ぶラインの幅が0.25mm、これらの回路の最小
間隙が0.25mmあり、前記ランド,ライン,パッド
を含む 刷配線板。
1. An 80-pin surface-mount integrated circuit having a terminal pitch of 0.5 mm is mounted and has a line width of 0.25 mm.
In a printed wiring board having less than one line, a plurality of inspection lands arranged in a grid of 2.54 mm are provided near each pin of the integrated circuit, and the width of a line connecting these lands and the pads for connecting the integrated circuit is 0. 25 mm, the minimum gap between these circuits is 0.25 mm, including the lands, lines and pads Printed wiring board.
JP3028498A 1991-02-22 1991-02-22 Printed wiring board Expired - Lifetime JP2638318B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3028498A JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3028498A JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH04312961A JPH04312961A (en) 1992-11-04
JP2638318B2 true JP2638318B2 (en) 1997-08-06

Family

ID=12250338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3028498A Expired - Lifetime JP2638318B2 (en) 1991-02-22 1991-02-22 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2638318B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06181084A (en) * 1992-12-14 1994-06-28 Japan Aviation Electron Ind Ltd Connector for electrical connection
JP2792493B2 (en) * 1995-12-28 1998-09-03 日本電気株式会社 Semiconductor device

Also Published As

Publication number Publication date
JPH04312961A (en) 1992-11-04

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Effective date: 19970318