JP2755255B2 - Semiconductor mounting substrate - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting a semiconductor such as a pin grid array and a hybrid IC substrate, which is required to be mounted at a high density. 2. Description of the Related Art In a semiconductor mounting substrate of this type, a semiconductor element is mounted on a semiconductor mounting portion and fixed, and a bonding wire or the like is connected between the semiconductor element and a conductor circuit formed on the substrate. It is electrically connected and used as a semiconductor device. By the way, as shown in FIG. 5, the formation of a conductor circuit on a semiconductor mounting substrate of this type is performed by first mounting a semiconductor mounting substrate 10 to be singulated on a single large substrate material. A plurality of conductive leads 13 and a semiconductor mounting portion (not shown) are formed, and a large number of plating leads connected to the respective conductive circuits 13 and outside the portion serving as the semiconductor mounting substrate 10, that is, leading to the outer peripheral edge 11. Is formed. Then, plating of each conductor circuit is performed simultaneously through the plating leads formed as described above, and in the final outer shape processing, the substrate is cut on the outer peripheral edge thereof to be formed. In such a manufacturing process, since the plating lead is cut at the same time as the substrate is cut, the peripheral end of the plating lead (that is, the peripheral end of the conductor circuit) is placed on the outer peripheral end of the semiconductor element mounting surface. Part) is left exposed on the outer periphery of the substrate. [0004] In recent years, however, electronic components called semiconductor elements have become very densely integrated. Therefore, semiconductor mounting substrates for mounting the electronic components are also high. Density must be increased. That is, a plurality of the conductor circuits (13) formed on such a semiconductor mounting substrate are formed between lands (14) of through holes as shown in the conventional diagram of FIG. Therefore, in the semiconductor mounting substrate having undergone the above-described external processing, the terminal ends of the plated leads are closely and exposed to the external peripheral edge of the external peripheral edge 11 opposite to the semiconductor element mounting side. Remains. By the way, such a semiconductor mounting substrate 1
In the case of No. 0, it is immersed in molten solder in a later step in order to fix the lead pin, which is the tip of the conductor circuit 13, or to mount it on the motherboard. In this case, the solder is not only on the surface of the plating lead that is part of the conductor circuit,
It may also adhere to the space between the plating leads. In other words, when the space between the conductor circuits serving as the plating leads is small, the solder on the surfaces of the two conductor circuits adheres to each other, and a bridge is formed between them. In such a state, an electrical short circuit occurs between the two conductor circuits,
This is a defective product for a semiconductor mounting substrate. Further, as described above, if the conductor circuits are in close contact with each other, an electrical short circuit may occur between the conductor circuits when the conductor circuit serving as the plating lead floats during the processing of the outer shape of the board. In addition, discharge breakdown is likely to occur, and the function as a semiconductor device may be stopped. All of the above problems arise from the fact that the interval between the conductor circuits serving as the plating leads is too narrow in the outer peripheral portion of the substrate. An object of the present invention is to provide a semiconductor mounting substrate capable of preventing an electrical short circuit of a conductor circuit on the outer peripheral edge of the semiconductor mounting substrate. According to the present invention, there is provided a semiconductor mounting substrate having a semiconductor mounting portion, a conductor circuit, and a plurality of through holes formed thereon. It has a plurality of conductor circuits which are close to each other and are located on the outer peripheral edge of the board via the lands of the adjacent through-holes. Than the line spacing of the conductor circuit between lands of adjacent through holes,
The line spacing in the vicinity of the outer periphery is formed wide.
And the plurality of conductor circuits pass between lands.
Between them, they extend parallel and straight to each other,
After that, on the way to the outer periphery
The outer two conductor circuits expand in opposite directions in a V-shape
In addition, the two outer conductor circuits that are expanded
A straight line passing between the lands toward the periphery of the shape
In the same direction as the conductor circuit in the semiconductor mounting substrate, wherein that you have linearly extends. Next, the present invention will be described with reference to the left part of FIG. 1 corresponding to the embodiment.
2) The conductor circuits (131) and (132) approaching each other from (FIGS. 2 and 3) to the outer periphery (11) of the substrate (10) via the lands (141) and (142) of the through hole 140. ), The line spacing W1 of the conductor circuits (131) and (132) located near the outer peripheral edge (11) is
The conductor circuit (131) (132) located between the lands (141) and (142) of the through hole is formed wider than the line interval D1. That is, the line interval W1 of the conductor circuit (which is the plating lead in the above description) of the portion located in the vicinity of the outer peripheral edge (11) is set to the land (1) of the through hole.
41) The object of the present invention is achieved by increasing the line interval D1 of the portion located between (142). The semiconductor mounting substrate according to the present invention having the above-described structure has the following effects. That is, of the conductor circuits on the semiconductor mounting substrate,
When a plurality of conductor circuits are provided between lands of adjacent through holes, a line interval between the plurality of adjacent conductor circuits is a line of the conductor circuit between the lands of the adjacent through holes. The line interval W1 of the conductor circuit in the portion located near the outer peripheral edge is formed larger than the interval D1. In addition, the plurality of conductor circuits are arranged between lands.
While passing through, they extend parallel and straight to each other,
On the way to the outer periphery after passing through the
Where the two outer conductor circuits conflict with each other
It is expanding in the direction. In addition, the two outer conductors
The body circuit passes between the lands toward the outer periphery.
Linearly extending in the same direction as the
ing. Therefore, it is possible to increase the line interval between the conductor circuits at the outer periphery. Therefore, when the semiconductor mounting substrate is processed for outer shape or when the semiconductor mounting substrate is immersed in the molten solder, a portion of the substrate located in the vicinity of the outer peripheral edge of the conductor circuit is not in contact with the adjacent conductor circuit. The occurrence of an electrical short circuit is suppressed. That is, there is no lift of the plating lead during the above-mentioned outer shape processing, and no solder adhesion between the conductor circuits at the time of immersion of the solder, so that no electrical short circuit occurs. Also, since the line spacing between the plating leads is wide, the electrical insulation between them is improved. The outer peripheral edge also coincides with a cutting line when the substrate is cut into individual pieces (individual pieces) as described later, and has a substantially linear end face (FIG. 1). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment An embodiment of the present invention will be described with reference to FIGS. First, as shown in FIG. 2, the semiconductor mounting substrate (10) of this embodiment has a plurality of semiconductor mounting portions (12) and a conductor circuit (13) formed on a glass-epoxy substrate. As shown in FIG. 1, the conductor circuit (13) is provided with a plurality of through holes 14 adjacent to each other from the semiconductor mounting portion (12).
0 land (141) (142) or (142) (14
3) via the outer periphery (1) of the substrate (10).
1) A plurality of upwardly adjacent conductor circuits (13
1) (132) or (133) (134) (135)
Consists of Then, first, the conductor circuits (1
31 and 132), the line spacing between them is
Land (141) of adjacent through hole (140)
The line interval W1 in the vicinity of the outer peripheral edge 11 is formed wider than the line interval D1 between (142). Similarly, for the conductor circuits (133) to (135) passing between the lands (142) and (143), the conductor circuits (133) to (135) in the vicinity of the outer peripheral edge (11) are larger than the line intervals D2 and D3 between the lands. The line spacings W2 and W3 are formed wide (FIG. 1). Then, the plurality of conductor circuits 13
3 to 135 are the distances between the lands 142 and 143
, And extend in parallel and linearly with each other,
After passing through 2,143, the outer peripheral edge 11
The two outer conductor circuits 133, 13 on the way to
5 is expanded in the opposite direction in the shape of a square. In addition,
The outer two conductor circuits 133 and 135 of the expanded
The lands 142 and 143 are moved toward the outer peripheral edge 11.
Same as linear conductor circuits 133 and 135 passing through
Straight in the same direction, that is, in the direction perpendicular to the outer periphery 11
ing. The land (14) of the through hole (140)
There are also conductor circuits (138) derived directly from (1) and (142) to the outer periphery (11), but these are outside the scope of the present invention. The glass-epoxy substrate on which the semiconductor mounting portion (12) and the conductor circuit (13) are formed as described above is cut along the cutting line (m) in FIG.
A semiconductor mounting substrate (10) is formed as a single piece. At this time, as shown in FIG. 1, on the outer peripheral edge (11) of the substrate (10), the conductor circuits (13
1) Line spacing W1 of a portion (this is the plating lead shown in the above-described conventional example) located near the outer peripheral edge (11) of (132) (hereinafter the same also applies to portions 133 to 135).
Is wider than the line interval D1 of the conductor circuit between the lands (141) and (142) of the through hole, so that the plating lead does not float as described above. Further, it is possible to prevent excessive adhesion of the molten solder between the conductor circuits serving as the plating leads. In FIG. 1, there are two conductor circuits between the pair of lands (141) and (142) on the left side, and three conductor circuits between the pair of lands (142) and (143) on the right side. Some showed. Next, with respect to the electronic component mounting board (10) as a single piece formed as described above, a conductor pin (1) as an external input / output terminal is provided in each through hole (140).
5), a plastic pin grid array substrate (100) as shown in FIG. 3 was formed. FIG. 4 is a partially enlarged perspective view of the outer peripheral portion of the plastic pin grid array substrate (100). In this case, the outer periphery (11) of the substrate (10)
Since the conductor circuits in the above have the maximum line spacing, they do not cause an electrical short circuit during external processing or immersion in molten solder, and have improved electrical insulation between the conductor circuits. Was. Further, as described above, the land (141)
(142) or between the lands (142) and (143).
33 to 135) can be provided, so that high-density mounting is possible. According to the present invention, the line spacing of the conductor circuits on the outer peripheral edge of the semiconductor mounting substrate is positively increased from the line spacing of the conductor circuits between the lands of the through holes. . This suppresses the occurrence of an electrical short circuit between the conductor circuits located near the outer peripheral edge when the substrate is processed for outer shape or immersed in molten solder, thereby improving electrical insulation. Also, since a plurality of conductor circuits can be arranged between the lands, high-density mounting is possible. As a result, it is possible to prevent an electrical short circuit or the like that degrades the function of the semiconductor device on which the semiconductor element is mounted, and to provide a semiconductor mounting substrate capable of high-density mounting.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a partially enlarged plan view of a semiconductor mounting substrate in an embodiment. FIG. 2 is a partial plan view showing a state before the semiconductor mounting substrate according to the embodiment is cut as a single piece. FIG. 3 is a perspective view of a plastic pin grid array substrate according to the embodiment. FIG. 4 is a partially enlarged perspective view of a semiconductor mounting substrate in the embodiment. FIG. 5 is a partially enlarged plan view of a conventional semiconductor mounting substrate. [Description of Reference Numerals] 10: semiconductor mounting substrate, 11: outer peripheral edge, 12: semiconductor mounting portion, 13, 131 to 135 ... conductor circuit, 141 to 143 ... land,

Claims (1)

(57) [Claims] In a semiconductor mounting substrate having a semiconductor mounting portion, a conductor circuit, and a plurality of through holes formed thereon, the semiconductor mounting portion is provided on the semiconductor mounting substrate from between the lands of the through holes adjacent to each other. A plurality of conductor circuits which are close to each other and are located on the outer periphery of the board; and a line interval between the conductor circuits which are close to each other is equal to a distance between the lands of the adjacent through holes. than the line spacing, the Ri outline the line spacing is wide is formed in the vicinity of the peripheral edge tear, and the plurality of conductor circuits, while passing through between the lands
Are extended parallel to each other and in a straight line,
After the outside, on the way to the outer periphery
Two were shaped in expanding in opposite directions of the conductor circuit calyx of further two conductors circuitry outside that this expansion is the outer circumferential
Toward the edge, a straight line passing through the land
A substrate for mounting a semiconductor, wherein the substrate extends linearly in the same direction as the body circuit .