JPH04284634A - Mounting method for chip - Google Patents

Mounting method for chip

Info

Publication number
JPH04284634A
JPH04284634A JP7477591A JP7477591A JPH04284634A JP H04284634 A JPH04284634 A JP H04284634A JP 7477591 A JP7477591 A JP 7477591A JP 7477591 A JP7477591 A JP 7477591A JP H04284634 A JPH04284634 A JP H04284634A
Authority
JP
Japan
Prior art keywords
mounting
semiconductor chip
chip
island
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7477591A
Other languages
Japanese (ja)
Other versions
JP3013483B2 (en
Inventor
Hideaki Watanabe
渡辺 秀昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Machinery Inc
Original Assignee
Nichiden Machinery Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichiden Machinery Ltd filed Critical Nichiden Machinery Ltd
Priority to JP3074775A priority Critical patent/JP3013483B2/en
Publication of JPH04284634A publication Critical patent/JPH04284634A/en
Application granted granted Critical
Publication of JP3013483B2 publication Critical patent/JP3013483B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE:To divide a mounting operation into two parts and to shorten an indexing operation when a metal for bonding use is supplied to and melted on an island part formed on an insulating substrate and a semiconductor chip is mounted on it. CONSTITUTION:A reference position Pa, a mounting position Pb and a displacement amount Po between both are detected at a position just before a mounting position; the displacement amount Po is held as a data; after that, a metal 7 for bonding use is supplied to an island part 2. Then, while the metal 7 for bonding use is being heated and melted at a position for the mounting position, the reference position Pa is detected, the mounting position Pb on the molten metal is computed by using the reference position and the data of the reference amount, and a semiconductor chip is supplied and mounted on it.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、絶縁基板上に形成した
アイランド部上における所定のマウント位置を検出して
その位置に半導体等のチップをマウントする方法に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting a predetermined mounting position on an island portion formed on an insulating substrate and mounting a semiconductor chip or the like at that position.

【0002】0002

【従来の技術】高周波用半導体チップは外部からの妨害
の防止を図って、図3に示すように、セラミック等の絶
縁基板(1)上にマウントする。上記絶縁基板(1)は
例えば八角形のセラミック基板であり、その略中央部に
アイランド部(2)を金メッキにて形成すると共に、そ
の周囲に同じく金メッキの電極部(3)を配する。次に
、八角形のコーナ部よりリード(4)…を導出して他の
基板のリード(4)…とタイバ(図示せず)にて連結し
、リードフレームを形成する。そして、図4に示すよう
に、共晶接合用金(5)を介して半導体チップ(6)を
アイランド部(2)上にマウントし、その後、電極部(
3)とワイヤボンディングする。
2. Description of the Related Art High frequency semiconductor chips are mounted on an insulating substrate (1) made of ceramic or the like, as shown in FIG. 3, in order to prevent interference from the outside. The insulating substrate (1) is, for example, an octagonal ceramic substrate, with an island portion (2) formed approximately in the center thereof by gold plating, and an electrode portion (3) also plated with gold arranged around the island portion (2). Next, leads (4) are led out from the corners of the octagon and connected to leads (4) of another board using tie bars (not shown) to form a lead frame. Then, as shown in FIG. 4, the semiconductor chip (6) is mounted on the island part (2) via the eutectic bonding gold (5), and then the electrode part (
3) and wire bonding.

【0003】上記半導体チップ(6)のマウントに際し
ては、従来、予めチップ裏面に金を蒸着等にて貼り付け
ておき、且つ、アイランド部(2)から食み出さないよ
うにその上の所定のマウント位置(アイランド部の中心
)をテレビカメラ等にて認識した後、その位置に半導体
チップ(6)を供給して熱圧着してマウントしていた。 ところが、この場合、蒸着技術や金の厚みが安定しない
等によりウェーハ加工上に難点がある。
Conventionally, when mounting the semiconductor chip (6), gold is pasted on the back surface of the chip in advance by vapor deposition or the like, and a predetermined mark is placed on top of the gold to prevent it from protruding from the island part (2). After the mounting position (the center of the island part) was recognized using a television camera or the like, the semiconductor chip (6) was supplied to that position and mounted by thermocompression bonding. However, in this case, there are difficulties in processing the wafer due to the vapor deposition technique and the instability of the gold thickness.

【0004】そこで、従来、図3に示すように、マウン
ト作業ポジションにおいてアイランド部(2)上の所定
のマウント位置をテレビカメラ等にて認識しておき、そ
の位置に金テープ(7)を供給する。そして、その上の
マウント位置に半導体チップ(6)を供給した後、その
まま絶縁基板(1)を加熱して金テープ(7)を溶融さ
せ、半導体チップ(6)を熱圧着してマウントする。
Therefore, conventionally, as shown in FIG. 3, a predetermined mounting position on the island part (2) is recognized using a television camera or the like at the mounting work position, and a gold tape (7) is supplied to that position. do. After supplying the semiconductor chip (6) to the mounting position thereon, the insulating substrate (1) is directly heated to melt the gold tape (7), and the semiconductor chip (6) is mounted by thermocompression bonding.

【0005】[0005]

【発明が解決しようとする課題】解決しようとする課題
は、同じマウント作業ポジションにおいてマウント位置
の認識、金テープ(7)及び半導体チップ(6)の供給
、そして金テープ(7)の加熱溶融とマウントを一連に
行なっているため、インデックスが低下する点である。 この場合、マウント作業を分けてその直前ポジションに
おいて予めマウント位置を認識して金テープ(7)を供
給しておき、次のマウント作業ポジションで金テープ(
7)を加熱・溶融しつつその上に半導体チップ(6)を
供給してマウントを行なえばよい。ところが、金テープ
(7)が加熱・溶融すると、その表面が乱反射してその
上におけるマウント位置の認識が不可能になる。しかも
、アイランド部(2)の位置は各基板毎にバラついてい
るため、認識出来なければ、半導体チップ(6)のマウ
ント位置がずれて来る。そこで、半導体チップ(6)が
アイランド部(2)から外れたり、その後のワイヤボン
ディングにおいて複数のワイヤの各々が不等長になって
素子の特性が不均一になり、且つ、作業性も低下すると
いう課題が生じてくる。
[Problems to be Solved by the Invention] The problems to be solved are the recognition of the mounting position, the supply of the gold tape (7) and the semiconductor chip (6), and the heating and melting of the gold tape (7) at the same mounting work position. This is the point where the index drops because a series of mounts are performed. In this case, the mounting work is divided, the mounting position is recognized in advance at the position just before that, and the gold tape (7) is supplied, and the gold tape (7) is supplied at the next mounting work position.
The semiconductor chip (6) may be mounted by heating and melting the semiconductor chip (6). However, when the gold tape (7) is heated and melted, its surface reflects diffusely, making it impossible to recognize the mounting position thereon. Moreover, since the position of the island portion (2) varies from substrate to substrate, if it cannot be recognized, the mounting position of the semiconductor chip (6) will shift. Therefore, the semiconductor chip (6) may come off from the island portion (2), or each of the plurality of wires may have unequal lengths during subsequent wire bonding, resulting in nonuniform device characteristics and reduced workability. The issue arises.

【0006】[0006]

【課題を解決するための手段】本発明は、絶縁基板上に
形成され、且つ、周囲に複数の電極部を配したアイラン
ド部上の所定のマウント位置に部品としてのチップをマ
ウントするにあたり、マウント作業直前ポジションにお
いて所定の基準位置と上記マウント位置と両者の変位量
とを予め検出すると共に、変位量をデータとして保持し
た後、接合用金属をアイランド部に供給する工程と、上
記マウント作業ポジションにおいて接合用金属を加熱・
溶融しつつ上記基準位置を検出すると共に、上記変位量
データとで溶融金属上におけるマウント位置を算出し、
その位置に半導体チップを供給してマウントする工程と
を含むことを特徴とし、又、
[Means for Solving the Problems] The present invention provides a method for mounting a chip as a component at a predetermined mounting position on an island portion formed on an insulating substrate and having a plurality of electrode portions arranged around the mount. A predetermined reference position, the above-mentioned mount position, and the amount of displacement between the two are detected in advance at the position just before the work, and after the amount of displacement is stored as data, a process of supplying the bonding metal to the island part and at the above-mentioned mount work position is performed. Heating the metal for joining
Detecting the reference position while melting, and calculating the mount position on the molten metal using the displacement data,
and a step of supplying and mounting a semiconductor chip at the position, and

【0007】共晶接合用金テープを接合用金属としてア
イランド部上に供給して溶融させ、半導体チップをアイ
ランド部にマウントする。
[0007] A gold tape for eutectic bonding is supplied as a bonding metal onto the island portion and melted, and a semiconductor chip is mounted on the island portion.

【0008】[0008]

【作用】上記技術的手段によれば、マウント作業直前ポ
ジションにおいて所定の基準位置と上記マウント位置と
の変位量を予め検出すると共に、変位量をデータとして
保持しておき、次のマウント作業ポジションにおいて上
記基準位置を検出して変位量データとで接合用溶融金属
上におけるマウント位置を算出し、その位置に半導体チ
ップを供給してマウントする。
[Operation] According to the above technical means, the amount of displacement between the predetermined reference position and the above-mentioned mount position is detected in advance at the position immediately before the mounting operation, and the amount of displacement is stored as data, and the amount of displacement is stored as data at the position immediately before the mounting operation. The reference position is detected and the mounting position on the molten metal for bonding is calculated using the displacement data, and the semiconductor chip is supplied and mounted at that position.

【0009】[0009]

【実施例】本発明の実施例を図1及び図2を参照して以
下に説明する。図3に示す部分と同一部分には同一参照
符号を付してその説明を省略する。本発明に係るチップ
マウント方法は、まず図1示すように、マウント作業直
前ポジションにおいて所定の基準位置、例えば一対の電
極部(3)(3)の重心を結ぶ線の中心の基準位置(P
a)と、マウント位置、即ちアイランド部(2)の中心
のマウント位置(Pb)とをテレビカメラにより認識し
て検出すると共に、両者の変位量(Po)を予め検出す
る。同時に電極部(3)(3)の重心を結ぶ線とアイラ
ンド部(2)の一辺との間の角度(θ)を検出しておく
。そして、その変位量と角度データを各アイランド部(
2)毎に保持した後、接合用金属として金テープ(7)
をアイランド部(2)に供給する。次に、図2に示すよ
うに、マウント作業ポジションに絶縁基板(1)を送り
、そこで金テープ(7)を加熱・溶融しつつ基準位置(
Pa)をテレビカメラにより認識して検出すると共に、
予めデータとして保持している変位量(Po)とで溶融
に係る金テープ(7)上におけるマウント位置(Pb)
を算出し、更に、角度(θ)も算出する。そして、その
値に基づき半導体チップの位置と姿勢を規制してアイラ
ンド部(2)上に供給し、熱圧着してマウントする。上
記マウント位置(Pb)の算出は各アイランド部(2)
毎に行なうものとする。
Embodiments An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Components that are the same as those shown in FIG. 3 are given the same reference numerals, and their explanations will be omitted. In the chip mounting method according to the present invention, as shown in FIG. 1, a predetermined reference position, for example, a reference position (P
a) and the mount position, that is, the mount position (Pb) at the center of the island portion (2), are recognized and detected by a television camera, and the amount of displacement (Po) of both is detected in advance. At the same time, the angle (θ) between the line connecting the centers of gravity of the electrode parts (3) (3) and one side of the island part (2) is detected. Then, calculate the displacement and angle data for each island (
2) After holding each, use gold tape as a joining metal (7)
is supplied to the island section (2). Next, as shown in Figure 2, the insulating substrate (1) is sent to the mounting work position, where the gold tape (7) is heated and melted while the reference position (
Pa) is recognized and detected by a television camera, and
Mount position (Pb) on the gold tape (7) related to melting with displacement amount (Po) held as data in advance
is calculated, and the angle (θ) is also calculated. Then, the position and orientation of the semiconductor chip is regulated based on the value, and the semiconductor chip is supplied onto the island section (2) and mounted by thermocompression bonding. The above mount position (Pb) is calculated for each island part (2).
This shall be done every time.

【0010】尚、上記実施例では電極部(3)を基準位
置として用いたが、他の特殊な位置や或いは基準位置を
特に形成してもよい。又、半導体チップは高周波素子以
外でも良く、接合用金属としても金テープの他、半田等
であってテレビカメラによりその表面の認識が出来ない
場合は同様に適用できる。
Although the electrode portion (3) is used as the reference position in the above embodiment, other special positions or reference positions may be formed. Further, the semiconductor chip may be other than a high-frequency element, and the bonding metal may be gold tape, solder, etc., and the same may be applied when the surface cannot be recognized by a television camera.

【0011】[0011]

【発明の効果】本発明によれば、絶縁基板上に形成した
アイランド部上に予め接合用金属を供給した後、半導体
チップをその上に供給してマウントするにあたり、接合
用金属供給ポジションとマウントポジションとに2分し
て作業するようにしたから、インデックスが短縮されて
生産性が向上する。
According to the present invention, after supplying bonding metal in advance onto the island portion formed on an insulating substrate, when supplying and mounting a semiconductor chip thereon, the bonding metal supply position and the mounting Since the work is divided into two parts, the index is shortened and productivity is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明に係るマウント方法の実施例を示すマウ
ント作業ポジション直前における絶縁基板の平面図であ
る。
FIG. 1 is a plan view of an insulating substrate immediately before a mounting work position, showing an embodiment of a mounting method according to the present invention.

【図2】本発明に係るマウント方法の実施例を示すマウ
ント作業ポジションにおける絶縁基板の平面図である。
FIG. 2 is a plan view of an insulating substrate in a mounting work position showing an embodiment of the mounting method according to the present invention.

【図3】従来のマウント方法の実施例を示すマウント作
業ポジションにおける絶縁基板の平面図である。
FIG. 3 is a plan view of an insulating substrate in a mounting work position showing an example of a conventional mounting method.

【図4】アイランド部上にマウントされた半導体チップ
の要部側面図である。
FIG. 4 is a side view of a main part of a semiconductor chip mounted on an island section.

【符号の説明】[Explanation of symbols]

1  絶縁基板 2  アイランド部 3  電極部 7  金テープ(接合用金属) Pa  基準位置 Pb  マウント位置 Po  変位量 1 Insulating substrate 2 Island part 3 Electrode part 7 Gold tape (metal for joining) Pa Reference position Pb Mount position Po Displacement amount

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  絶縁基板上に形成され、周囲に複数の
電極部を配したアイランド部の所定位置に半導体チップ
を組立載置するに先立つポジションにおいて、基準位置
と上記所定位置との変位量を検出すると共に、変位量を
データ保持した後、接合用金属をアイランド部に供給す
る工程と、この接合用金属を加熱しつつ上記基準位置を
検出すると共に、上記変位量データとで加熱金属上にお
ける所定位置を算出し、ここにチップを供給してマウン
トする工程とを含むマウント方法。
1. At a position prior to assembling and placing a semiconductor chip at a predetermined position of an island portion formed on an insulating substrate and having a plurality of electrode portions arranged around the island portion, the amount of displacement between a reference position and the predetermined position is measured. At the same time, the process of supplying the bonding metal to the island part after holding the displacement data, detecting the reference position while heating the bonding metal, and detecting the position on the heated metal using the displacement data. A mounting method including the steps of calculating a predetermined position, supplying a chip thereto, and mounting the chip.
【請求項2】  共晶接合用金テープを接合用金属とし
てアイランド部上に供給して溶融させ、チップをアイラ
ンド部にマウントすることを特徴とする請求項1記載の
マウント方法。
2. The mounting method according to claim 1, wherein a gold tape for eutectic bonding is supplied as a bonding metal onto the island portion and melted to mount the chip on the island portion.
JP3074775A 1991-03-13 1991-03-13 Chip mounting method Expired - Fee Related JP3013483B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3074775A JP3013483B2 (en) 1991-03-13 1991-03-13 Chip mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3074775A JP3013483B2 (en) 1991-03-13 1991-03-13 Chip mounting method

Publications (2)

Publication Number Publication Date
JPH04284634A true JPH04284634A (en) 1992-10-09
JP3013483B2 JP3013483B2 (en) 2000-02-28

Family

ID=13557004

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3074775A Expired - Fee Related JP3013483B2 (en) 1991-03-13 1991-03-13 Chip mounting method

Country Status (1)

Country Link
JP (1) JP3013483B2 (en)

Also Published As

Publication number Publication date
JP3013483B2 (en) 2000-02-28

Similar Documents

Publication Publication Date Title
JPH0348435A (en) Mounting structure of flip chip element
JPH04284634A (en) Mounting method for chip
JPH04162760A (en) Lead frame
JPH0373562A (en) Electronic parts and lead frame therefor
JPH08148623A (en) Semiconductor device
JPH0529363A (en) Wiring board
JPH0362935A (en) Mounting method for film carrier type semiconductor device
JPH11214414A (en) Manufacture of semiconductor ic
JPH05136201A (en) Electrode for semiconductor device and mounting body
JPH05166811A (en) Solder bump formation method
JPS60251636A (en) Semiconductor device
JPH05259631A (en) Surface mounting of printed wiring board
JPH0430439A (en) Structure for mounting bare chip
JP2002184791A (en) Semiconductor device
JPH01120856A (en) Lead frame
JPH04261054A (en) Lead of semiconductor package
JPS6187343A (en) Manufacture of flat package
JPH05347473A (en) Wiring substrate
JP2616571B2 (en) Method for manufacturing semiconductor device
KR940004278Y1 (en) Cot package
JPH05326624A (en) Integrated circuit package
JPH05235108A (en) Manufacture of film carrier tape
JPS63211655A (en) Solder-buried resist sheet
JPS61166140A (en) Manufacture of hybrid integrated circuit device
JPH07321447A (en) Substrate for mounting electronic parts and its manufacturing method and metal plate material for manufacturing substrate for mounting electronic parts and joint-prevention mask

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081217

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081217

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091217

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101217

Year of fee payment: 11

LAPS Cancellation because of no payment of annual fees