JPH04275430A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a finely patterned oxide film with a taper of a small angle without an increase in the number of process steps while reducing the damage to the oxide film. CONSTITUTION:A 0.2-1 micron thick oxide film 2 is formed on a silicon substrate 1 by wet oxidation at 1100 deg.C. A positive resist 3 is formed to a thickness of 1-2 microns on the oxide film 2. The positive resist 3 is masked, exposed and developed to obtain a desired pattern. The substrate is heat-treated at 50-100 deg.C for about 30 minutes in a pre-baking chamber. The oxide film 2 is tapered by etching with a solution containing one part of hydrofluoric acid (46%) and five parts of ammonium fluoride (40%).

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device.

0002

2. Description of the Related Art In recent years, there has been remarkable progress in multilayer wiring technology and fine wiring technology for semiconductor devices. Along with this, wiring made of high melting point metals or their compounds has come to be used on thick silicon oxide films such as field insulating films. However, high melting point metals and their compounds have a large internal stress in the deposited film, and even a steep step difference of about 0.2 μm in the silicon oxide film causes wire breakage. Therefore, when patterning the silicon oxide film by etching, it is necessary to create a taper with a low angle of 40 degrees or less.

Taper etching in conventional semiconductor device manufacturing methods involves the oxide film surface being etched by ion implantation or CF4.
This was done by controlling the adhesion to the resist by roughening it with gas plasma. Another method is to deposit a CVD oxide film, which has a faster etching rate, on top of a silicon thermal oxide film and perform taper etching.

0004

However, the above-mentioned conventional method has problems such as considerable damage to the oxide film, resulting in poor withstanding voltage, and increased and complicated manufacturing steps. An object of the present invention is to provide a method for manufacturing a semiconductor device in which the oxide film is microfabricated with a low angle taper without reducing damage to the oxide film and increasing the number of manufacturing steps.

[0005]

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to claim 1 includes coating and patterning a resist on an oxide film, post-baking at 50 to 100°C, and then etching the oxide film. I have to. The method for manufacturing a semiconductor device according to claim 2 includes treating the oxide film with hexamethyldisilazane, applying and patterning a resist on the oxide film, post-baking at 50 to 100°C, and then removing the oxide film. I try to etch it.

The method for manufacturing a semiconductor device according to claim 3 comprises:
In the method for manufacturing a semiconductor device according to claim 1, the oxide film is etched using an etching solution containing a surfactant.

[0007]

According to the method of the present invention, the adhesion between the resist and the oxide film is controlled at a post-bake temperature of 50 to 100°C, and the taper angle is adjusted when etching the oxide film.

[0008]

[Embodiments] [First Embodiment] A first embodiment of the present invention will be described based on the drawings. FIG. 1 is a step-by-step sectional view showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

First, by wet oxidizing a 5Ω·cm P-type (100) silicon substrate 1 at 1100°C,
An oxide film (silicon thermal oxide film) 2 having a thickness of 0.2 to 1 μm was obtained (FIG. 1(a)). On this oxide film 2, a positive resist 3 containing novolac resin and ethyl cellosolve acetate is applied to a thickness of 1 to 2 μm (Fig. 1(b)).
.

[0010] Thereafter, the positive resist 3 is masked, exposed, and developed to form a desired pattern (FIG. 1(c)). After that, it was dried in a drying oven at room temperature for 50
Heat treatment (post-bake) is performed at ~100°C for about 30 minutes. Next, hydrofluoric acid (46%) versus ammonium fluoride (4
The oxide film 2 is wet-etched using a chemical solution prepared at a ratio of 1:5 (0%) to form a taper (see Figure 1(c)).
) ). A perspective view of the tapered portion formed in this manner is shown in FIG. 3(a).

Furthermore, the oxide film 2 formed with this taper is
A tungsten film (not shown) is deposited on top by sputtering.
．． Even when the tungsten film was deposited to a thickness of 3 .mu.m and subjected to a heat treatment at 400 to 1000.degree. C. after being microfabricated, no disconnection or the like occurred. In addition, post-bake at 40 to 150℃ for 30 minutes.
FIG. 2 shows the relationship between the post-bake temperature and the taper angle α obtained when baking was performed for 1 minute. The taper angle α is the cross section S
This was measured from an EM photograph.

As shown in FIG. 2, the taper angle α is 40 to 6 when the post-bake temperature is usually 110 to 150°C.
It is saturated at 0 degrees Celsius, and at temperatures lower than 50 degrees Celsius, the adhesion between the positive resist 3 and the oxide film 2 is poor, and the taper angle α varies widely, so that the positive resist 3 may peel off during wet etching. Ta. That is, in this example, by performing post-baking at 50 to 100°C,
Microfabrication was possible with the desired low angle (40 degrees or less) taper. Furthermore, the number of steps is the same as in the conventional oxide film patterning process, and since plasma and ion implantation are not used, there is less damage to the oxide film 2.

[0013] The taper angle α becomes larger as the proportion of hydrofluoric acid (46%) in the chemical solution used for wet etching the oxide film 2 increases. Taking into consideration, hydrofluoric acid (46
%) Ammonium fluoride (40%) is 1:1 to 1:2
A range of about 0 is preferable. [Second Embodiment] A method of manufacturing a semiconductor device according to a second embodiment of the present invention will be described.

In the method of manufacturing a semiconductor device according to the second embodiment, before coating the positive resist 3 on the oxide film 2 in the first embodiment, the surface of the oxide film 2 is changed from hydrophilic to hydrophobic. In order to obtain this, it is treated with hexamethyldisilazane and trimethylsilylated, and the subsequent steps are the same as in the first example. In this embodiment, the surface of the oxide film 2 is treated with hexamethyldisilazane before applying the positive resist 3, thereby improving the adhesion between the oxide film 2 and the positive resist 3. The variation in the taper angle α was also reduced from ±5 degrees to ±3 degrees, resulting in higher reliability. As a result, the optimum post-bake temperature was reduced by 10°C on the high temperature side to 90°C. The low temperature side was set at 50°C in consideration of stability.

[Third Embodiment] A method for manufacturing a semiconductor device according to a third embodiment of the present invention will be described. In the method of manufacturing a semiconductor device according to the third embodiment, a surfactant is added to the chemical solution in the step of wet etching the oxide film 2 in the first embodiment. A few drops of a nonionic compound (such as polyoxyethylene alkyl ether) was mixed into the chemical solution used in the first example. Other steps are the same as in the first embodiment.

In the first embodiment (FIG. 3(a)), the intersection of the non-tapered surface A1 and the tapered surface B1 of the oxide film 2 is a straight line, whereas in this third embodiment, the intersection of the non-tapered surface A1 and the tapered surface B1 is a straight line. (b
), the non-tapered surface A2 and the tapered surface B2 of the oxide film 2 intersect at a gently curved surface. This is because the surfactant allows the chemical solution to spread to the oxide film at a faster rate than in the first embodiment.
This is because it penetrated between the positive resist 3 and the positive resist 3.

As described above, according to this embodiment, since the non-tapered surface A2 and the tapered surface B2 intersect with each other in a gently curved surface, disconnection of the wiring (not shown) formed on the oxide film 2 can be further prevented. can do. In particular, it is effective for etching fine contact windows and pre-processing metallization by tungsten CVD or the like.

Although the taper angle α increases by 10 to 15 degrees compared to the first embodiment, and the range of conditions becomes narrower, it can be formed to a desired value of 40 degrees or less. In the first, second and third embodiments described above, a silicon thermal oxide film is used as the oxide film 2, but an oxide film formed by CVD or the like may also be used.

[0019]

Effects of the Invention The semiconductor device manufacturing method of the present invention controls the adhesion between the resist and the oxide film at a post-bake temperature of 50 to 100°C, and adjusts the taper angle when etching the oxide film. Therefore, damage to the oxide film can be reduced, and the oxide film can be microfabricated with a low angle taper without increasing the number of manufacturing steps.

[0020] Furthermore, by treating the oxide film with hexamethyldisilazane before applying the resist on the oxide film, the adhesion between the resist and the oxide film is improved, and the variation in the taper angle is further reduced. This makes it more reliable. Furthermore, by etching the oxide film with an etching solution containing a surfactant, the intersection of the etched tapered surface and the non-tapered surface can be made into a gently curved surface.

[Brief explanation of the drawing]

FIG. 1 is a step-by-step sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing the relationship between post-bake temperature and taper angle in the same example.

FIG. 3(a) is a perspective view of a tapered portion in a first embodiment, and FIG. 3(b) is a perspective view of a tapered portion in a third embodiment.

[Explanation of symbols]

2 Oxide film 3. Positive resist

Claims (3)

[Claims] 1. A method for manufacturing a semiconductor device, comprising the steps of applying and patterning a resist on an oxide film, post-baking at 50 to 100° C., and etching the oxide film. 2. A step of treating the oxide film with hexamethyldisilazane, a step of applying and patterning a resist on the oxide film, a step of post-baking at 50 to 100° C., and etching the oxide film. A method for manufacturing a semiconductor device, comprising the step of: 3. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of etching the oxide film, the oxide film is etched using an etching solution to which a surfactant is added.