JPS61180458A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce generation of cracks of a spin-on glass film for smoothing, by a method wherein after an oxide film which contain phosphorus is grown as the first insulating film by the vapor phase growth method, the spin-on glass film containing phosphorus is coated by spin coating and heat-compacted. CONSTITUTION:An Al wiring layer 21 of the first layer on a semiconductor substrate 20 is formed. Subsequently, an oxide film 22 containing phosphorus which is the first inter-layer insulating film, is grown as an inter-layer insulating film to 1/3 of film width of the whole of the inter-layer insulating film by the vapor phase growth method. Next, the spin-on glass film 23 is coated on the whole surface by a spin coater, and is stoved and hardened by applying the heat treating of about 400 deg.C. At this time, since the first inter-layer insulating film 22 is thin, the constricted part of the step part becomes slow, and cracks are not nearly generated on the spin-on glass 23, and smooth form can be obtained. Next, remained 2/3 of the inter-layer insulating films are grown making the oxide film 24 containing phosphorus as the second inter-layer insulating film.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device by improving multilayer wiring technology.

[Conventional technology]

In a conventional semiconductor device having a multilayer wiring structure, the configuration shown in FIG. 2(a) is used to prevent metal wiring from breaking. That is, an oxide film 12 containing phosphorus is grown as an interlayer insulating film on the first layer metal wiring ll formed on the semiconductor substrate IO by vapor phase growth, and then a spin-on glass film 13 is coated on the entire surface using a spin coater. Adhered to 400℃
Apply some heat treatment. At this stage, the spin-on glass film 1
3 has a gentle shape, so the second layer metal wiring 1
4 can be maintained in good condition.

[Problem that the invention seeks to solve]

In the conventional method of improving the steps using the above-mentioned spin-on glass film, cracks 15 may occur during the heat treatment process of the spin-on glass film, as shown in Fig. 8g2 (a). The reason for this is that the heat treatment evaporates the alcohol and water in the spin-on glass film 13, causing the volume to shrink. Therefore, this phenomenon is more likely to occur at the thick stepped portions of the spin-on glass film. If the second metal wiring layer 14 is deposited with a rack formed in this manner, the wiring is likely to break, resulting in a significant loss of reliability.

In addition, even if no cracks occur in the spin-on glass film, as shown in the second diagram), the through hole 170PRB
If a misalignment occurs when exposed to light, the etching solution may be used in resist 1 during wet etching to taper the through hole.
From the gap between 6 and the spin-on glass film 14, the etching wraps around to the thick stepped portion of the spin-on glass film, and the spin-on glass film 14, which has a high etching rate, is etched, making it easy to form a constriction 18i in the interlayer insulating film. In this situation, the second
Even when a second metal wiring layer is deposited, the wiring tends to break, which has the disadvantage of significantly impairing the reliability of the device.

The present invention eliminates the above-mentioned drawbacks, reduces the occurrence of cracks in the spin-on glass film for smoothing, or reduces its influence, and also prevents the spin-on glass film from being etched by the injection of etching solution when forming through-holes. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a multilayer wiring structure in which the second metal wiring layer does not have any constriction or constriction in the step part, and therefore does not have a step break in the second metal wiring layer. .

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention is a method for manufacturing a semiconductor device in which an insulating film between metal wiring layers of a semiconductor element having multilayer wiring and a through hole for obtaining conduction between the metal wiring layers are formed. After growing an oxide film containing phosphorus as a first insulating film by a phase growth method, it is deposited and baked by spin-on-glass gt-spin coating containing phosphorus, and then an oxide film containing phosphorus is grown as a second insulating film. A step of growing the through hole by a vapor phase growth method, and a step of etching the through hole up to the second insulating film by a wet etching method, and etching the first insulating film by a dry etching method to form an opening. Consists of.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1(a) and 1(b) are both sectional views of one embodiment of the present invention.

As shown in FIG. 1(a), a first Ae wiring layer 21 is formed on a semiconductor substrate 20. As shown in FIG. Thereafter, as an interlayer insulating film, an oxide film 22 containing phosphorus, which is a first interlayer insulating film, is grown by vapor phase growth to a thickness of 173 mm, which is the entire thickness of the glabellar insulating film, and then a spin-on glass film 23 is grown using a spin coater.
is coated on the entire surface and heat-treated at about 400°C to harden it. At this time, since the first interlayer insulating film 22 is thin, the constriction of the stepped portion becomes loose, and a gentle shape is obtained with almost no cracks occurring in the spin-on glass film 23.

After that, the remains of the interlayer insulation film! Oxide film 2 containing phosphorus for 112/3
4 as a second glabellar insulating film to form an interlayer insulating film.

Next, a through hole 26 is formed using a wet etching method and a dry etching method. When opening the holes, a second step is performed using a wet etching method to form a tapered through hole.
Only the glabellar insulating film 24 is etched until it does not reach the spin-on glass film layer 23, and the remaining glabellar insulating film is etched (by dry etching) to form a through hole 26.

In such cases, the second glabellar insulating film is tapered,
In the spin-on glass film, accurately formed through holes can be formed in the first glabella insulating film without being etched by the etching solution.

Furthermore, as shown in FIG. 1(b), even if a misalignment occurs during the exposure during the formation of a through hole, the spin-on glass film 23, which has a high etching rate, will not be etched due to the injection of etching solution and will not create a constriction at the step. It never happens. Therefore, when the second Ag wiring layer is deposited, a smooth shape with no steps can be obtained.

As explained above, according to the present invention, A7? of the multilayer wiring structure? An oxide film containing phosphorus and a spin-on glass film containing phosphorus are used as an insulating film between wiring layers as a first glabellar insulating film, and an insulating film sandwiching a spin-on glass film of an oxide film containing phosphorus as a second interlayer insulating film. A layered structure is obtained. Then, the film thickness ratio of the first and second glabella insulating films is set to 3 near or 4:6, and the first
By providing a thin glabellar insulating film, it is possible to reduce the occurrence of cracks in the spin-on glass film. Furthermore, by adopting the three-layer structure as described above, even if microcracks occur in the spin-on glass film, the effect on the metal wiring in the second layer is reduced, and furthermore, the All wiring layer due to moisture in the spin-on glass film is reduced. Can prevent corrosion.

In addition, when forming through-holes, by using the three-layer structure of the interlayer insulating film as described above, wet etching for tapering through-holes can be performed without etching the spin-on glass film layer, which has a high etch rate. A perfect taper can be obtained.

As a result, the interlayer insulating film does not constrict at the stepped portions, and the second Ag interconnection layer has a smooth shape without step breaks.

Although the present invention has been described above using Ag wiring as an example, it goes without saying that it is not limited to Ag wiring and is also effective for other metal wiring.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to reduce the occurrence or influence of cracks in the spin-on glass film used for smoothing, and the spin-on glass film is etched by the injection of etching solution when forming through-holes. Therefore, it is possible to obtain a semiconductor device having a multilayer wiring structure in which the second layer metal wiring does not have a step break.

[Brief explanation of drawings]

FIG. 1(a) and Φ) are both cross-sectional views of a semiconductor device for explaining one embodiment of the present invention, and FIG. 2(a) and Φ) are
Both are cross-sectional views for explaining a method of manufacturing a semiconductor device having a conventional multilayer wiring structure. 10.20... Semiconductor substrate, 11.21...
...First metal wiring layer, 12... Interlayer insulating film, 13°23... Spin-on glass film, 1
4.25...Second layer metal wiring layer, 15...
...Crack in spin-on glass film, 16...
...Regis), 17.26...Through hole,
18... Constriction of interlayer insulating film, 22...
- First interlayer insulating film, 24... second interlayer insulating film. Ei 7 Threshold

Claims (1)

[Claims] In a method for manufacturing a semiconductor device in which an insulating film between metal wiring layers of a semiconductor element having multilayer wiring and a through hole for obtaining conduction between the metal wiring layers are formed, an oxide film containing phosphorus is formed as the insulating film by a vapor phase growth method. After growing as a first insulating film, a spin-on glass film containing phosphorus is deposited by spin coating and baked, and subsequently an oxide film containing phosphorus is grown as a second insulating film by vapor phase growth; A method for manufacturing a semiconductor device, comprising: etching the through hole up to the second insulating film by a wet etching method, and etching the first insulating film by a dry etching method to form an opening. .