JPS61294835A - Multilayer interconnection forming method - Google Patents

Abstract

PURPOSE:To ensure the smoothing of the step parts of a wiring, by removing the corner parts of the wiring layer in the process of reducing the thickness of a film of a fluid by dry etching. CONSTITUTION:The thickness of a photoresist film 16 is reduced by dry etching such as plasma etching and reactive ion etching. In the reducing process of the film thickness, the corner parts of a first wiring layer 14 are removed. This is possible because the thickness of parts of the photoresist film corresponding to the corner parts of the first wiring layer 14 is thin. Thus the stepped parts on the wiring become smooth, and the coating property of an interlayer insulating film and the coating property of the wiring material on the interlayer insulating film are improved to a large extent.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for forming multilayer wiring in a semiconductor device such as an LSI, and particularly to a method for smoothing wiring steps.

[Summary of the Invention] This invention involves forming a fluid film by coating and curing a fluid film such as photoresist on a substrate on which a wiring layer is formed, and then reducing the thickness of the fluid film by dry etching. The corners of the wiring layer are removed while decreasing the amount of fluid, and after the fluid coating is removed, an interlayer insulating film is formed to cover the wiring layer. According to this invention, the coverage of the interlayer insulating film and the wiring material thereon can be improved.

[Prior art] Conventionally, as a multilayer wiring formation method for LSI etc., the fifth
As shown in the figure, after forming a first wiring layer 3 on the surface of a semiconductor substrate 1 with an insulating film 2 interposed therebetween, the first wiring layer 3 is covered with a CVD (chemical paper deposition) method, etc. to form an interlayer insulating film 4, and this interlayer insulating film 4
A method is known in which a second wiring layer 5 is formed by depositing a wiring metal such as AI on the wiring layer and patterning it appropriately.

[Problems to be Solved by the Invention] According to the above-described conventional method, since the step of the first wiring layer 3 is steep, the coverage (step coverage) of the interlayer insulating film 4 is poor in the portion corresponding to the step. In addition, the coverage of the wiring metal is also not good, and in the worst case,
In some cases, the second wiring layer 5 was disconnected at a portion as shown in 5a.

[Means for Solving the Problems] This invention has been made to solve the above-mentioned problems, and it improves the coverage of insulating materials and wires by smoothing the wiring steps. The purpose is to

In the multilayer wiring forming method according to the present invention, after forming a first wiring layer on a substrate, a fluid film such as photoresist is coated over the wiring layer and cured to form a fluid film, and then dry etching is performed. The corners of the first wiring layer are removed while reducing the thickness of the fluid coating, and after the fluid coating is removed, an interlayer insulating film is formed to cover the first wiring layer with no corners. A second wiring layer is formed on an interlayer insulating film.

[Function] According to the present invention, since the corners of the first wiring layer are removed, the wiring level difference becomes gentle, and the coverage of the interlayer insulating film and the coverage of the wiring material on the interlayer insulating film are greatly improved. be done.

[Example] FIGS. 1 to 4 show a multilayer wiring forming process according to an example of the present invention, and the steps (
1) to (4) will be explained in order.

(1) After forming an insulating film 12 such as silicon oxide on the surface of a semiconductor substrate 10 made of silicon or the like, any wiring material such as AI, A1 alloy, polysilicon, etc. is deposited on the insulating film 12 by a known method. . Then, the first wiring layer 14 is obtained by patterning the deposited wiring material by dry etching using a photoresist or the like as a mask.Next, after removing the etching mask, the entire surface of the substrate is coated with, for example, a rotary coating device. Apply photoresist using a spinner etc. Then, the applied photoresist is cured by baking to obtain a photoresist film 16.

(2) Next, the photoresist film 16 is etched by dry etching such as plasma etching or reactive ion etching.
The thickness of the first wiring layer 14 is reduced, and the corner portions of the first wiring layer 14 are removed during this film thickness reduction process. This is possible because, as shown in FIG. 1, the photoresist film 16 is thinner at the portions corresponding to the corners of the first wiring layer (14).

(3) Next, after removing the photoresist film 16, the Si
O2, PSG (phosphosilicate glass), 5i3Na
An interlayer insulating film 18 is formed by depositing an arbitrary insulating material such as the above on the entire surface of the substrate by CVD or the like. In this case, since the corner portions of the first wiring layer 14 have been removed in the process shown in FIG. 2, the interlayer insulating film 18 is in a good covering state.

(4) After this, the second wiring layer 2 is formed by depositing a desired wiring material on the interlayer insulating film 18 and patterning it appropriately.
form 0. In this case, since the upper surface of the interlayer insulating film 18 in the second wiring layer 20 is smooth, the second wiring layer 20 is in a good covering state, and disconnection does not occur as in the conventional case.

[Effects of the Invention] As described above, according to the present invention, the corners of the wiring layer are removed in the process of reducing the thickness of the fluid film by dry etching, so that the wiring can be reliably formed in a simple process. You can smooth out the steps. Therefore, the coverage of the interlayer insulating film and the wiring material thereon is improved, and the manufacturing yield and reliability are significantly improved.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 to 4 are cross-sectional views of a substrate showing a multilayer wiring forming process according to an embodiment of the present invention, and FIG. 5 is a cross-sectional view of a substrate showing a conventional multilayer wiring structure. . 10... Semiconductor substrate, 12... Insulating film, 14...
First wiring layer, 16... Photoresist coating, 18...
- Interlayer insulating film, 20... second wiring layer.

Claims (1)

[Scope of Claims] (a) Forming a first wiring layer on a substrate; (b) Applying a fluid onto the substrate so as to cover the first wiring layer and curing the liquid. forming a fluid film; (c) removing corners of the first wiring layer while reducing the thickness of the fluid film by dry etching; and (d) removing the fluid film. (e) forming a second wiring layer on the interlayer insulation film; and (e) forming a second wiring layer on the interlayer insulation film. Wiring formation method.