JPH0493029A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0493029A
JPH0493029A JP20989490A JP20989490A JPH0493029A JP H0493029 A JPH0493029 A JP H0493029A JP 20989490 A JP20989490 A JP 20989490A JP 20989490 A JP20989490 A JP 20989490A JP H0493029 A JPH0493029 A JP H0493029A
Authority
JP
Japan
Prior art keywords
aluminum
film
oxide film
insulating film
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20989490A
Other languages
Japanese (ja)
Inventor
Motoaki Murayama
村山 元章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20989490A priority Critical patent/JPH0493029A/en
Publication of JPH0493029A publication Critical patent/JPH0493029A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To form a stabilized inner insulating film and prevent poor connection between upper and lower wirings by applying microwaves to a coating formed on an inner insulating film. CONSTITUTION:A silicon oxide film 2 is formed on a silicon substrate 1. Aluminum is deposited on the oxide film and selectively etched into aluminum interconnections 3. A plasma oxide film 4 is formed over the surface, including the interconnections 3. A solution composed mainly of a silicon compound is applied to the surface of the oxide film 4, and this coating is heated by microwaves from a magnetron. As a result, the movement of water molecules is enhanced, and the coating, even portions on the sides of the aluminum interconnections, enhances moisture removal and turns into a stable silica film 5. A plasma oxide film 6 is deposited over the surface and etched to form a through hole 7. Aluminum is deposited on the surface, including the through hole, and the aluminum is selectively etched to form aluminum interconnections 9.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に多層配線を
有する半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device having multilayer wiring.

〔従来の技術〕[Conventional technology]

多層配線を有する半導体装置の配線領域に生ずる凹凸を
低減させるため層間絶縁膜の一部に塗布法を用いて形成
した絶縁膜を設は表面を平坦化する技術が採用されてい
る。
In order to reduce unevenness that occurs in the wiring area of a semiconductor device having multilayer wiring, a technique has been adopted in which an insulating film is formed using a coating method on a part of an interlayer insulating film and the surface is flattened.

第2図(a)〜(c)は従来の半導体装置の製造方法を
説明するための工程順に示した半導体チップの断面図で
ある。
FIGS. 2(a) to 2(c) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method of manufacturing a semiconductor device.

第2図(a)に示すように、シリコン基板]の上に設け
た酸化シリコン膜2の上にアルミニウム層を0.6μm
の厚さに堆積して選択的にエツチングし、下層配線とし
てのアルミニウム配線3を設け、アルミニウム配線3を
含む表面にプラズマCVD法による酸化シリコン膜(以
下プラズマ酸化膜と記す)4を0.5μmの厚さに堆積
する。
As shown in FIG. 2(a), an aluminum layer with a thickness of 0.6 μm is placed on the silicon oxide film 2 provided on the silicon substrate.
Aluminum wiring 3 is provided as a lower layer wiring by depositing the silicon oxide film (hereinafter referred to as plasma oxide film) 4 to a thickness of 0.5 μm using the plasma CVD method and selectively etching it. Deposited to a thickness of .

次に、プラズマ酸化膜4の上にシラノール等のシリコン
化合物を主成分とする溶液を膜厚0.15μm、の厚さ
に塗布した塗布膜を形成し、400°C程度の温度で2
0分間熱処理して脱水反応させシリカ膜5を形成する。
Next, a coating film is formed on the plasma oxide film 4 by applying a solution containing a silicon compound such as silanol as a main component to a thickness of 0.15 μm, and heated at a temperature of about 400°C for 2 hours.
A heat treatment is performed for 0 minutes to cause a dehydration reaction and form a silica film 5.

ここで、アルミニウム配線3の側面の段部ては塗布膜の
膜厚が厚くなるために、十分には脱水しきれず不安定な
シリカ膜5aか残存する。
Here, since the thickness of the coating film is thick at the stepped portions on the side surfaces of the aluminum wiring 3, the water cannot be sufficiently dehydrated and an unstable silica film 5a remains.

次に、第2図(b)に示すように、シリカ膜5の上に膜
厚0.5μmのプラズマ酸化膜6を形成し、アルミニウ
ム配線3上のプラズマ酸化膜6シリカ膜5.プラズマ酸
化膜4を順次エツチングしてスルーホール7を形成する
Next, as shown in FIG. 2(b), a plasma oxide film 6 with a thickness of 0.5 μm is formed on the silica film 5, and a plasma oxide film 6 on the aluminum wiring 3 is formed on the silica film 5. The plasma oxide film 4 is sequentially etched to form through holes 7.

次に、第2図(C)に示すように、スルーホール7を含
む表面に上層配線形成用のアルミニウム層をスパッタ法
により1.0μmの厚さに堆積する。ここで、ステップ
カバレージを改良するために基板温度を300℃程度に
加熱するため、不安定シリカ膜5aより出た水分により
、アルミニウム配線3の表面か酸化されてアルミナ絶縁
膜8が形成される場合がある。次に、アルミニウム層を
選択的にパターニングしてアルミニウム配線9を形成す
る。
Next, as shown in FIG. 2C, an aluminum layer for forming upper layer wiring is deposited to a thickness of 1.0 μm on the surface including the through holes 7 by sputtering. Here, since the substrate temperature is heated to about 300° C. in order to improve step coverage, the surface of the aluminum wiring 3 is oxidized by moisture released from the unstable silica film 5a, and an alumina insulating film 8 is formed. There is. Next, aluminum wiring 9 is formed by selectively patterning the aluminum layer.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したように従来の半導体装置の製造方法においては
、下層配線側面の段部に設けた塗布膜を十分に安定な絶
縁膜に変える事は難しく、不安定絶縁膜が残存してしま
う。この部分が後の熱処理時の水分発生源となって、下
層のアルミニウム配線の表面にアルミナ絶縁膜を形成し
、その結果上層配線と下層配線との間の接触不良を起こ
すという問題点かあった。
As described above, in the conventional semiconductor device manufacturing method, it is difficult to convert the coating film provided on the stepped portion of the side surface of the lower layer wiring into a sufficiently stable insulating film, and an unstable insulating film remains. This area became a source of moisture during subsequent heat treatment, forming an alumina insulating film on the surface of the lower layer aluminum wiring, resulting in a problem of poor contact between the upper layer wiring and the lower layer wiring. .

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置の製造方法は、半導体基板上に設け
た絶縁膜上に選択的に下層配線を設ける工程と、前記下
層配線を含む表面に第1の層間絶縁膜を形成する工程と
、前記第1の層間絶縁膜の上に絶縁膜形成用の塗布膜を
形成して表面を平滑化する工程と、前記塗布膜をマイク
ロ波誘導加熱により脱水反応させて第2の層間絶縁膜を
形成する工程と、前記下層配線上の第1及び第2の層間
絶縁膜を選択的にエツチングして開孔部を設ける工程と
、前記開孔部を含む表面に前記下層配線と電気的に接続
する」二層配線を選択的に設ける工程とを含んで構成さ
れる。
The method for manufacturing a semiconductor device of the present invention includes the steps of: selectively providing a lower layer wiring on an insulating film provided on a semiconductor substrate; forming a first interlayer insulating film on a surface including the lower layer wiring; forming a coating film for forming an insulating film on the first interlayer insulating film to smooth the surface; and forming a second interlayer insulating film by subjecting the coating film to a dehydration reaction by microwave induction heating. a step of selectively etching the first and second interlayer insulating films on the lower wiring to form an opening, and electrically connecting the surface including the opening with the lower wiring. The method includes a step of selectively providing two-layer wiring.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図(a)〜(c)は本発明の一実施例を説明するた
めの工程順に示した半導体チップの断面図である。
FIGS. 1(a) to 1(c) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention.

まず、第1図(a)に示すように、シリコン基板1の上
に酸化シリコンM2を設け、酸化シリコン膜2の上に下
層配線形成用のアルミニウム層を0.6μmの厚さに堆
積して選択的にエツチングし、アルミニウム配線3を形
成する。次に、アルミニウム配線3を含む表面にプラズ
マ酸化膜4を0.5μmの厚さに形成する。次に、プラ
ズマ酸化膜4の上にシラノール等のシリコン化合物を主
成分とする溶液をスピン法により塗布して膜厚0,15
μmの塗布膜を形成し、マグネトロンにより発生した2
、45GHzのマイクロ波で塗布膜を加熱する。2.4
5 G Hzのマイクロ波は、水の分子運動を活発化す
るので、アルミニウム配線3の側面の段部に厚く溜った
、塗布膜も十分脱水反応して全面に安定なシリカ膜5を
形成できる。
First, as shown in FIG. 1(a), silicon oxide M2 is provided on a silicon substrate 1, and an aluminum layer for forming lower wiring is deposited on the silicon oxide film 2 to a thickness of 0.6 μm. Aluminum wiring 3 is formed by selectively etching. Next, a plasma oxide film 4 is formed to a thickness of 0.5 μm on the surface including the aluminum wiring 3. Next, a solution containing a silicon compound such as silanol as a main component is applied onto the plasma oxide film 4 by a spin method to a thickness of 0.15 mm.
A coating film of μm was formed, and the 2
, the coating film is heated with a 45 GHz microwave. 2.4
Since the 5 GHz microwave activates the movement of water molecules, the coating film thickly accumulated on the stepped portions of the side surfaces of the aluminum wiring 3 is sufficiently dehydrated to form a stable silica film 5 on the entire surface.

次に、第1図(b)に示すように、全面に膜厚0.5μ
mのプラズマ酸化膜6を堆積し、アルミニウム配線3の
上のプラズマ酸化膜6.シリカ膜5 プラズマ酸化膜4
を選択的に順次エツチングしてスルーホール7を形成す
る。
Next, as shown in Figure 1(b), a film with a thickness of 0.5 μm was applied to the entire surface.
A plasma oxide film 6 of 6.m is deposited on the aluminum wiring 3. Silica film 5 Plasma oxide film 4
Through holes 7 are formed by selectively and sequentially etching.

次に、第1図(c)に示すように、スルーホール7を含
む表面に膜厚1.0μmのアルミニウム層を堆積し、こ
れを選択的にエツチングしてスルーホール7のアルミニ
ウム配線3の接続するアルミニウム配線9を形成する。
Next, as shown in FIG. 1(c), an aluminum layer with a thickness of 1.0 μm is deposited on the surface including the through hole 7, and this is selectively etched to connect the aluminum wiring 3 of the through hole 7. An aluminum wiring 9 is formed.

なお上記の工程を繰返すことにより3層以」二の多層配
線にも適用可能である。
Note that by repeating the above steps, it is also possible to apply the present invention to multilayer wiring of three or more layers.

また、塗布膜の加熱工程に、マイクロ波誘導加熱のみを
用いたが、他の加熱方式(ランプ加熱やヒータ加熱等)
と併用しても良い。
In addition, although only microwave induction heating was used in the heating process of the coating film, other heating methods (lamp heating, heater heating, etc.)
May be used in combination with

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、第1の層間絶縁股上に形
成した塗布膜をマイクロ波による誘導加熱を用いる事に
より、段部の水の分子運動を活発化し下層配線側面の段
部に溜った厚い塗布膜についても十分脱水されるので、
安定な層間絶縁膜を形成することができる。その結果、
スルーホール形成後に上層配線形成用のアルミニウム層
のステップカバレージを良くするための基板加熱におい
ても下層のアルミニウム配線の表面にアルミナ絶縁膜を
生ずることかなく、上層配線を下層発生との間の良好な
電気的接触をもつ多層配線を有する半導体装置が実現で
きるという効果を有する。
As explained above, the present invention uses induction heating using microwaves on the coating film formed on the first interlayer insulation crotch to activate the movement of water molecules in the stepped portion and to prevent the water from accumulating in the stepped portion on the side surface of the lower wiring. Even thick coatings are sufficiently dehydrated, so
A stable interlayer insulating film can be formed. the result,
Even when the substrate is heated to improve the step coverage of the aluminum layer for forming the upper layer wiring after forming the through holes, no alumina insulating film is formed on the surface of the lower layer aluminum wiring, and there is a good gap between the upper layer wiring and the lower layer. This has the effect that a semiconductor device having multilayer wiring with electrical contact can be realized.

1・・・シリコン基板、2・・・酸化シリコン膜、3゜
9・・アルミニウム配線、4,6・・プラズマ酸化膜、
5・・シリカ膜、5a・・不安定シリカ膜、7・・スル
ーホール、8・・アルミナ絶縁膜。
DESCRIPTION OF SYMBOLS 1...Silicon substrate, 2...Silicon oxide film, 3゜9...Aluminum wiring, 4,6...Plasma oxide film,
5...Silica film, 5a...Unstable silica film, 7...Through hole, 8...Alumina insulating film.

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上に設けた絶縁膜上に選択的に下層配線を
設ける工程と、前記下層配線を含む表面に第1の層間絶
縁膜を形成する工程と、前記第1の層間絶縁膜の上に絶
縁膜形成用の塗布膜を形成して表面を平滑化する工程と
、前記塗布膜をマイクロ波誘導加熱により脱水反応させ
て第2の層間絶縁膜を形成する工程と、前記下層配線上
の第1及び第2の層間絶縁膜を選択的にエッチングして
開孔部を設ける工程と、前記開孔部を含む表面に前記下
層配線と電気的に接続する上層配線を選択的に設ける工
程とを含むことを特徴とする半導体装置の製造方法。
A step of selectively providing a lower layer wiring on an insulating film provided on a semiconductor substrate, a step of forming a first interlayer insulating film on a surface including the lower layer wiring, and a step of forming an insulating layer on the first interlayer insulating film. a step of forming a coating film for film formation and smoothing the surface; a step of dehydrating the coating film by microwave induction heating to form a second interlayer insulating film; and a step of forming a second interlayer insulating film on the lower wiring. and a step of selectively etching the second interlayer insulating film to provide an opening, and a step of selectively providing an upper layer wiring electrically connected to the lower layer wiring on the surface including the opening. A method for manufacturing a semiconductor device, characterized in that:
JP20989490A 1990-08-08 1990-08-08 Manufacture of semiconductor device Pending JPH0493029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20989490A JPH0493029A (en) 1990-08-08 1990-08-08 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20989490A JPH0493029A (en) 1990-08-08 1990-08-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0493029A true JPH0493029A (en) 1992-03-25

Family

ID=16580411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20989490A Pending JPH0493029A (en) 1990-08-08 1990-08-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0493029A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2332983A (en) * 1997-12-31 1999-07-07 Samsung Electronics Co Ltd Forming a thin film on a wafer using microwave heating
US8552411B2 (en) 2011-03-01 2013-10-08 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2332983A (en) * 1997-12-31 1999-07-07 Samsung Electronics Co Ltd Forming a thin film on a wafer using microwave heating
GB2332983B (en) * 1997-12-31 2000-06-21 Samsung Electronics Co Ltd Apparatus for forming thin film using microwave and method therefor
US6384390B1 (en) 1997-12-31 2002-05-07 Samsung Electronics Co., Ltd. Apparatus for forming thin film using microwave and method therefor
US8552411B2 (en) 2011-03-01 2013-10-08 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device

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