JPH03242937A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce a projecting part inside a contact hole and thereby to prevent disconnection of a metal wiring and to improve the reliability of a circuit element by a method wherein an insulating film which can be melted by heat is formed on a semiconductor substrate subjected to a prescribed processing and then heat treatment is executed in the atmosphere of a hydrogen gas. CONSTITUTION:A BPSG (boron-phosphorus silica glass) insulation film 8 as an insulating film which can be melted by heat is formed on a semiconductor substrate 1 and then heat treatment is executed in the atmosphere of a hydrogen gas. Thereafter, patterning is executed by a photomask technique, wet etching is executed by using a buffered fluorine acid of 20:1, the rest of the BPSG insulation film 8 and an oxide film 7 are etched completely in succession by a dry etching technique, and thereby a contact hole 9 is formed. Next, an Al film which is a metal wiring is evaporated by a sputtering technique, the wiring of the Al film 10 is formed by technique, and thus MOSFET is manufactured. This method makes it possible to prevent disconnection at a stepped part of the Al film 10 or in the part of the contact hole 9 and to improve the reliability of a semiconductor integrated circuit element.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device such as a semiconductor integrated circuit element having high-density metal wiring.

BACKGROUND OF THE INVENTION In recent years, semiconductor integrated circuit devices have become more dense and highly integrated, and as a result, metal wiring lines have become thinner and thinner, causing wire breaks at stepped portions and contact holes.

Below, a conventional method for manufacturing a semiconductor device, particularly a method for manufacturing an MO8 field effect transistor (FET), will be explained in FIGS. 2(a) to 2(a).
This will be explained using (C).

First, the silicon substrate 1 is oxidized to form an LOG of about 500 nm.
OS (Local Oxidation of 5
ilicon) Grow the oxide film 2. After that, 25
A gate oxide film 3 of the OA is formed in a high temperature oxidizing atmosphere, and boron ions are implanted for threshold voltage control. Subsequently, a polycrystalline silicon film is grown to a thickness of about 400 nm using the CVD method. Thereafter, gate electrode 4 made of a polycrystalline silicon film is processed into a predetermined shape using conventional photomask technology and dry etching technology, and then ion implantation is performed to form source region 5 and drain region 6. Then, the oxide film 7 is coated with normal pressure CV.
The film is grown to a thickness of about 200 nm by the D method, and then a BPSG (boron-phosphosilicate glass) insulating film 8a is grown to a thickness of about 600 nm as a heat-meltable insulating film by the normal pressure CVD method. At this time, the P (phosphorus) concentration of the BPSG insulating film 8a is 6 to 8 wt%, and the B (boron) concentration is 4 wt% or less. Next, patterning is performed using normal photomask technology, and then buffered hydrofluoric acid 20:1 (NH4F
:HF=20:1) to about 350 nm (etching for 12 minutes), and then the remaining BPSG insulating film 8a and oxide film 7 are completely etched by a dry etching technique to form a contact hole 9a.

Next, as shown in (b) and (c), an Ae film 10a, which is a metal wiring, is deposited to a thickness of about 800 nm using a sputtering technique. However, the protruding portions 11a indicated by dotted circles in (b) and (c) are made of buffered hydrofluoric acid 20:1.
The boundary between the area where etching has been completed for approximately 350 nm using etching and the area where dry etching has begun has a protruding cross section, and the thickness of the Ae film 10a in this area is thinner.
Ae film 1 due to insufficient step coverage
Disconnection of 0a is likely to occur. This is largely due to a decrease in reliability of the semiconductor device.

Problems to be Solved by the Invention In such a conventional configuration, there was a problem in that the step coverage of the A film in the protruding portion of the contact hole was insufficient, resulting in disconnection.

The present invention solves the above-mentioned conventional problems by preventing wire breakage at the stepped portions and contact hole portions of the AQ film, improving step coverage of the Ae film, and reducing the cross-sectional area at the stepped portions and contact hole portions. First, it is an object of the present invention to provide a method for manufacturing a semiconductor device that can improve the reliability of a semiconductor integrated circuit element.

Means for Solving the Problems In order to achieve this object, the present invention forms an insulating film that can be thermally melted on a semiconductor substrate, heat-treats the semiconductor substrate on which the insulating film is formed, and then heat-treats it in a hydrogen gas atmosphere. , contact holes are formed by wet etching to a predetermined depth, followed by dry etching, and metal wiring is provided in the contact holes.

Effect: With the above-described structure, the present invention uses buffered hydrofluoric acid 20:1 from the surface of the insulating film to about 250 nm.
The etching rate of (NH4F:HF=20:1) is lower than that of an insulating film not subjected to heat treatment in a hydrogen gas atmosphere, and the etching rate becomes approximately half. This is because the P(
This is presumed to be due to diffusion of phosphorus outside the membrane. This phenomenon causes the insulating film to be coated with 350nm buffered hydrofluoric acid 20:1 (
When etching is performed using NH4F: ) (F20.1), the protruding portion of the contact hole is relaxed due to the difference in etching rate.

Embodiments Hereinafter, embodiments of the present invention will be described along with the drawings in FIGS. 1(a) to (d). Parts that are the same as those in FIG. explain.

That is, in the present invention, after forming the heat-meltable BPSG insulating film 8, the temperature is increased to 900 to 900°C in a hydrogen gas atmosphere.
950℃ + H2 gas 1 (N!/min, processing time 20
Heat treatment is carried out under conditions of 10 minutes.

Thereafter, as shown in (C), patterning is performed using normal photomask technology, and buffered hydrofluoric acid 20:1 (N
H4F: Approximately 350n using HF=20:1)
Then, the remaining BPSG insulating film 8 and oxide film 7 are completely etched by wet etching (etching for 16 minutes), and a contact hole 9 is formed. Next, an Ae film, which is a metal wiring, is deposited to a thickness of about 800 nm using sputtering technology, and 10 Ae films as shown in (C) and (d) are deposited using photoson technology.
wiring is formed and a MOSFET, which is a semiconductor device, is manufactured. The shape of the protruding portion 11 marked with a dotted circle in (C) is the same as the protruding portion 1 of the conventional example shown in FIG.
Ae film 1 becomes looser than 1a and adheres to that part.
It is shown that the film thickness of 0 becomes thicker. In addition,
Although the treatment time was longer than 20 minutes in a hydrogen gas atmosphere, the same effect was obtained. In addition, the wet etching of the insulating film 8 had the effect of making the protruding portions 11 gentler when the thickness was 300 nm or more.

Effects of the Invention As is clear from the above embodiments, according to the present invention, after forming a thermally meltable insulating film on a semiconductor substrate that has been subjected to a predetermined treatment, heat treatment is performed in a hydrogen gas atmosphere. The protruding portion inside the contact hole is relaxed, preventing disconnection of the metal wiring, and improving the reliability of the semiconductor integrated circuit element.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views of a semiconductor device showing the manufacturing process according to an embodiment of the present invention, and FIGS. 2(a) to (C) are semiconductor sectional views showing the manufacturing process of a conventional semiconductor device. FIG. 2 is a cross-sectional view of the device. ■・・・Silicon substrate (semiconductor substrate), 8...
...Insulating film, 9...Contact hole, 10...
...AeFM (metal wiring).

Claims (3)

[Claims] (1) a step of forming an insulating film that can be thermally melted on a semiconductor substrate that has been subjected to a predetermined treatment; and a step of heat-treating the semiconductor substrate on which the insulating film is formed in a hydrogen gas atmosphere;
wet etching the insulating film to a desired depth and then dry etching it to form a contact hole;
A method for manufacturing a semiconductor device, comprising the steps of providing metal wiring using a vapor deposition technique and a photolithography technique. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the heat treatment conditions in a hydrogen gas atmosphere include a temperature of 900 to 950° C. and a treatment time of at least 20 minutes. (3) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the insulating film is wet-etched using buffered hydrofluoric acid to a depth of 300 nm or more.