JPH04232993A - Image data recording and display circuit - Google Patents

Abstract

PURPOSE:To prepare an address conversion table for setting the addresses to be outputted in order for a display controller to access the video signals from the outside to a video memory and to form and control the addresses for controlling a display screen by these addresses. CONSTITUTION:The addresses outputted at the time when the display controller writes the image data from the outside into a video memory are converted to a table memory for image writing and the addresses to be outputted at the time when the display controller reads in the video data from the memory is converted by a table memory for image writing. The contents of the table memory for image writing are rewritten at need from a CPU, by which the disposition of the image data in the video memory is freely set.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention allows a display controller to once write an external video signal to a video memory as image data for one screen, and then display the image data written to the video memory. This invention relates to an image data recording and display circuit used in an image display device that repeatedly reads data from a controller and displays it on a display.

0002

2. Description of the Related Art Conventionally, when a display controller reads or writes from a video memory, the output addresses change in the same order as when reading and writing. That is, a screen that corresponds one-to-one with a screen input from the outside is displayed on the display.

[0003] In such a situation, in order to reduce display flicker, as in the case of a liquid crystal display with a drive type that is driven by a two-screen display (upper and lower), the screen must be divided into two screens (upper and lower) and the pixel groups must be driven alternately. When using a display with a single display, when an image displayed in the upper half of the screen is accessed, an even address is output from the display controller, and when an image in the lower half is accessed, an odd address is output from the display controller. .

0004

[Problems to be Solved by the Invention] In the conventional method described above, the relationship between the pixels of the display and the data structure of the video memory is such that the even addresses of the video memory are located in the upper half of the screen, and the odd addresses are located in the lower half of the screen. It corresponded to However, when image data in the video memory is processed by a CPU and programmed by a programmer, the image data is placed in the video memory at the same position as the placement of figures on the screen as seen by the human eye. It was difficult to handle without it. That is,
It would be difficult to handle unless image data corresponding to a pixel group immediately to the right of a certain pixel group on the screen was placed at the next address in the video memory. . In addition, it was impossible to double the screen vertically, perform arbitrary scrolling, and combine another screen into the screen.

[0005]

[Means for Solving the Problems] The present invention has been devised in view of the above-mentioned problems of the conventional art.The present invention has been made in view of the above-mentioned problems of the conventional art. the image data written to the video memory is read by the display controller;
In an image data recording/display circuit that repeatedly displays images on a display, an address conversion table for setting an address to be output by the display controller to access the video memory, and an address conversion table for setting an address to be outputted by the display controller to access the video memory; Arranging the image data on the top, displaying the image at double height,
This invention proposes an image data recording and display circuit that generates and controls addresses corresponding to scrolling and multiple screen displays.

[0006]

[Function] The present invention solves the problem of memory data arrangement within the video memory, displays the screen with double height, and scrolls an arbitrary amount of the screen.
For the purpose of simultaneously displaying an external screen and compositing images, the address output when the display controller writes external image data to the video memory is set to the image writing table. −Convert using bull memory. Furthermore, the address output when the display controller reads image data from the video memory is converted by the image reading table memory.

Therefore, by rewriting the contents of the image writing table memory from the CPU as necessary,
When writing external image data to the video memory, the arrangement of the image data within the video memory can be set.

[0008] To perform screen compositing, part of the contents of the image reading table memory is read out from an area other than the area used to display the current screen in the video memory. If you set , another screen will be composited and displayed within the currently displayed screen.

Furthermore, by setting the contents of the image reading table memory described above, even when external images change over time, another screen can be composited and displayed on a part of the screen. .

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram of the present invention. decoder(
1) is a memory read signal CPU-RD output from the CPU (3), a memory write signal CPU-WR, a memory read signal LCDC-RD output from the liquid crystal controller (2), a memory write signal LCDC-WR,
The address CPU-ADRS output from the CPU 3 and the bus switching signal SEL set by the program are decoded to generate switching signals S1, S21, S22, S3.
, and S4.

The switching circuit SW1 (8) is connected to the decoder (1
), the video memory (4) is accessed by the liquid crystal controller (2) or the CPU (3
) determines whether to access it. Switching circuit SW2 (
9) are the switching signals S21 and S from the decoder (1).
LCD controller (2) or CP depending on the combination of 22
Determine which table memory U(3) should access. The switching circuit SW3 (10) uses the switching signal S3 from the decoder (1) to determine whether the liquid crystal controller (2) or the CPU (3) accesses the video memory (4), or the CPU (3) accesses the address conversion table. Decide whether to access memory (5) itself. Switching circuit SW4 (
11) determines whether the video memory (4) is to be accessed by the liquid crystal controller (2) or by the CPU (3) based on the switching signal S4 from the decoder (1).

In the above configuration, the liquid crystal controller (
In the memory map seen from 2), the arrangement of data in the video memory (4) is determined by the contents of the address conversion table memory (5). The memory map seen from the CPU (3) includes video memory (4), table memory for image reading (
6) and an image writing table memory (7) are arranged at separate addresses.

[0013] The liquid crystal controller (2) has a video memory (
4), the program sets SEL to the LCD controller (2) side, and
) The addresses output from SW1 (8) and SW2 (9
), it is input to the image reading table memory (6) when reading data, and to the image writing table memory (7) when writing data. The output of table memory (5), that is, the converted address is SW3 (10
) is input to the video memory (4), and SW4 (1
1), the liquid crystal controller (2) reads and writes image data.

When the CPU (3) accesses the video memory (4), the program sets SEL to the CPU (3) side and outputs an address for accessing the video memory (4). This address is SW1 (8), SW2
(9), passes through SW3 (10) without being input to the address conversion table memory (5), and enters the video memory (4).
The CPU (3) reads and writes the image data through SW4 (11).

When the CPU (3) accesses the address translation table memory (5), the program sets SEL to the CPU (3) side and outputs the address for accessing the address translation table memory (5). . This address passes through SW1 (8) and SW2 (9), is input to the address conversion table memory (5), and is sent to SW3 (10).
Through this, the CPU (3) reads and writes table contents, that is, address information.

[0016] The liquid crystal display (1
2) is of the type that is driven by being divided into two screens, upper and lower, as described above. In addition, the LCD controller (2) used here is set to an upper and lower two-screen operation mode according to the LCD display (12) used, and when the upper half of the screen is accessed, the LCD controller (2) is set to an even-numbered address. However, when the lower half is accessed, an odd address is output.

Therefore, when address conversion is not performed, the pixels of the liquid crystal display (12) and the video memory (4
), even-numbered addresses of the video memory (4) correspond to the upper half of the screen, and odd-numbered addresses correspond to the lower half of the screen. On the other hand, when image data in the video memory (4) is processed by the CPU (3), it is better for the image data to be arranged linearly on the addresses in the video memory (4) from the perspective of the CPU (3). Easy to handle.

In order to solve this problem, the image writing table memory (7) and the image reading table memory (6) are arranged so that the image data is arranged linearly on the address as seen from the CPU (3). CP address table
Write from U(3). This allows the LCD controller (
The image data taken in from the outside by 2) is linearly arranged and stored in the video memory (4), and the image data read from the video memory (4) by the liquid crystal controller (2) is stored on the screen from the outside. is displayed on the liquid crystal display (12) in the same format as .

[0019] Next, when displaying the screen from the outside in a vertically doubled manner, the addresses in the image writing table memory (7) or the image reading table memory (6) are set twice each. .

Next, when scrolling the screen displayed on the liquid crystal display (12) vertically or in a ring shape, rotate the entire contents of the image reading table memory (6) vertically. When scrolling in a shifting manner, the entire contents of the image reading table memory (6) are shifted vertically, and image data that becomes entirely black pixels or white pixels is transferred to areas where there is no external screen. Prepare it in advance,
Set the address to access this.

Next, when displaying a composite screen (referred to as screen B) within one screen (referred to as screen A), the image data of screen B is stored in a separate area of the video memory (4) in advance. is written from the CPU (3) and a part of the image reading table memory (6) is rewritten so that screen B can be displayed. At this time, the place to rewrite is on screen A and screen B.
Determine according to the position to be displayed. And screen B
Video memory compatible with screen B even after displaying (4)
If the CPU (3) changes the contents of the area, it will be reflected on screen B. Furthermore, multiple screens can be combined as long as the capacity of the video memory (4) allows.

The above-mentioned operations can be performed not only on external image data but also on images written into the video memory 4 by the CPU 3.

[0023]

Effects of the Invention Even when using a display that is driven by being divided into two screens, upper and lower, the image data in the video memory can be arranged linearly on addresses as viewed from the CPU, making it easy to perform image processing.

[0024] Even if the external screen is a moving image, vertical display, vertical scrolling, and screen compositing can be performed. In screen compositing, another screen can be synthesized and displayed without destroying the image data of the currently displayed screen stored in the video memory. Examples of screen composition include arbitrary screen display, time display,
The status display will be raised.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

[Explanation of symbols]

1 Decoder, 2 Liquid crystal controller, 3 CPU, 4 Video memory 5 Address conversion table memory, 6 Image reading table memory, 7 Image writing table memory, 8 Switching circuit SW1, 9 Switching circuit SW2, 10 Switching circuit SW3, 11 Switching Circuit SW4, 12 LCD display

Claims (1)

[Claims] Claim 1: A display controller once writes an external video signal into a video memory as image data for one screen, and the image data written to the video memory is transferred to the display controller. In image data recording and display circuits that repeatedly read and display on a display,
an address conversion table for setting an address output by the display controller to access the video memory;
and an address corresponding to arrangement of the image data on the video memory, vertically doubled display, scrolling, and display of a plurality of screens using the address. Data recording and display circuit.