JPH0421127A - Calculating device - Google Patents

Abstract

PURPOSE:To save the areas of a storage device by controlling a program counter based upon an output signal outputted from the storage device, indicating a specific position and outputting a program instruction stored in the specified address. CONSTITUTION:A central processor 103 controls the program counter 104 and an output device 101 in accordance with the program instruction outputted from the storage device 105. In a normal operation, the processor 103 controls the counter 104 based upon the program instruction stored in the device 105 and designates the succeeding address of the device 105. The processor 103 controls the output device 101 based upon a specific program instruction. The device 101 outputs a specific signal to the external and the signal is connected to an interrupting device 102. The device 102 receiving the output signal controls the counter 104 and designates a specific address to the device 105. Thus, control can be transferred to another specific page address only by executing one program instruction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a method for controlling a storage device in a computing device.

[Conventional technology]

In a computing device, the storage area that can be controlled solely by the program instruction is limited depending on the word length of the program instruction.

For example, in a computing device where the lgH length of a program instruction is fixed at 12 bits, even if all 12 bits are used, the data will be written as 2 to the 12th power (4096).
It is possible to control only the l device area.

Furthermore, among the 12 bits of 1 word length, there is also a bit that provides information on what kind of control is to be performed to the central processing unit. Approximately 6 bits are allocated, and only 2 to the 6th power (64) of storage device areas can be controlled.

The method used as a solution to this problem is to divide the storage device area into units called pages, and specify the storage device address in two steps.

When specifying a desired storage device address, first, the page to which the desired storage device address belongs is specified by a program instruction. Next, a desired storage device address within the page is specified by a program instruction.

[Problems to be Solved by the Invention] However, when transferring control to the storage device address of an external page, two program instructions must be executed, which consumes the storage device area.

In addition, this method of controlling a single device by dividing it into several pages is used for computing devices, etc., where the area of storage and failure devices is limited, and wasting storage space can be fatal. This can be a serious problem.

An object of the present invention is to make it possible to transfer control to a storage device address of another page by simply executing one program instruction.

[Means for Solving the Problems] A computing device of the present invention includes: a) a storage device that outputs a program instruction stored at an address by specifying the address; and b) a program stored in the storage device. a central processing unit that interprets instructions and controls other devices; C) a program counter that points to a location within the storage device under control from the central processing unit; and d) under control from the central processing unit. , an output device that enables external control; and e) an interrupt control device that controls the program counter based on a signal from the output device.

[Operation] Program instructions stored in the storage device are output to the central processing unit.

The central processing unit interprets program instructions from the storage device and controls the program counter to point to the next storage device location, or causes the output device to output a signal to the outside. control like this.

The output device outputs a signal to the outside based on instructions from the central processing unit, and this signal is returned to the interrupt control device on the computer.

An interrupt controller controls the program counter based on the output signal and points the storage device to a specific location.

When a new address is pointed to by the program counter, the storage device outputs the program instruction stored in the pointed address to the central processing unit.

[Example] FIG. 1 is a block diagram showing the configuration of the present invention.

Reference numeral 105 denotes a storage device in which program instructions for the central processing unit 103 are stored.

A central processing unit 103 controls a program counter 104 and an output device 101 according to program instructions output from a storage device 105.6 During normal operation, the program instructions stored in the storage device 105 are , 103 central processing units, 10
The program counter 4 is controlled, and the next address of the storage device 105 is pointed to.

However, specific program instructions control the output device at 101 by the central processing unit at 103. Furthermore, 1
The output device 01 outputs a specific signal to the outside, but this signal line is connected to the interrupt control device 102, and upon receiving this signal, the interrupt control device 102 outputs a specific signal to the outside. It controls the program counter and points the storage device 105 to a specific address.

FIG. 2 is a block diagram showing the case where the present invention is applied to a 4-bit, 1-chip microcomputer.

200 indicates a 4-bit l-chip microcomputer, which has an output terminal "o o" and an interrupt input terminal "INT".
” is wired.

This 4-bit, 1-chip microcomputer is controlled by program instructions of 12 bits per word length stored in a memory device, and the memory device can store program instructions for a maximum of xo24 stories.

However, this storage device has 16 pages (6 pages per page).
4 words), and two commands must be executed to move to an external page.

Additionally, the central processing unit is capable of interpreting and executing at least the following types of instructions:

LDP command... When specifying an execution address beyond a page, use this command to specify the page in advance.

The program counter is incremented by one. “LDP
If it is set to "O", O page will be set.

JP instruction: Controls the program counter and moves the execution address in the storage device to a specified address. However, since only the lower 6 bits of the program counter are controlled, it is not possible to specify beyond the page; if "JPOO" is specified, control is transferred to address 00 within the set page.

NOP instruction: only increments the program counter by one, and does not perform any other processing.

0LIT command: Instructs the output device to output a high level or low level signal. “0tJ
If it is set to "T O", a low level output will be made from the output terminal "°00°", and if it is set to "OUT 1", a high level output will be made from the output terminal "00°".In addition, the output terminal "o o" ”, the initial state is a low level output.

The program counter is incremented by one.

In addition, this 4-bit L-chip microcomputer is
Equipped with interrupt function, interrupt input terminal "I"
If there is a rising signal from a low level to a high level for ``NT'', no matter what program instruction is being executed, when the execution of that program instruction is finished,
Control is transferred to a specific storage device address (380H).

The third section is a diagram showing the location of program instructions stored in the storage device.

The program execution start address is 3CO)I, which is 1
This is the first address of the 6th page. The program execution start address when an interrupt occurs is 380H, which is 1
This is the first address of the fifth page.

First, the program instruction "N OP" stored at address 3COH in the storage device is executed, and since this instruction only increases the program counter by one, address 3CIH is specified.

Next, the program instruction “CI” stored at address 3CIH
After T 1" is executed and the output device is controlled to output at a high level, the program counter is incremented by one, but since the output terminal °'00" and the interrupt input terminal "INT" are connected, an interrupt is not generated. occurs, the program counter is unconditionally moved to address 380H, and the program instruction "N OP" stored at address 380H is executed.

FIG. 4 is a timing diagram showing the operation when the present invention is applied to a 4-bit, 1-chip microcomputer.

The clock is the basic clock of this system.

Each operation is performed based on this signal. Each program instruction is operated every four clocks.

The operation will be explained in chronological order below.

-Initial state- The program counter is given 3COH as an initial value, and the program command is stored in 3COH.
P” command is about to be executed.

The output terminal "00" is given a low level as an initial value, and the interrupt input terminal connected to this output terminal.
I NT ” also goes to a low level.

-Execution of 0UT instruction- Program instruction "0UT1" stored in 5CIH
When executed, the state of the pressure terminal "o o" changes from a low level to a high level. Accordingly, the interrupt input terminal “INT” is connected to the output terminal “00”.
also changes from low level to high level.

- Interrupt Occurrence - Since the interrupt input terminal "INT" changes from low level to high level, an interrupt is generated and the program counter is unconditionally moved to 380H.

With the above, one program command ("01JT1')
By simply executing , the specified address in the storage device has been moved to the address of another page.

[Advantageous Effects of the Invention 1] According to the present invention, by using the interrupt function in the computing device, by simply executing one program instruction,
Since control can be transferred to a specific other page address, storage space can be expected to be saved, and more functions can be implemented on the same computer. Particularly in a one-chip microcomputer with a small storage area, even a small amount of storage area savings can have a large effect.

Further, since the present invention uses an existing computing device and only adds one external connection, there is no need to develop new hardware, and development man-hours can be reduced and development can be carried out at low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the present invention. FIG. 2 is a block diagram showing the case where the present invention is applied to a 4-bit, 1-chip microcomputer. FIG. 3 is a diagram showing the location of program instructions stored in a storage device. FIG. 4 is a timing diagram showing the operation when the present invention is applied to a 4-bit L-chip microcomputer. Output device/interrupt control device central processing unit/program counter/record/l device 200/4-bit l chip microcomputer/program execution start address/program execution start address or higher when an interrupt occurs Applicant: Seiko Epson Corporation

Claims (1)

[Scope of Claims] A) A storage device that outputs a program instruction stored at an address by specifying an address; and b) A storage device that interprets the program instruction stored in the storage device and controls another device. c) a program counter that points to a location within the storage device under control from the central processing unit; and d) an output that allows external control under control from the central processing unit. and e) an interrupt control device that controls the program counter based on a signal from the output device.