JPS61151752A - Microcomputer program development support device - Google Patents

Abstract

PURPOSE:To store only the result of execution at a desired address by providing a storage command memory in which information whether or not execution result of a program is stored in a storage means is written in advance and a command means outputting a write command to the storage means. CONSTITUTION:When a read SR or a write SW signal is outputted from a CPU1, a command circuit 10 outputs a write command signal Sp to a RAM control circuit 4 only when the address content of a memory designated by an address bus 7 in the own circuit is logical 1, and does not output the signal Sp when the address content of the memory is 0. The RAM circuit 4 uses the Sp signal to output a control signal Sc to a RAM3, from which each information is fed to an input/output circuit 5 via a data bus 9 and displayed. That is, only the result of execution of an address of a program memory 2 corresponding to the address of a memory in the command circuit 10 written with logical 1 in advance is stored in the RAM3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program development support device that accumulates a history of program execution by a microcomputer.

[Conventional technology]

FIG. 3 is a block diagram of a conventional microcomputer program development support device.

In this device, the program execution history is accumulated as follows. First, when a read signal Sl or a write signal Sw is output from the CPU t to the program memory 2, these signals S and Sv are output to RA via the OR circuit 6.
The signal is input to the M control circuit 4 as a write instruction signal. Then, the RAM control circuit 4 sends a control signal Sc that instructs the write address and write timing to the RAM 3 to R.
Output to AN 3, read signal Ss, write signal Sw,
Each information of address bus 7 and data bus 8 is stored in RAM 3.
written to. After this.

The RAM control circuit 4 increments the write address for the RAN 3 and waits for the next write. In this way, the read signal SR and write signal Sw are transmitted from cput.
When any of the information is output, each information is sequentially stored in RAM 3.
is accumulated in

Next, when a read command is input from the input/output circuit 5 by the operator, a stop signal of 5 signals is first sent from the input/output circuit 5 to the CPU l to stop the CPU t, and then a read request signal Srs is sent to the input/output circuit. 5 to the RAM control circuit 4, and the RAM control circuit 4 instructs the read address for the RAM 3.
3, and each piece of information stored in the RAM 3 is sent to the input/output circuit 5 via the data bus 9, where it is displayed. In this way, the program execution history was output.

[Problem that the invention seeks to solve]

However, in this conventional device, program execution results are accumulated every time a read signal S* or a write signal Sw is output from the CPU t, so that even unnecessary information is accumulated in the RAM 3. In particular, like high-level languages,
In a program trace where the number of machine language instructions does not match one statement of a program created by the user, only the result of the start address of the machine language corresponding to one statement is required, but unnecessary execution results are stored in RAM 3. There was a problem that it was written.

An object of the present invention is to provide a microcomputer program development support device that can store only the execution results of arbitrary addresses in the program memory 2.

[Means for solving problems]

The microcomputer program development support device of the present invention stores only the execution result of a desired address of the program memory, and stores the execution result of the program at this address in the storage means corresponding to each address of the program memory. The storage device includes an accumulation instruction memory in which information indicating whether or not to use the storage device is written in advance, and an instruction device that outputs a write instruction to the storage device based on the contents of the accumulation instruction memory.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a microcomputer program development support device according to an embodiment of the present invention.This embodiment eliminates the OR circuit 6 in the conventional example of FIG. 3 and uses an instruction circuit instead. O
It has been established. The instruction circuit 10 has memories 11, 12 . . . having addresses corresponding to each address of the program memory 2, as shown in FIG. AND circuit 13.1
4 and an OR circuit 15, "1" is written in advance to the address of the memory 11 corresponding to the address of the program memory 2 where the write result is to be stored, "0" is written to the other addresses, and the read result is to be stored. “1” at the address of memory 12 corresponding to the address of program memory 2
'', and 0'' is written in advance to other addresses. Therefore, when the write signal Sv or read signal SR is input to the instruction circuit 10, if the content of the address of the memory 11.12 specified by the address bus 7 is "1", the output of the AND circuit 14.13 is "1". If the contents of the specified addresses of the memories 11 and 12 are 0'', the write instruction signal SP is outputted via the REOR circuit 15.

Next, the operation of this embodiment will be explained.

Read signal SR or write signal S from the main CPU1
When w is output, the instruction circuit 1O outputs a write instruction signal sp to the RAM control circuit 4 only when the content of the address of the memory 12.11 specified by the address bus 7 at this time is "1". The subsequent operation of writing information to the RAN 3 and the operation of reading the accumulated execution history are similar to those of the conventional example.

That is, only the execution result of the address of the program memory 2 corresponding to the address of the memory 11, 12 in which "1" has been written in advance is stored in the RAM 3.

〔Effect of the invention〕

As explained above, according to the present invention, only the program execution result is stored in the RAM at the address specified by the storage instruction memory.
3, it is possible to store only the first part of an instruction that is 2 bytes or more, or to store the execution results only when an arbitrary range of programs is executed, and it is also possible to store the execution results for a single statement in a high-level language program. By storing only the first address of the machine language to be used, it is also possible to see the history of the flow of sentences in the high-level language.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a microcomputer program development support apparatus according to an embodiment of the present invention, FIG. 2 is a block diagram of the instruction circuit 10 of FIG. 1, and FIG. 3 is a block diagram of a conventional example. DESCRIPTION OF SYMBOLS 1... CPU, 2... Program memory, 3... RAM, 4... RAM control circuit, 5... Input/output circuit. 7...Address bus, 8.9...Data bus, 10...Instruction circuit, 11.12...Memory. 13.14...AND circuit, 15...OR circuit, SR...read signal, Sw...write signal, Sc...control signal. ST...Stop signal, Sp...Write instruction signal, Sl)...Read request signal.

Claims (1)

[Claims] A program memory in which a program is stored, and a CP
In a microcomputer program development support device having a storage means for storing program execution results by U, information indicating whether or not the program execution result at the address is to be stored in the storage means corresponding to each address of the program memory. A microcomputer program development support device comprising: an accumulation instruction memory in which is written in advance; and instruction means for outputting a write instruction to the accumulation means based on the contents of the accumulation instruction memory.