JPH04199131A - Nonlinear resistor element and its production - Google Patents

Abstract

PURPOSE:To eliminate defects in an element such as short-circuit or disconnection of wires by successively forming a first electrode layer, nonlinear resistor layer, second electric layer on an insulating substrate and further forming an insulating layer into the upper surface of the nonlinear resistor layer to embed these layers. CONSTITUTION:On a glass substrate 11, a first electrode layer 12 is formed, on which a nonlinear resistor layer 13, a P-doped first semiconductor layer 14, nondoped second semiconductor layer 15, and P-doped third semiconductor layer 16 is formed. Then an insulating layer 17 is formed so as to embed the nonlinear resistor layer 13 and to expose the top surface of the nonlinear resistor layer 13. Further, a second electrode layer 18 comprising Cr is formed and a pixel electrode 19 comprising ITO is formed on the insulating layer to connect with the second electrode layer. Thus, an active matrix array is formed, which prevents defects of elements such as short-circuit or disconnection.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a nonlinear resistance element that can be used for active matrix driving of display devices, and a method for manufacturing the same. In order to obtain a high-definition screen (
A high-density matrix configuration with an increased number of scanning lines is required.

Atsushi's active matrix drive system, in which a switching element is attached to each display element, is attracting attention as a way to effectively drive such a matrix.

The switching elements used in this active matrix drive are generally three-terminal devices such as thin film transistors (TPTs) and two-terminal devices such as MIMs and thin film diodes.

Two-terminal devices have a simpler structure than three-terminal devices, have higher manufacturing yields, and are attracting attention for use in large screens. Especially NIN type diodes (Mat, Res, S.

c, Symp, Proc, Vol, 49.19
85 p. 385) and Japanese Patent Application No. 1-109320, the INI type diode has a simple structure and is a nonlinear resistance element having an appropriate threshold voltage.

FIG. 6 shows a cross-sectional view of a conventional NIN type diode.

A first electrode layer 62 made of Cr is formed on a glass substrate 61, and P is doped thereon as a nonlinear resistance layer 63.
+a-8i first semiconductor layer 6ton non-doped a
-3i second semiconductor layer 65. P-doped n+
A third semiconductor layer 66 made of a-3i is sequentially laminated.

Furthermore, an insulating layer 67 made of SiO2 is formed thereon. An electrode extraction window (contact hole) 60 is formed in this insulator layer 67, and a second electrode layer 68 made of LCr is laminated thereon.
The third semiconductor layer 66 and the second electrode layer 68 are brought into contact.

A barrier is formed at the interface between the non-doped a-3i constituting the second semiconductor layer 65 and the n+a-3i constituting the first and third semiconductor layers 64 and 66, so that the two diodes are vertically connected in series and opposite to each other. The shape is connected in the direction.

As a result, it exhibits a threshold voltage of about 6V for both positive and negative polarity voltages, and functions as a nonlinear resistance element.Using this nonlinear resistance characteristic, the first electrode layer 62 can also be used as a scanning electrode line. By connecting the second electrode layer 68 to the scanning electrode line and connecting the second electrode layer 68 to the pixel electrode layer 69 made of ITO, an active matrix array of a liquid crystal display can be constructed. It is a nonlinear resistance element constructed by sequentially laminating a first electrode layer 6, a nonlinear resistance layer 6, and a second electrode layer 68 like a type diode (the number of masks used for patterning is 4, making it a 3-terminal type element). In comparison, the number of display devices is decreasing.Increasing the area of display devices In order to realize cost reductions, further reductions are necessary.

Furthermore, when the nonlinear resistance layer 63 is covered with the insulating layer 67, the thickness of the insulating layer 67 on the side surfaces of the nonlinear resistance layer 63 becomes extremely thin compared to the top surface, increasing the possibility that cracks will occur.

As a result, when the second electrode layer 68 is connected to the pixel electrode layer 69, the second electrode layer 68 and the side surface of the nonlinear resistance layer 63 come into contact as shown in part A of FIG. 6(b), and the diode is shorted. Many defects occur.

In addition, the second electrode layer 68 also becomes extremely thin at a portion along the side surface of the nonlinear resistance layer 63, and as shown in section B of FIG. 6(C), cracks occur and cause wire breakage. The present invention takes into account the above-mentioned problems with conventional nonlinear resistance elements.It makes it possible to reduce the number of masks required as display devices become larger in size, and also eliminates the occurrence of short circuit defects and disconnections. The purpose of the present invention is to provide a nonlinear resistance element that has the following characteristics.

Means for Solving the Problems In order to solve the above problems, the nonlinear resistance element of the present invention is a nonlinear resistance element configured by sequentially laminating a first electrode layer, a nonlinear resistance layer, and a second electrode layer on an insulating substrate. The nonlinear resistance layer formed on the first electrode layer is buried except for its top surface, and an insulator layer is formed up to the height of the top surface of the nonlinear resistance layer. It has a structure in which layers are formed.

In addition, the manufacturing method is as follows: After sequentially laminating a first electrode layer and a nonlinear resistance layer on an insulating substrate, the first electrode layer and the nonlinear resistance layer formed thereon are completely embedded, and the first electrode layer is formed. The insulating layer is formed while maintaining flatness in the thickness direction regardless of the part where the ridges are not formed.Then, the insulating layer is removed evenly from the surface to expose the surface of the nonlinear resistance layer, and a layer is placed on top of it. 4. Function: Due to the above structure of the present invention, the second electrode layer does not come into contact with the side surface of the nonlinear resistance layer while maintaining the same nonlinear resistance as a conventional NIN type diode. , can be connected to the pixel electrode layer.Furthermore, the second electrode layer can be formed without running along the sides of the nonlinear resistance layer, and there is no risk of cracking.By the above manufacturing method, the second electrode layer can be formed over the entire surface of the substrate. By uniformly removing the formed insulator layer from its surface while maintaining flatness in the thickness direction, the surface of the nonlinear resistance layer can be exposed, and the photopatterning process for forming the electrode extraction window can be performed. Can be omitted.

EXAMPLES Examples of the present invention will be described below with reference to the drawings.

FIG. 1 shows a sectional view of a nonlinear resistance element according to a first embodiment of the present invention, and FIG. 2 shows a process diagram of its manufacturing process.

As shown in FIG. 2(a), a first electrode layer 12 made of Cr is formed by sputtering on a glass substrate 11 serving as an insulating substrate. A first semiconductor layer 14 (thickness 10100 nm, non-doped a
-2nd semiconductor layer 15 (film thickness 400 nm) consisting of 3i,
Third semiconductor layer 16 made of n+a-3i doped with P
(Sequentially laminated with a film thickness of 10100 nm by plasma CVD method.

Next, the force for forming the insulator layer 17 (the formation method is JJa
c, Sci, Technol, B4. (1986
), p, 818 is applied. The method will be explained using the apparatus configuration shown in FIG. 3 and using the formation of SiO2 as an example.

In Fig. 3, reference numeral 31 denotes a plasma generation source, which is formed as a cavity resonator, and a magnetic coil 32 is arranged around its outer periphery, but the frequency generated by a magnetron (not shown) is 2.
．． Microwaves of 4.5 GHz are introduced from the waveguide 33 to the plasma generation source 31 via the quartz glass disk 34 .

In the plasma generation source 31 into which the 02 gas is introduced from the gas introduction pipe 35, the magnetic field generated by the magnetic coil 32 and the microwave resonate with ECR, resulting in high-density plasma.

36 is a substrate processing chamber in a reduced pressure state in which a glass substrate 37 is placed; it is connected adjacent to the plasma generation source 31 via a plasma inlet 38, and the 02 plasma flow flows into the glass substrate 37;
transported in the direction. When 5iHn is introduced from the gas introduction tube 39 near the glass substrate 37, the SiH4 gas comes into contact with the active 02 plasma, and a decomposed L5iCh film is formed on the glass substrate 37.

At this time, the RF power source 30 is connected to the glass substrate 37,
A configuration is adopted in which RF lightning voltage is applied. With this configuration, the film formation rate exceeds the sputter etching speed on the plane perpendicular to the plasma flow on the glass substrate 37, so the film formation force is strong (on the diagonal areas, the sputter etching speed exceeds the film formation rate, and no film is formed). It will be scraped away.

As a result, on the flat part of the glass substrate 37, the film formation progresses (on the slope part, the sputter etching progresses, but on the wall side or retreats).
Flatness (L) can be achieved by embedding the nonlinear resistance layer in the thickness direction, regardless of whether or not the nonlinear resistance layer 13 is formed on the glass substrate 11, as shown in FIG. 2(b). A maintained insulator layer 17 can be formed.

Here, the appropriate RF power to be applied to the substrate 17 is about 200W.

After forming the insulator layer 17 that maintains flatness, CF is introduced into the atmosphere, a plasma containing F is excited by RF lightning voltage, and this plasma acts to form SiO2.
The insulating layer 17 is uniformly dry-etched from its surface.

As a result, as shown in FIG. 2(c), the nonlinear resistance layer 13
After that, the insulator layer 17 is formed to the height of the upper surface of the nonlinear resistance layer 13 in such a manner that the upper surface of the nonlinear resistance layer 13 is buried except for the upper surface of the nonlinear resistance layer 13. As shown in (d), a second electrode layer 18 made of Cr is formed with a thickness of 1100 nm by sputtering.

Further, a pixel electrode layer 19 (thickness: 100 nm) made of ITO is formed on the insulating layer 17 by sputtering and connected to the second electrode layer to form an active matrix array.

At that time, the second electrode layer 18 has a nonlinear resistance layer 1 due to its configuration.
The second electrode layer 18 can be connected to the pixel electrode layer 19 at almost the same height without running along the step, eliminating short-circuit defects and disconnections. can.

FIG. 4 shows a cross-sectional view of a nonlinear resistance element according to a second embodiment of the present invention.

A first electrode layer 42 made of Cr is formed with a thickness of 1100 nm on a glass substrate 41 by sputtering, and a second semiconductor layer 44 made of non-doped A-3i (with a thickness of 400 nm) is formed thereon as a non-linear resistance layer 43. ), P-doped n
+a-8i second semiconductor layer 45 (film thickness 100TI
[D) Second semiconductor layer 4 made of non-doped a-3i
6 (film thickness: 400 nm) are sequentially stacked by plasma CVD method.

Next? The insulator layer 47 made of Q Sing is formed by the aforementioned bias ECR plasma CVD method in such a way that it completely embeds the nonlinear resistance layer 43 while maintaining flatness in the thickness direction, and then CF4 is introduced into the atmosphere. A plasma containing F is excited by RF power, and this plasma is used to uniformly dry-etch the insulating layer 47 made of SiO2 from the surface thereof, exposing the upper surface of the nonlinear resistance layer 43, and on top of this, a layer made of Cr is formed. A second electrode layer 48 is formed with a thickness of 1100 nm by sputtering and connected to a pixel electrode layer 49 (thickness 100 nm) made of ITO. The nonlinear resistance element configured in this manner also exhibits a threshold voltage of about 6 V for voltages of both positive and negative polarities, and operates effectively as an element that eliminates the occurrence of short wire breaks.

FIG. 5 shows a cross-sectional view of a nonlinear resistance element in a third embodiment of the present invention.

A first electrode layer 52 made of Cr is formed with a thickness of 1100 nm on a glass substrate 51 by sputtering, and a first semiconductor layer 54 made of non-doped A-3i (with a thickness of 200 nm) is formed thereon as a non-linear resistance layer 53. ), a metal layer 55 (thickness 100 nm) made of Pt, and a second semiconductor layer 56 (thickness 20 Or+m) made of non-doped a-3i are sequentially laminated by plasma CVD, followed by an insulating layer 57 made of SiO2. The nonlinear resistance layer 53 is formed using the aforementioned bias ECR plasma CVD method to completely bury the nonlinear resistance layer 53 while maintaining flatness in the thickness direction. Thereafter, CF4 is introduced into the atmosphere, a plasma containing F is excited by R and F power, and this plasma is used to uniformly dry-etch the insulator layer 57 made of 5102 from its surface. By exposing the upper surface and forming a second electrode layer 58 made of Cr with a thickness of 1100 nm on this by sputtering and connecting it to a pixel electrode layer 59 made of ITO (thickness 100 r+m), a nonlinear structure constructed in this way can be obtained. The resistance element is the first semiconductor layer 5
A Schottky barrier is formed at the interface between the second semiconductor layer 56 and the metal layer 55 and the interface between the second semiconductor layer 56 and the metal layer 55, and exhibits a threshold voltage of about 10 V for both positive and negative polarity voltages. It operates effectively as an element that eliminates the occurrence of.

In addition to Pt, the metal layer 55 is made of Pd or Mo.

W, Rh, Ti, Ir, etc. can also be used to form a Schottky barrier and are effective.

In the embodiments shown above, the insulator layer is SiO2
A force of 513 Ns may be used.

At that time, in the ECR plasma CVD apparatus shown in Fig. 3, a gas containing N2 is introduced from the gas inlet tube into the plasma source (the thickness of the semiconductor layer and electrode layer is limited to that shown in the above example). Furthermore, the formation method is not limited to the sputtering method and the plasma CVD method.As described in detail of the invention, the number of masks used for patterning can be reduced by the nonlinear resistance element and the manufacturing method thereof of the present invention. It is possible to eliminate device defects caused by short circuits or disconnections, and improve yields, and its industrial value is extremely high.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the configuration of a first embodiment of the nonlinear resistance element of the present invention. FIG. 2 is a process diagram showing a method for manufacturing the nonlinear resistance element of the same embodiment. Figure 4 is a sectional view showing the configuration of the second embodiment of the nonlinear resistance element of the present invention. Figure 5 is a cross-sectional view showing the configuration of the third embodiment of the nonlinear resistance element of the present invention. Cross-sectional view showing the structure FIG. 6 is a cross-sectional view showing the structure of a conventional nonlinear resistance element. 11... Glass substrate, 12... First electrode seed 13...
・Nonlinear resistance comfort 17... Insulator layer 18... Name of second electrode representative Patent attorney Akira Okaji and two others Figure 1 12 Manabu GLI Figure 2 (fL) A Figure 3 Figure 4 Figure 47 Picture Kasumi No. 1! :1 Figure 6 Figure 18 Kabutoji 6θ Ko/Tact Hall-z7 Zetsumutsu Companion

Claims (6)

[Claims] (1) A nonlinear resistance element configured by sequentially laminating a first electrode layer, a nonlinear resistance layer, and a second electrode layer on an insulating substrate, in which the nonlinear resistance layer formed on the first electrode layer is A nonlinear resistance element in which an insulating layer is buried except for the top surface, and an insulating layer is formed up to the height of the top surface of the nonlinear resistance layer, and a second electrode layer is further formed on the nonlinear resistance layer and the insulating layer. (2) The nonlinear resistance layer includes a first semiconductor layer made of an N-type semiconductor, a second semiconductor layer made of a non-doped I-type semiconductor, and an N-type semiconductor layer made of a non-doped I-type semiconductor.
2. The nonlinear resistance element according to claim 1, wherein the nonlinear resistance element is constructed by sequentially laminating a third semiconductor layer made of a type semiconductor. (3) A claim in which the nonlinear resistance layer is constructed by sequentially laminating a first semiconductor layer made of a non-doped I-type semiconductor, a first semiconductor layer made of an N-type semiconductor, and a third semiconductor layer made of a non-doped I-type semiconductor. 1. The nonlinear resistance element according to 1. (4) After sequentially laminating the first electrode layer and the nonlinear resistance layer on the insulating substrate, completely embed the first electrode layer and the nonlinear resistance layer formed thereon, and leave the area where the first electrode layer is formed Regardless of the formation part, the insulator layer is formed while maintaining flatness in the thickness direction, and then the insulator layer is removed uniformly from the surface,
A method for manufacturing a nonlinear resistance element, in which the surface of a nonlinear resistance layer is exposed and a second electrode layer is laminated thereon. (5) Generate a plasma flow containing oxygen or nitrogen by ECR discharge using microwaves and a magnetic field,
This plasma flow is irradiated onto an insulating substrate to which RF power has been applied, and the Si-containing gas supplied near the insulating substrate is reacted with oxygen or nitrogen in the plasma flow.
Claim 4: An insulating layer made of _2 or Si_3N_4 is formed on an insulating substrate while maintaining smoothness in the thickness direction.
A method of manufacturing the described nonlinear resistance element. (6) The method of manufacturing a nonlinear resistance element according to claim 4, wherein the insulating layer is uniformly removed from its surface by applying fluorine-containing plasma excited by an RF voltage.