JPH0254577A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To avoid the damage of a transparent pixel electrode by forming an insulating layer so as to manufacture a thin film transistor of an active matrix type display panel, covering it with a silicon oxide thin layer, and then covering it with a silicon nitride layer. CONSTITUTION:After a reaction chamber of a glow discharger is evacuated in vacuum, a base is heated to a predetermined temperature ranged at approx. 200-300 deg.C. SiH4 and N2O are introduced into the reaction chamber through the above procedure to generate a glow discharge, it is covered with silicon oxide in a predetermined thickness of a range of approx. 50-500Angstrom as a silicon oxide thin layer 39. Subsequently, SiH4 and NH3 are introduced into the reaction chamber, it is covered with silicon nitride of a predetermined thickness of a range of approx, 1000-4000Angstrom in a glow discharging state as a silicon nitride layer 41, and the configuration of an insulating layer 43 is formed of the layers 39, 41. Since the base of the state covered with the layer 39 is covered with the layer 41, a transparent pixel electrode 19 is not damaged by a plasma generated from the NH3.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a technology for manufacturing thin film transistors included in active matrix display panels for displaying various information using liquid crystals or the like.

(Prior Art) Conventionally, various display devices have been proposed to display +i information as an image. Among these, for example, a display device in which a pixel is constructed using liquid crystal and a thin film transistor is arranged in each pixel region has been proposed. Active matrix display panels (hereinafter also simply referred to as panels) that are installed and controlled are widely used.

Hereinafter, the structure of a conventional panel and its manufacturing technology will be explained with reference to the drawings.

First, with reference to FIG. 2, an example of the overall structure of a conventional panel will be described.

FIG. 2 is an explanatory diagram showing a schematic plan view of a conventionally known panel, focusing only on the substrate on the side on which thin film transistors are disposed. In addition, in the figure, when a plurality of components having the same function are shown, only some of them may be shown with reference numerals.

As can be understood from this figure, there are gate wirings 13 on the surface of the transparent insulating substrate 11 made of, for example, a glass plate.
and a drain wiring 15 are arranged to define a matrix-like pixel region 17. In this pixel area 17,
A transparent pixel electrode 19 and a thin film transistor 21 are included.

In such a panel, for example, the above-described transparent pixel electrode 19 is used as one electrode, and a liquid crystal cell (not shown) is disposed between the transparent pixel electrode 19 and the other electrode (not shown). When actually performing active matrix driving, the voltage (electric field) applied to the cell is controlled by the thin film transistor 21 described above.

Next, with reference to FIGS. 3A to 3E, a manufacturing technique for thin film transistors for active matrix driving will be described.

FIGS. 3A to 3E are explanatory diagrams showing schematic cross-sections of substrates for each manufacturing process in order to explain the conventional manufacturing technology. In addition, in this figure, one pixel region is focused and shown (the connection relationship between the gate wiring and drain wiring shown in FIG. 2 and the electrodes constituting the thin film transistor is omitted). To facilitate understanding of the explanation, a transparent insulating substrate on which various components are disposed for each manufacturing process will be comprehensively represented as a base.

First, the transparent insulating substrate 1 described with reference to FIG.
A transparent pixel electrode 19 and a gate electrode 23 are placed on the surface of 1.
Each of them is formed in a shape according to the design with gaps between them, and a base as shown in FIG. 3(A) is obtained.

Of these, the transparent pixel electrode 19 is usually made of tin dioxide (Sn
Oz) or indium tin oxide (hereinafter referred to as ITO(:In
dium Tin Oxide). ) is made of transparent conductive material. The gate electrode 23 is obtained by depositing a metal material such as tantalum (Ta) and then patterning it into a predetermined shape, and is electrically connected to the gate wiring 13 (not shown) described above. It is installed in a state where As can be understood from this figure, in order to provide a sufficient gate breakdown voltage to the thin film transistor, the gate electrode 23 is anodized in pairs ( ) to form an oxide insulating film 25 .

Next, an insulating layer 27 and a semiconductor active layer 29 are applied to the base described above.
, and the ohmic contact layer 31 are sequentially deposited to obtain a base as shown in FIG. 3 CB).

The process of depositing the three layers mentioned above will now be described in detail.

First, in forming the above-mentioned insulating layer 278, a glow discharge method is used to form silicon oxide (Styx) (X represents a positive number) or silicon nitride (SiNv) (Y represents a positive number). Approximately 100% of either material
It is deposited at a predetermined film thickness within the range of 0 to 5000 (persons). Following this, the semiconductor active layer 29 made of amorphous silicon (a-Si) is formed by the glow discharge method described above.
and an ohmic contact layer 31 which is made n-type by adding phosphorus to a-3i are sequentially deposited.

Therefore, since these three layers are deposited successively without breaking the vacuum, the deposition can be performed without contaminating the interface between each layer.

Next, the above-described ohmic contact layer 31, semiconductor active layer 29, and insulating layer 27 are sequentially etched by dry etching using carbon tetrafluoride (CF4) and oxygen (0□) or wet etching using hydrofluoric acid, for example. By patterning at least the above-described transparent pixel electrode 1
9 is exposed to obtain the base shown in FIG. 3(C).

Here, if the drain wiring 15 described with reference to FIG. 2 is arranged on the transparent insulating substrate 11 in advance,
In the above-described process, the transparent pixel 15 electrode 19 and the drain wiring 15 (not shown) are also exposed.

Next, for example, aluminum (
AQ), copper (Cu) or any other suitable metal is coated by vapor deposition technique or the like to form the above-mentioned transparent pixel electrode 19,
Electrode forming layer 3 that can electrically connect the ohmic contact layer 31 and the drain wiring 15 (not shown) (see FIG. 2)
3 (Fig. 3(D)).

After passing through such steps, the above-described electrode formation layer 33 is patterned to form a drain electrode 35 that electrically connects the above-described drain wiring 15 and ohmic contact layer 31;
and a source electrode 37 that electrically connects the transparent pixel electrode 19 and the ohmic contact layer 31 are formed separately.
A thin film transistor 21 as shown in Figure (E) is obtained.

Note that the source electrode 37 and drain electrode 35 described above are
This does not indicate the distinction in the manufacturing process between the input side and the output side when actually operating the panel.
5 and the drain electrode 35 can be used as constituent components on the source side, and the source electrode 37 connected to the transparent electrode 19 can also be used as the drain electrode.

(Problems to be Solved by the Invention) However, in the above-described conventional thin film transistor manufacturing technology, when the above-described insulating film 27 is deposited, the transparent pixel electrode 19 is damaged, and the display quality of the panel is degraded. There was a problem.

This point will be explained in detail with reference to FIGS. 3(A) to 3(E).

As already mentioned, in the above-mentioned conventional technology, by using an insulating material containing silicon for the insulating layer constituting the thin film transistor 21, continuity with components that require a semiconductor material, such as a semiconductor active layer and an ohmic contact layer, is achieved. It is possible to form a film in a variety of ways. For this reason, silicon oxide or silicon nitride is generally used as the above-mentioned insulating layer.

However, when forming the insulating layer with silicon nitride in the process described with reference to FIG. 3 CB), for example, the insulating layer is formed of ITO or SnO There was a problem in that the transparent pixel electrodes were damaged.

On the other hand, when the above-mentioned insulating layer is made of silicon oxide, the above-mentioned loss i during film formation for the transparent pixel electrode can be avoided. However, in order to provide a sufficient gate breakdown voltage, it is necessary to make the silicon oxide film sufficiently thick. Therefore, in the etching process described with reference to FIG. 3(C), it is necessary to use an etchant such as hydrofluoric acid that has a high etching rate for silicon oxide, which may cause damage to the transparent pixel electrode 19. The problem arises. Furthermore, in order to avoid damage caused by such etchants, CF and 0
When dry etching is performed using □, the etching rate of silicon oxide is low, so the selectivity with respect to the resist is poor, leading to damage to the electrode as described above.

Damage to transparent pixel electrodes due to the various factors mentioned above causes a decrease in light transmittance and a disturbance in the alignment of liquid crystal molecules due to irregularities on the electrode surface, resulting in decreased contrast of the panel, deterioration of viewing angle, and occurrence of flicker. , which caused a decline in the display quality of the panel.

In view of the above-mentioned conventional problems, an object of the present invention is to provide a manufacturing technology for thin film transistors that can avoid damage to transparent pixel electrodes, thereby realizing an active matrix type panel with excellent display quality. Yes.

(Means for Solving the Problems) In order to achieve this object, according to the method for manufacturing a thin film transistor of the present invention, a transparent pixel electrode and a gate electrode are provided separately for each pixel region on a transparent insulating substrate. a step of sequentially depositing at least an insulating layer and a semiconductor active layer on the above-mentioned transparent insulating substrate having the transparent pixel electrode and the gate electrode;
A thin film transistor of an active matrix type display panel is formed by etching these semiconductor active layers and insulating layers to expose at least the above-mentioned transparent pixel electrodes, and through a process of forming source electrodes and drain electrodes on the above-mentioned semiconductor active layers. In manufacturing, the above-mentioned w! , the cotton layer is formed by depositing a silicon oxide thin layer and then depositing a silicon nitride layer.

Further, in carrying out the present invention, it is preferable that the thickness of the silicon oxide thin layer described above is set to a value in the range of 50 (λ) or more and 500 (λ) or less.

(Function) According to the method for manufacturing a thin film transistor of the present invention, an insulating layer is formed by sequentially depositing a silicon oxide thin layer and a silicon nitride layer.

Therefore, during the deposition of the silicon nitride layer, the thin silicon oxide layer protects the transparent pixel electrode from plasma damage. In addition to this, patterning of the insulating layer (in this case, silicon oxide is deposited as a thin layer so that it is easy to remove by etching).

(Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that the drawings referred to in the following description are only schematic illustrations to the extent that the present invention can be understood, and the present invention is not limited only to these illustrated examples.

In order to explain the present invention in detail, FIGS. 1(A) to (E) focus on one pixel region, similar to the above-mentioned FIGS. Every,
FIG. 2 is an explanatory diagram schematically showing a cross section of a substrate. In the figure, components having the same functions as those already described are designated by the same reference numerals.

First, as already explained with reference to FIG. 3(A), an I
A transparent pixel electrode 19 made of TO or 5nO7 is deposited, and a gate electrode 23 having an oxide insulating film 25 on its surface is formed at a distance from the electrode 19.
Figure 1 (A)).

Here, the transparent pixel electrode 19 and the gate electrode 23 described above are formed by, for example, a vapor deposition method, a sputtering method, or other conventionally known techniques, and then a photolithography process.

Further, in forming the oxide insulating film 25, after patterning at least the gate electrode 23 described above, the transparent insulating substrate 11 is immersed in an aqueous solution containing oxalic acid, tartaric acid, or phosphoric acid. After that, a predetermined voltage is applied to the gate electrode 23 while it is immersed in this aqueous solution, and the electrode 23 is immersed in the aqueous solution.
An oxide insulating film 25 was formed on the surface of No. 3 to a thickness of about 1000 to 4000 (A).

Next, a series of film forming conditions using the glow discharge method will be explained with reference to FIG. 1CB).

First, the above-mentioned base material is poured into the reaction chamber of a conventional glow discharge device. Thereafter, the reaction chamber of the apparatus is evacuated, and the base is heated to a predetermined temperature within the range of about 200 to 300 ('C).

Through these steps, first, 5i was placed in the reaction chamber described above.
Hn and 820 are introduced to generate a glow discharge, and silicon oxide is deposited to a predetermined thickness in the range of about 50 to 500 (λ) to form a thin silicon oxide layer 39.

Next, 5I84 and NH3 were introduced into the reaction chamber, and silicon nitride was heated to about 1000 to 400% under glow discharge.
The thin silicon oxide layer 39 and the silicon nitride layer 41 constitute the insulating layer 43.

As can be understood from the above explanation, in the method of the present invention, since the silicon nitride layer 41 is deposited on the base on which the silicon oxide thin layer 39 has been deposited, the transparent pixel electrode is formed by plasma generated from NH3. 19 will not be damaged. Here, in order to avoid the plasma loss i, the above-mentioned damage to the electrode could be avoided by setting the thickness of the silicon oxide thin film to at least 50 (people) or more.

Subsequently, by a glow discharge method using only 5iHa, about 500 to 300
A semiconductor active layer 29 made of a-3i is formed with a thickness within a range of about 0 (λ).

Thereafter, using 5I84 and PH3, an ohmic contact layer 31 similar to the conventional one is formed on the surface of the semiconductor active layer 29 with a predetermined thickness within a range of about 200 to +000 C. do.

In the series of film forming steps using the glow discharge method described above, each source gas was diluted with hydrogen or an inert gas, as is conventionally done.

Next, the ohmic contact layer 31 and the semiconductor active layer 29 described above are sequentially patterned by dry etching using carbon tetrafluoride (CFa) and oxygen (0□), and then the nitride layer constituting the insulating layer 43 is patterned. By sequentially patterning the silicon layer 41 and the silicon oxide thin layer 39, at least the transparent pixel electrode 19 is exposed, as shown in FIG.
) Obtain the base shown in ().

In such an etching step, the thickness of the silicon oxide thin layer 39, which has poor selectivity with respect to the resist (not shown), is made small in advance, preferably to a value of about 500 (λ) or less, to facilitate etching removal. We were able to improve controllability.

As can be understood from the above description, the thickness of the silicon oxide thin film, which is a feature of this invention, is approximately 5.5 mm thick in order to avoid damage to the electrode due to plasma when depositing silicon nitride.
The value should be 0 (λ) or more, and approximately 5
It is preferable to set the value to 00(λ) or less.

Subsequently, on the base surface with at least the transparent electrode 19 exposed, for example, aluminum (A9.), copper (Cu), or any other suitable metal is deposited by a vapor deposition technique, etc., and the transparent pixel electrode 19 described above and the ohmic Bonding layer 31
Then, an electrode forming layer 33 that can be electrically connected to the drain wiring 15 (see FIG. 2), which is not shown, is deposited (FIG. 1(D)).

After that, the above-mentioned electrode forming layer 33 and ohmic contact layer 3 are formed.
1 are sequentially patterned to form a drain electrode 35 that electrically connects the drain wiring 15 and the ohmic contact layer 31, and a source electrode that electrically connects the transparent pixel electrode 19 and the ohmic contact layer 31. A thin film transistor 45 as shown in FIG.
is obtained.

In addition, the thin film transistor 45 according to the above-mentioned embodiment and FIGS. 3(A) to 3(E)! In the conventional configuration described with reference to the thin film transistor 21 manufactured with an insulating layer made only of silicon nitride, the relationship between gate voltage and drain current was measured and the characteristics were compared. As a result, even in a structure in which a silicon oxide thin film 398 is introduced like the thin film transistor 45, no quantification was observed in the transistor characteristics described above (data omitted).

Although the embodiments of the present invention have been described in detail above, it is clear that the present invention is not limited to the embodiments described above.

As already mentioned, the relationship between the input side and the output side regarding the source electrode and drain electrode described above can be changed depending on the design of the panel control.
Components marked with 5 are the source electrode, and 37
It is clear that a thin film transistor can be manufactured using the same manufacturing process as described above even when the components indicated by the reference numerals are used as the drain electrode.

Furthermore, in the above-described embodiments, an oxide insulating film is formed by anodic oxidation in order to obtain a sufficient gate breakdown voltage. However, the same effect as described above can also be obtained by increasing the thickness of the silicon nitride film constituting the bonding layer instead of forming the above-mentioned oxide insulating film.

Therefore, the metal constituting the gate electrode may be a material that is not anodized.

It is clear that these materials, shapes, dimensional relationships, numerical conditions, and other specific conditions may be subjected to any suitable design changes and modifications within the scope of the purpose of the present invention.

(Effects of the Invention) As is clear from the above description, according to the method for manufacturing a thin film transistor of the present invention, an insulating layer is formed by sequentially depositing a silicon oxide thin layer and a silicon nitride layer. , during the deposition of the silicon nitride layer, the thin silicon oxide layer protects the transparent pixel electrode from plasma damage and provides at least the transparent pixel electrode 8I! for arranging the source or drain electrode. ! In the etching step for etching, patterning becomes easier by reducing the thickness of the silicon oxide thin layer, and transparent pixel electrode loss (a) during etching can be avoided.

Therefore, by applying the manufacturing method of the present invention, it is possible to avoid damage to the transparent pixel electrode, and in turn, eliminate deterioration in display quality such as reduction in contrast, deterioration in viewing angle, and occurrence of flicker. As a result, it is expected that an excellent active matrix type panel will be realized.

[Brief explanation of the drawing]

Figures 1 (A) to (E) are explanatory diagrams showing schematic cross-sections of the substrate for each manufacturing process in order to explain the present invention in detail, and Figure 2 illustrates the overall configuration of an active matrix panel. 3(A) to (E) are explanatory drawings shown in the same manner as FIG. 1(A) to (E) to explain the prior art. be. 11...Transparent insulating substrate, 13...Gate wiring 1
5...Drain wiring, 17...Pixel area 19.
...Transparent pixel electrode 2L45...Thin film transistor 23...Gate electrode, 25...Oxide insulating film 27
, Japan... Insulating layer, 29... Semiconductor active layer 31
...Ohmic contact layer, 33... Electrode forming layer 3
5...Drain electrode, 37...Source electrode 39
...Silicon oxide thin layer, 41...Silicon nitride layer.

Claims (2)

[Claims] (1) A step of providing a transparent pixel electrode and a gate electrode separately for each pixel region on a transparent insulating substrate, and at least an insulating layer and a semiconductor on the transparent insulating substrate provided with the transparent pixel electrode and gate electrode. sequentially depositing active layers; etching the semiconductor active layer and insulating layer to expose at least the transparent pixel electrode; and forming source and drain electrodes on the semiconductor active layer. In manufacturing a thin film transistor for an active matrix display panel, the insulating layer is formed by depositing a silicon oxide thin layer and then depositing a silicon nitride layer. . (2) The thickness of the silicon oxide thin layer is 50 to 500 (Å).
2. The method of manufacturing a thin film transistor according to claim 1, wherein the manufacturing method is performed using a value in a range of .