JPH04194823A - Liquid crystal display device and manufacture thereof - Google Patents

Liquid crystal display device and manufacture thereof

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Publication number
JPH04194823A
JPH04194823A JP2319834A JP31983490A JPH04194823A JP H04194823 A JPH04194823 A JP H04194823A JP 2319834 A JP2319834 A JP 2319834A JP 31983490 A JP31983490 A JP 31983490A JP H04194823 A JPH04194823 A JP H04194823A
Authority
JP
Japan
Prior art keywords
signal line
liquid crystal
video signal
thin film
film transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2319834A
Other languages
Japanese (ja)
Other versions
JP2772405B2 (en
Inventor
Kikuo Ono
記久雄 小野
Nobutake Konishi
信武 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP31983490A priority Critical patent/JP2772405B2/en
Publication of JPH04194823A publication Critical patent/JPH04194823A/en
Application granted granted Critical
Publication of JP2772405B2 publication Critical patent/JP2772405B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To reduce production of a point defect by forming a first insulating film with a given thickness on an image signal line having a given thickness and forming a clear picture element electrode, being not present on an area occupied by an image signal line on the first insulating film deposited on the image signal line, on the first insulating film. CONSTITUTION:A liquid crystal orientation film ORI 1, a film transistor TFT, and a clear picture element electrode ITO 1 are formed on the lower clear glass substrate SUB 1 side on a basis of a liquid crystal layer LC. Below the substrate SUB 1, an orientation film ORI 2, a color filter FIL, and a black matrix pattern BM for light shield are formed on the polarizing sheet POL 1 and the upper substrate SUB 2 side, and a sheet POL 2 is formed on the substrate SUB 2. In sectional structure, a layer comprising a common electrode ITO 2, protection films PSV 1 and PSV 2, and an insulating film GI is formed. An image signal line DL formed of first and second conduction films d1 and d2 is formed on the insulating film GI. The protection film PSV 1 is formed thereon, and the electrode ITO 1 is formed after formation of the structure. Thus, two differences in a stage of an image signal line are produced between the adjoining electrodes ITO 1 and no point defect is produced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、液晶表示装置、特に、薄膜トランジスタ及び
画素電極で画素を構成するアクティツマトリクス方式の
液晶表示装置及びその製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to an actite matrix type liquid crystal display device in which pixels are constructed of thin film transistors and pixel electrodes, and a method for manufacturing the same.

〔従来の技術〕[Conventional technology]

TPT (薄膜トランジスタ)を搭載したアクティブマ
トリクス構成の液晶表示装置に関しては、例えば、19
89年、電子通信学会技術研究報告(ED89−32)
項41や特開昭62−47621号公報がある。
Regarding active matrix liquid crystal display devices equipped with TPT (thin film transistors), for example, 19
1989, Institute of Electronics and Communication Engineers Technical Research Report (ED89-32)
41 and Japanese Unexamined Patent Publication No. 62-47621.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

TPT液晶表示装置は、小型低消費電力のデイスプレィ
装置として、主としてマイクロコンピュータシステムに
おけるモニター等に用いられている。このような用途と
して、アクティブマトリクス液晶表示装置は製造工程が
複雑であるため、短絡不良等が発生しやすく、またこれ
らの不良は画像として容易に認識できるため、こ、れら
の不良低減が可能な技術が要求されている。
TPT liquid crystal display devices are used as small, low power consumption display devices, mainly as monitors in microcomputer systems. For such applications, active matrix liquid crystal display devices have a complicated manufacturing process, so they are prone to short-circuit defects, and since these defects can be easily recognized as images, it is possible to reduce these defects. technology is required.

点欠陥の原因として最も多いものは、透明なインジュウ
ムスズ酸化物IT○で形成された表示を行う画素電極が
ホト工程でのレジスト残りゃエツチング工程でのエツチ
ング不良等で加工残りが、画素電極ITOと映像信号を
外部駆動回路から供給する映像信号線(ドレイン線)あ
るいは隣合う画素電極IT○同士が電気的短絡を生じる
不良である。
The most common cause of point defects is that the pixel electrode that performs display, which is made of transparent indium tin oxide IT○, is left unprocessed due to resist residue in the photo process or etching failure in the etching process, and the pixel electrode ITO is formed with transparent indium tin oxide IT○. This is a defect that causes an electrical short circuit between the video signal line (drain line) that supplies the video signal from the external drive circuit or between adjacent pixel electrodes IT○.

上記前者の従来技術を用いたTPT液晶デイスプレィの
断面構造を第2図に示す。同図(a)は映像信号線に対
して平面上で隣合う画素電極に対して映像信号線(ドレ
イン線)DLに垂直線上に切った断面図、同図(b)は
走査信号、@GLに対して平面上で隣合う画素電極IT
Oに対して走査信号線GL(ゲート線)に垂直線上に切
った断面図である。
FIG. 2 shows a cross-sectional structure of a TPT liquid crystal display using the former conventional technique. The same figure (a) is a cross-sectional view taken on a line perpendicular to the video signal line (drain line) DL with respect to the pixel electrode adjacent to the video signal line on the plane, and the same figure (b) is the scanning signal, @GL Pixel electrodes IT adjacent to each other on a plane
3 is a cross-sectional view taken along a line perpendicular to the scanning signal line GL (gate line) with respect to O. FIG.

この技術を用いた場合、画素電極IT○と映像信号線D
Lの短絡については絶縁膜0丁で分離されており、この
点での不良対策は行われている。
When using this technology, the pixel electrode IT○ and the video signal line D
Regarding the short circuit of L, it is isolated by 0 insulating films, and measures against defects have been taken in this respect.

しかしながら、同図中の映像信号線DLに対し、長さL
oの間げきを持って形成された隣合う画素電極間ITO
の短絡について、及び走査信号線GLに対し長さLcの
間げきを持って形成された隣合う画素電極間IT○の短
絡については同一平面上に形成されているため依然とし
て不良の発生が多い。もちろん、Lo、Lcを大きくし
ていくとこの不良率はポアソン分布統計に従い、Ln、
Lcに対して指数的に低下するが、このことは光の透過
する開口率を著しく低下させ、好ましくない。
However, with respect to the video signal line DL in the same figure, the length L
ITO between adjacent pixel electrodes formed with a gap of o
As for the short circuit between IT○ and the short circuit between adjacent pixel electrodes IT○ formed with a gap of length Lc from the scanning signal line GL, since they are formed on the same plane, many defects still occur. Of course, as Lo and Lc are increased, this defective rate follows Poisson distribution statistics, and Ln,
Although it decreases exponentially with respect to Lc, this significantly lowers the aperture ratio through which light passes, which is not preferable.

また、特開昭62−47621号公報の技術は、半導体
膜上絵素電極の重畳部位に絶縁膜を介在させ且つソース
・ドレイン電極と半導体層の間にリンドープのアモルフ
ァスシリコン層を介在させたものである。この従来例は
映像信号線下部に画素電極が設けられ、また前記重畳構
造により、上記従来技術と同様の欠点を有していた。
Furthermore, the technique disclosed in Japanese Patent Application Laid-Open No. 62-47621 involves interposing an insulating film at the overlapping region of the pixel electrode on the semiconductor film, and interposing a phosphorus-doped amorphous silicon layer between the source/drain electrode and the semiconductor layer. It is. This conventional example has the same drawbacks as the above-mentioned prior art due to the pixel electrode being provided below the video signal line and the overlapping structure.

本発明の目的は、液晶表示装置において、液晶表示装置
の画素が不良となる点欠陥を低減することが可能な技術
を提供する。
An object of the present invention is to provide a technique in a liquid crystal display device that can reduce point defects in which pixels of the liquid crystal display device become defective.

〔課題を解決するための手段〕[Means to solve the problem]

本願において開示される発明は1次の二つの手段によっ
て達成される7第一番目は、先に所定の厚さを持つ映像
信号線を形成し、次に前記映像信号線上に絶縁膜を被服
し、その後丁TOを堆積、加工する。あるいは、先に所
定の厚さを持つ走査映像信号線を形成し、次に前記走査
信号線上の電極材料を陽極酸化して形成した陽極酸化膜
を形成し、その後IT○を堆積、加工する。第2番目は
The invention disclosed in this application is achieved by the following two means.7 The first method is to first form a video signal line with a predetermined thickness, and then cover the video signal line with an insulating film. , then deposit and process the TO. Alternatively, a scanning video signal line having a predetermined thickness is first formed, then an anodic oxide film is formed by anodizing the electrode material on the scanning signal line, and then IT◯ is deposited and processed. The second one is.

映像信号線に沿って形成される隣合う画素電極IT○を
同一平面上に形成せず、映像信号線の垂直方向の同一平
面上の画素電極ITO間の距離りを隣合う映像信号線の
距離より大きくする。
Adjacent pixel electrodes IT○ formed along the video signal line are not formed on the same plane, and the distance between the pixel electrodes ITO on the same plane in the vertical direction of the video signal line is the distance between adjacent video signal lines. Make it bigger.

すなわち、本発明は、1つの走査信号線と1つ映像信号
線の交点に薄膜トランジスタを形成し、前記走査信号線
は薄膜トランジスタのゲート電極に接触され、前記映像
信号線は薄膜トランジスタのドレイン電極に接触され、
前記薄膜トランジスタのソース電極に接触された画素電
極によって液晶を駆動する機能を有する単位画素を透・
開基板上にマトリスク状に形成した液晶表示装置におい
て、所定の厚さを持つ映像信号線上に所定の厚さの第一
の絶縁膜が形成され、透明な画素電極は前記映像信号線
上に堆積された前記第一の絶縁膜上の前記映像信号線の
占有する面積上には存在せず前記第一の絶縁膜上に形成
されているものである。ここで、映像信号線が3000
八以上の厚さを持つものがよい。
That is, in the present invention, a thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with the gate electrode of the thin film transistor, and the video signal line is contacted with the drain electrode of the thin film transistor. ,
A unit pixel having a function of driving a liquid crystal by a pixel electrode in contact with the source electrode of the thin film transistor is transparent.
In a liquid crystal display device formed in a matrix shape on an open substrate, a first insulating film having a predetermined thickness is formed on a video signal line having a predetermined thickness, and a transparent pixel electrode is deposited on the video signal line. The first insulating film does not exist on the area occupied by the video signal line on the first insulating film, but is formed on the first insulating film. Here, the video signal line is 3000
It is best to have a thickness of 8 or more.

また、本発明は、1つの走査信号線と1つ映像信号線の
交点に薄膜トランジスタを形成し、前記走査信号線は薄
膜トランジスタのゲート電極に接触され、前記映像信号
線は薄膜トランジスタのドレイン電極に接触され、前記
薄膜トランジスタのソース電極に接触された画素電極に
よって液晶を駆動する機能を有する単位画素を透明基板
上にマトリスク状に形成した液晶表示装置の製造方法に
於いて、映像信号線、第一の絶縁膜及び透明な画素電極
の形成順序は、映像信号線、第一の絶縁膜、透明な画素
電極であることを特徴とするものである。
Further, in the present invention, a thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with a gate electrode of the thin film transistor, and the video signal line is contacted with a drain electrode of the thin film transistor. , in a method for manufacturing a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode of the thin film transistor are formed in a matrix shape on a transparent substrate, a video signal line, a first insulator; The film and transparent pixel electrode are formed in the following order: a video signal line, a first insulating film, and a transparent pixel electrode.

また、本発明は、1つの走査信号線と1つ映像信号線の
交点に薄膜トランジスタを形成し、前記走査信号線は薄
膜トランジスタのゲート電極に接触され、前記映像信号
線は薄膜トランジスタのドレイン電極に接触され、前記
薄膜トランジスタのソース電極に接触された画素電極に
よって液晶を駆動する機能を有する単位画素を透明基板
上にマトリスク状に形成した液晶表示装置において、所
定の厚さを持つ映像信号線上に所定の厚さの第一の絶縁
膜が形成され、透明な画素電極は前記映像線上に堆積さ
れた前記第一の絶縁膜上の前記映像信号線の占有する面
積上には存在せず少なくとも前記第一の絶縁膜上をエツ
チング除去された領域に形成されているものである。こ
こで、透明な画素電極は前記映像線上に堆積された前記
第一の絶縁膜上の前記映像信号線の占有する面積上には
存在せず、前記第一の18膜上をエツチング除去された
領域にのみ形成されているものがよい。また、その一部
を除去される第1の絶縁膜が3000Å以上の厚さを持
つものがよい。また、映像信号線とその一部を除去され
る第一の絶縁膜がともに3000Å以上の厚さを持つも
のがよい3また、本発明は、1つの走査信号線と1つ映
像信号線の交点に薄膜トランジスタを形成し、@記走査
信号線は薄膜トランジスタのゲート電極に接触され、前
記映像信号線は薄膜トランジスタのドレイン電極に接触
され、前記薄膜トランジスタのソース電極に接触された
画素電極によって液晶を駆動する機能を有する単位画素
を透明基板上にマトリスク状に形成した液晶表示装置に
おいて、複数本存在する走査信号線の第1番目と最終番
目を除く前記走査信号線を平面上で垂直方向の断面構造
にて、前記第1番目と最終番目を除く前記走査信号線に
対して隣合う画素電極が、前記走査電極材料を陽極酸化
して形成した陽極酸化膜の少なくとも一つの段差上に存
在せず、前記画素電極上で光の透過する開口領域に薄膜
トランジスタのゲート絶縁膜が存在しないことを特徴と
するものである。
Further, in the present invention, a thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with a gate electrode of the thin film transistor, and the video signal line is contacted with a drain electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode of the thin film transistor are formed in a matrix shape on a transparent substrate, a predetermined thickness is provided on a video signal line having a predetermined thickness. A first insulating film is formed, and a transparent pixel electrode does not exist on the area occupied by the video signal line on the first insulating film deposited on the video line; It is formed in a region where the insulating film is etched away. Here, the transparent pixel electrode does not exist on the area occupied by the video signal line on the first insulating film deposited on the video line, and is etched away on the first 18 films. It is better to have it formed only in the area. Further, it is preferable that the first insulating film whose part is removed has a thickness of 3000 Å or more. Further, it is preferable that both the video signal line and the first insulating film from which a part of the video signal line is removed have a thickness of 3000 Å or more. A thin film transistor is formed in the thin film transistor, the scanning signal line is contacted to the gate electrode of the thin film transistor, the video signal line is contacted to the drain electrode of the thin film transistor, and the liquid crystal is driven by the pixel electrode contacted to the source electrode of the thin film transistor. In a liquid crystal display device having unit pixels formed in a matrix shape on a transparent substrate, the scanning signal lines excluding the first and last of the plurality of scanning signal lines are arranged in a vertical cross-sectional structure on a plane. , a pixel electrode adjacent to the scanning signal line other than the first and last one does not exist on at least one step of an anodic oxide film formed by anodizing the scanning electrode material, and the pixel electrode It is characterized in that the gate insulating film of the thin film transistor does not exist in the opening region on the electrode through which light passes.

また、本発明は、1つの走査信号線と1つ映像信号線の
交点に薄膜トランジスタを形成し、前記走査信号線は薄
膜トランジスタのゲート電極に接触され、前記映像信号
線は薄膜トランジスタのドレイン電極に接触され、前記
薄膜トランジスタのソース電極に接触された画素電極に
よって液晶を駆動する機能を有する単位画素を透明基板
上にマトリスク状に形成した液晶表示装置において、複
数本存在する走査信号線の第1番目と最終番目を除く前
記走査信号線を平面上で垂直方向の断面構造にて、前記
第1番目と最終番目を除く前記走査信号線に対して隣合
う透明な画素電極が、前記走査電極材料を陽極酸化して
形成した陽極酸化膜上に存在せず、前記画素電極上で光
の透過する開口領域に薄膜トランジスタのゲート絶縁膜
が存在しない−ことを特徴とするものである。
Further, in the present invention, a thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with a gate electrode of the thin film transistor, and the video signal line is contacted with a drain electrode of the thin film transistor. , in a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode of the thin film transistor are formed in a matrix shape on a transparent substrate, the first and last of the plurality of scanning signal lines A transparent pixel electrode adjacent to the scanning signal line except the first and the last scanning signal line is formed by anodizing the scanning electrode material in a vertical cross-sectional structure on a plane. The present invention is characterized in that the gate insulating film of the thin film transistor does not exist on the anodic oxide film formed by the method, and the gate insulating film of the thin film transistor does not exist in the opening region on the pixel electrode through which light passes.

また、本発明は、走査信号線、陽極酸化膜、画素電極形
成順序は、走査信号線、陽極酸化膜、画素電極形成の順
序に製造され、陽極酸化膜上画素電極の製造工程中に、
他の絶縁膜の製造工程を含まない工程で製造されたこと
を特徴とする液晶表示装置の製造方法の製造方法である
Further, in the present invention, the scanning signal line, the anodic oxide film, and the pixel electrode are formed in the order in which the scanning signal line, the anodic oxide film, and the pixel electrode are formed, and during the manufacturing process of the pixel electrode on the anodic oxide film,
This is a manufacturing method of a liquid crystal display device characterized in that the manufacturing method does not include any other insulating film manufacturing process.

前記表示装置に於いて、保持容量を形成する上部及び下
部電極は共に不透明の電極材料で形成ゴれたものがよい
。また、保持容量を形成する上部電極は画素電極で形成
されたものがよい、また、前記走査信号線と前記陽極酸
化膜の厚さの総和が3000Å以上であるものがよい。
In the display device, both the upper and lower electrodes forming the storage capacitor are preferably made of an opaque electrode material. Further, the upper electrode forming the storage capacitor is preferably formed of a pixel electrode, and the total thickness of the scanning signal line and the anodic oxide film is preferably 3000 Å or more.

また、本発明は、1つの走査信号線と1つ映像信号線の
交点に薄膜トランジスタを形成し、前記走査信号線は薄
膜トランジスタのゲート電極に接触され、前記映像信号
線は薄膜トランジスタのドレイン電極に接触され、前記
薄膜トランジスタのソース電極に接触された画素電極に
よって液晶を駆動する機能を有する単位画素を透明基板
上にマトリスク状に形成した液晶表示装置において、複
数本存在する映像信号線の第1番目と最終番目を除く前
記映像信号線を平面上で垂直方向の断面構造にて、前記
第1番目と最終番目を除く前記映像信号線に対して隣合
う画素電極が、隣合う画素の一方が透明基板あるいは第
一の絶縁膜上に形成され、他方の画素電極との平面上の
ほぼ中間位置に形成された映像信号線が前記第一の絶縁
膜上に形成され、前記他方の画素電極が前記映像信号線
上に形成された第2の絶縁膜上に形成されたものである
。ここで、前記画素電極が映像信号線上に存在しないも
のがよい。また、複数本存在する走査信号線の第1番目
と最終番目を除く前記走査信号線を平面上で垂直方向の
断面構造にて、前記第1番目と最終番目を除く前記走査
信号線に対して隣合う画素電極が、隣合う画素の一方が
透明基板あるいは第一の絶縁膜上に形成され、他方の画
素電極との平面上のほぼ中間位置に形成された走査信号
線が前記第一の絶縁膜上に形成され、前記他方の画素電
極が前記走査信号線上に形成された第2の絶縁膜上に形
成されたものがよい。
Further, in the present invention, a thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with a gate electrode of the thin film transistor, and the video signal line is contacted with a drain electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having a function of driving liquid crystal by a pixel electrode in contact with a source electrode of the thin film transistor are formed in a matrix shape on a transparent substrate, the first and last of the plurality of video signal lines The pixel electrodes adjacent to the video signal lines other than the first and last video signal lines, except for the first and last video signal lines, are arranged on a transparent substrate or A video signal line is formed on the first insulating film and is formed on the first insulating film at a position approximately midway between the other pixel electrode and the other pixel electrode, and the other pixel electrode is connected to the video signal line. It is formed on a second insulating film formed on a line. Here, it is preferable that the pixel electrode does not exist on the video signal line. In addition, the scanning signal lines excluding the first and last of the plurality of scanning signal lines are shown in a cross-sectional structure in a vertical direction on a plane, with respect to the scanning signal lines excluding the first and last. One of the adjacent pixel electrodes is formed on a transparent substrate or a first insulating film, and a scanning signal line formed at a substantially intermediate position on a plane with the other pixel electrode is connected to the first insulating film. Preferably, the other pixel electrode is formed on a second insulating film formed on the scanning signal line.

〔作用〕[Effect]

上記した手段1は、本発明者が段差に対するITOのス
ッテプカバレジを実験した結果に基ずく。
The above-mentioned means 1 is based on the results of the inventor's experiments on step coverage of ITO for steps.

第3図にその実験結果を示す。縦軸は段差でのITOの
切断率、横軸はITOが被服すべき段差である。段差が
1000Å以下では切断衣はほぼ0%と小さいが300
0Å以上で急増し、4000Å以上では90%以上の切
断率となる7この実験結果を基にするならば、上記手段
1の様に、まず所定の厚さ(3000人以トが望ましい
)の映像信号線あるいは走査信号線を形成、絶縁膜を被
服しあるいは前記走査信号線の電極材料を陽極酸化し、
その後に1TOを堆積、加工すれば、たとえ隣合う画素
電極ITO間にエツチング不良等によりITOが残った
としても、段差でrT○が切断され短絡不良は低減する
Figure 3 shows the experimental results. The vertical axis is the cutting rate of ITO at the step, and the horizontal axis is the step to be covered by the ITO. When the step is less than 1000 Å, the cutting weight is small, almost 0%, but it is 300 Å.
The cutting rate increases sharply at 0 Å or more, and reaches 90% or more at 4,000 Å or more.7Based on this experimental result, first, as in method 1 above, an image of a predetermined thickness (preferably 3,000 or more) is cut. Forming a signal line or a scanning signal line, covering it with an insulating film or anodizing the electrode material of the scanning signal line,
If 1TO is then deposited and processed, even if ITO remains between adjacent pixel electrodes due to poor etching or the like, rT◯ is cut off at the step, reducing short-circuit defects.

上記手段2は、映像信号線の垂直方向の画素電極IT’
0間の距離が、隣合う映像信号線の距離より大きいため
、距離に対するポアソン分布統計に従い短絡不良は著し
く低減する。
The means 2 is a pixel electrode IT' in the vertical direction of the video signal line.
Since the distance between 0 and 0 is greater than the distance between adjacent video signal lines, short-circuit failures are significantly reduced according to Poisson distribution statistics for distance.

〔実施例〕〔Example〕

(実施例1) 本発明の実施例1であるアクティブマトリクス方式の液
晶表示装置の液晶表示部の1画素を第4図(要部平面図
)で示し、第4図のI−1切断線で切った断面を第1図
で示す。第5図には、第4図の■−■切断線で切った断
面を示す。また、第6図には、第4図の■−■切断線で
切った断面を示す。
(Example 1) One pixel of the liquid crystal display section of the active matrix type liquid crystal display device which is Example 1 of the present invention is shown in FIG. 4 (principal part plan view). The cut cross section is shown in Figure 1. FIG. 5 shows a cross section taken along the line ``--'' in FIG. 4. Further, FIG. 6 shows a cross section taken along the line ``--'' in FIG. 4.

第4図に示すように、液晶表示装置は、下部透明ガラス
基板の内側(液晶側)の表面上に、薄膜トランジスタT
PT及び画素電極IT○を有する画素が構成されている
As shown in FIG. 4, the liquid crystal display device includes a thin film transistor T on the inner surface (liquid crystal side) of the lower transparent glass substrate.
A pixel having a PT and a pixel electrode IT○ is configured.

各画素は、隣接する2本の走査信号線(ゲート信号線)
GLと、隣接する2本の映像信号vA(ドレイン信号線
)DLとの交差領域内(4本の信号線で囲まれた領域内
)に配置されている。各画素は薄膜トランジスタTPT
、画素電極ITO及び付加容量Caddを含む。走査信
号線OLは1列方向に延在し、行方向に複数本配置され
ている。
Each pixel consists of two adjacent scanning signal lines (gate signal lines)
It is arranged in the intersection area of GL and two adjacent video signal vA (drain signal lines) DL (in the area surrounded by four signal lines). Each pixel is a thin film transistor TPT
, a pixel electrode ITO, and an additional capacitor Cadd. The scanning signal lines OL extend in one column direction, and a plurality of scanning signal lines OL are arranged in the row direction.

映像信号線DLは5行方向に延在し、列方向に複数本配
置されている。
The video signal lines DL extend in the five row direction, and a plurality of video signal lines DL are arranged in the column direction.

断面構造は、第1図に示すように、液晶層LCを基準に
下部透明ガラス基板5UBI側には液晶配向膜0R11
、薄膜トランジスタTPT及び透明画素電極ITOIが
形成され、下部基板5UB1の下には偏光板POL 1
、上部透明ガラス基板5UB2側には、配向膜0RI2
、カラーフィルターFIL、遮光用ブランクマトリクス
パターンBMが形成され、透明ガラス基板ST、’B2
上には偏光板POL2が形成されている。また上記断面
構造には、共通透明画素型1ITO2、保護@PSVI
及びPSV2、絶縁膜GIのそれぞれの層が形成されて
いる。
As shown in FIG. 1, the cross-sectional structure has a liquid crystal alignment film 0R11 on the lower transparent glass substrate 5UBI side with the liquid crystal layer LC as a reference.
, a thin film transistor TPT and a transparent pixel electrode ITOI are formed, and a polarizing plate POL 1 is formed under the lower substrate 5UB1.
, an alignment film 0RI2 is provided on the upper transparent glass substrate 5UB2 side.
, a color filter FIL, and a light-shielding blank matrix pattern BM are formed on the transparent glass substrate ST, 'B2.
A polarizing plate POL2 is formed on top. In addition, the above cross-sectional structure includes a common transparent pixel type 1ITO2, protection @PSVI
, PSV2, and an insulating film GI are formed.

本実施例の特徴は第1図の断面構造にある。絶縁膜GI
上には第1導電膜d1及び第2導電膜d2の積層構造で
形成された映像信号線D Lがあり、その上には保護膜
PSVI膜が形成され、前記保護膜PSVIはホトエツ
チング技術で加工されている。画素電極IT○1は前記
構造形成後に形成される。従って、隣合う画素電極Ir
O2間には映像信号線の段差が2カ所ある。点欠陥を誘
因する隣合う長さLの間隙に画素電極ITO1が残膜上
して残ったとしても、上記2箇所の段差により第3図の
実験データに従い断線され点欠陥は生しない。本断面図
の主な構成部の詳細形成条件等を以下に示す。
The feature of this embodiment lies in the cross-sectional structure shown in FIG. Insulating film GI
There is a video signal line DL formed by a stacked structure of a first conductive film d1 and a second conductive film d2 on top, and a protective film PSVI film is formed on it, and the protective film PSVI is processed by photo-etching technology. has been done. The pixel electrode IT○1 is formed after the structure is formed. Therefore, the adjacent pixel electrode Ir
There are two steps between the video signal lines between O2. Even if the pixel electrode ITO1 remains on a residual film in the gap of length L between adjacent ones that induces a point defect, the line is disconnected due to the step difference at the two locations according to the experimental data shown in FIG. 3, and no point defect occurs. The detailed formation conditions of the main components in this sectional view are shown below.

′M!m膜GIは、薄膜トランジスタTPTのゲート絶
縁膜上して使用される、絶縁膜6丁は、例えば、プラズ
マGVDで形成された窒化珪素膜を用い、3000 (
人)程度の膜圧に形成される。
'M! The m film GI is used on the gate insulating film of the thin film transistor TPT. The six insulating films are, for example, silicon nitride films formed by plasma GVD, and have a thickness of 3000 (
It is formed with a membrane thickness of about the same level as that of humans.

映像信号線DLは第1導電膜d1、第2導電膜d2を順
次重ね合わせて構成されている。第1導電膜d1は、ス
パッタで形成した、クロム膜を用いて、500〜100
0 (人)の膜圧(本実施例では600(人)程度の膜
厚)により形成される。
The video signal line DL is configured by sequentially overlapping a first conductive film d1 and a second conductive film d2. The first conductive film d1 is a chromium film formed by sputtering, and has a film thickness of 500 to 100%.
It is formed with a film thickness of 0 (person) (in this example, a film thickness of about 600 (person)).

クロム膜は、後述する薄膜トランジスタTPTのN+型
半導体層dOとの接触、画素電極IT○1との接触が良
好である。また、クロム膜は、後述する第2の導電膜d
2のアルミニウムがN+型半導体層doに拡散すること
を防止するという、所謂バリア層を構成する。第1導電
膜d土としては、上記のようなりロム膜の他に高融点金
属(Mo。
The chromium film has good contact with the N+ type semiconductor layer dO of the thin film transistor TPT, which will be described later, and with the pixel electrode IT○1. Further, the chromium film is a second conductive film d, which will be described later.
It forms a so-called barrier layer that prevents the aluminum of No. 2 from diffusing into the N+ type semiconductor layer do. The first conductive film may include a high melting point metal (Mo) in addition to the above-mentioned ROM film.

Ti、Ta、W)膜、高融点金属シリサイド膜で形成し
ても良い。第2導電膜d2は、アルミニュウムのスパッ
タリングで3500〜4500CA)の膜厚(本実施例
では4000 (人)程度の膜圧)に形成される。アル
ミニュウム層は、クロム層に比へてストレスが小さく、
厚い膜厚に形成することが可能で、映像信号線DLの抵
抗値を低減するように構成されている。アルミニュウム
膜の他にシリコン(Si)、バラジュウム(Pd)や銅
(Cu)を添加物として含有させたアルミニュウム膜で
形成されても良い。
It may be formed using a Ti, Ta, W) film or a high melting point metal silicide film. The second conductive film d2 is formed by aluminum sputtering to a film thickness of 3500 to 4500 CA) (in this embodiment, a film thickness of about 4000 CA). The aluminum layer has less stress than the chromium layer.
It is possible to form a thick film and is configured to reduce the resistance value of the video signal line DL. In addition to the aluminum film, it may be formed of an aluminum film containing silicon (Si), baladium (Pd), or copper (Cu) as an additive.

画素電極IT○1は、スパッタリングで1000〜20
00 (人)の膜厚〔本実施例では1200(人)程度
の膜圧〕で形成される。
Pixel electrode IT○1 is formed by sputtering with a thickness of 1000 to 20
The film thickness is approximately 1,200 (persons) in this embodiment.

保護膜PSVIは、主に、薄膜トランジスタTPTを湿
気から保護するために形成されており、対湿性の良いも
のを使用する。例えばプラズマCVDで形成された酸化
珪素膜、窒化珪素膜、あるいはPIQ等の有機11!縁
膜で形成されている。
The protective film PSVI is mainly formed to protect the thin film transistor TPT from moisture, and a material with good moisture resistance is used. For example, a silicon oxide film formed by plasma CVD, a silicon nitride film, or an organic film such as PIQ! It is formed by the membrane.

次に、第5図の断面構造を説明する。本断面図は液晶L
Cの容量を充電する薄膜トランジスタTPTを含む断面
図である5画素電極ITO1は保護膜PSVIのホトエ
ツチング加工後に形成され、ソース電極SDIの第1導
電膜d1と接触されている。ソース電極SDIの第2導
電膜d2は保護膜PSVIで被覆されている。
Next, the cross-sectional structure shown in FIG. 5 will be explained. This cross-sectional view shows the liquid crystal L.
A 5-pixel electrode ITO1, which is a cross-sectional view including a thin film transistor TPT for charging the capacitance of C, is formed after photoetching the protective film PSVI, and is in contact with the first conductive film d1 of the source electrode SDI. The second conductive film d2 of the source electrode SDI is covered with a protective film PSVI.

薄膜トランジスタTPTは、ゲート電iGTに正のバイ
アスを引加すると、ソースドレイン(映像信号線DL)
間のチャンネル抵抗値が小さくなり、バイアスを零にす
るとチャンネル抵抗値が大きくなるように動作する。こ
の薄膜トランジスタTPTは、主に、ゲート電極GT、
ゲート絶縁膜Gl、1型(真性、1ntrinsic、
導電型決定不純物がドープされていない)非晶質Si半
導体層AS、一対のソース電極SDI及びドレイン電極
5D2(映像信号線DL)で構成されている。なお、ソ
ース、ドレインは本来その間のバイアス極性で決まり、
本表示装置の回路ではその極性は動作中反転するので、
ソース、ドレインは動作中入れ替わると理解されたい。
When a positive bias is applied to the gate voltage iGT of the thin film transistor TPT, the source/drain (video signal line DL)
The channel resistance value between the two is small, and when the bias is set to zero, the channel resistance value becomes large. This thin film transistor TPT mainly includes a gate electrode GT,
Gate insulating film Gl, type 1 (intrinsic, 1ntrinsic,
It is composed of an amorphous Si semiconductor layer AS (not doped with conductivity type determining impurities), a pair of source electrodes SDI, and a drain electrode 5D2 (video signal line DL). Note that the source and drain are originally determined by the bias polarity between them.
In the circuit of this display device, the polarity is reversed during operation, so
It should be understood that the source and drain are interchanged during operation.

便宜上一方をソース、他方をドレインと固定して表現す
る。
For convenience, one is expressed as a source and the other as a drain.

次に、第6図の断面構造を説明する3本所面図は付加容
量Caddの構造を示す。透明画素電極IT○1は、薄
膜トランジスタTPTと接続される端部と反対側の端部
において、隣りの走査信号線GLと重なる様に形成され
ている。この重ね合わせは、隣の走査信号線GLを一方
の電極PLIとし、透明画素電極ITOIと接触され、
映像信号線と同様な工程で形成された第1導電膜d1、
第2導電膜d2を他方の電極PL2とする保持容量素子
(静電容量素子) Ca d dを構成する。この保持
容量素子Caddの誘電膜は、薄膜トランジスタTPT
のゲート絶縁膜上して使用される絶縁@G■と同一層で
構成されている。
Next, three cross-sectional views for explaining the cross-sectional structure in FIG. 6 show the structure of the additional capacitor Cadd. The transparent pixel electrode IT○1 is formed so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. In this superposition, the adjacent scanning signal line GL is used as one electrode PLI, and is brought into contact with the transparent pixel electrode ITOI,
a first conductive film d1 formed in the same process as the video signal line;
A storage capacitor element (electrostatic capacitor element) Ca d d is configured in which the second conductive film d2 is the other electrode PL2. The dielectric film of this storage capacitor element Cadd is a thin film transistor TPT.
It is composed of the same layer as the insulation @G used on the gate insulation film.

上記発明における走査信号線GL即ちゲート電極GTは
、例えば、クロム(Cr)、アルミニウム(Afl)、
タンタル(Ta)等の金属で形成される。また、絶縁膜
GIの電気的耐圧を大きくするためや、映像信号線DL
と走査信号線GL間や保持容量素子Caddの短絡欠陥
を低減するため前記金属を陽極酸化し、アルミナ絶縁膜
、5酸化タンタル絶縁膜を形成しても良い。これらの陽
極酸化膜を用いると薄膜トランジスタTPTや保持容量
素子Cadclの絶縁層は絶縁膜GIと前記陽極酸化膜
上の複合膜上なる。
The scanning signal line GL, that is, the gate electrode GT in the above invention is made of, for example, chromium (Cr), aluminum (Afl),
It is made of metal such as tantalum (Ta). In addition, in order to increase the electrical breakdown voltage of the insulating film GI, and to increase the electrical breakdown voltage of the insulating film GI,
In order to reduce short-circuit defects between the storage capacitor element Cadd and the scanning signal line GL, and the storage capacitor element Cadd, the metal may be anodized to form an alumina insulating film and a tantalum pentoxide insulating film. When these anodic oxide films are used, the insulating layer of the thin film transistor TPT and storage capacitor element Cadcl is formed on the insulating film GI and the composite film on the anodic oxide film.

上記実施例では、各画素に1個の薄膜トランジスタを形
成した例を示してきたが、各画素に複数個の薄膜トラン
ジスタを形成しても本発明は適用できる。
Although the above embodiments have shown examples in which one thin film transistor is formed in each pixel, the present invention can be applied even if a plurality of thin film transistors are formed in each pixel.

最後に、本実施例の画素構造を用いた場合の、表示マト
リックス部の等価回路とその結線図を第、  7図に示
す。
Finally, FIG. 7 shows an equivalent circuit of the display matrix section and its connection diagram when the pixel structure of this embodiment is used.

同図は回路図であるが、実際の幾何学的配置に対応して
描かれている。ARは複数画素の二次元状に配列したマ
トリックスアレイである。
Although this figure is a circuit diagram, it is drawn to correspond to the actual geometrical arrangement. AR is a two-dimensional matrix array of multiple pixels.

図中Xは映像信号線DLを意味し、添字G、B及びRが
それぞれ緑、青及び赤画素に対応して付加されている。
In the figure, X means a video signal line DL, and subscripts G, B, and R are added corresponding to green, blue, and red pixels, respectively.

Yは走査信号線GLを意味し、添字1,2.3・・・・
・・endは走査タイミングの順序に従って付加されて
いる。
Y means scanning signal line GL, and subscripts 1, 2, 3, etc.
...end is added according to the order of scan timing.

映像信号線X(添字省略)は、交互に上側(又は奇数)
映像信号駆動回路He及び下側(又は偶数)映像信号駆
動回路Hoに接続されている。
Video signal lines X (subscript omitted) are alternately placed on the upper side (or odd
It is connected to the video signal drive circuit He and the lower (or even number) video signal drive circuit Ho.

SUPは1つの電圧源から複数の分圧した安定化された
電圧源を得るための電源回路やホスト(上位演算処理時
間)からのCRT (陰極線管)用の情報をTPT液晶
表示パネル用の情報に変換する回路を含む回路である。
SUP is a power supply circuit that obtains multiple divided and stabilized voltage sources from one voltage source, and information for the CRT (cathode ray tube) from the host (upper processing time) and information for the TPT liquid crystal display panel. This is a circuit that includes a circuit that converts

(実施例2) 本発明の実施例2であるアクティブマトリクス方式の液
晶表示装置の液晶表示部の1画素の映像信号線の平面構
造で垂直線上を切断した断面を第8図で示す。
(Embodiment 2) FIG. 8 shows a cross section cut along a vertical line in the plane structure of a video signal line of one pixel of a liquid crystal display section of an active matrix type liquid crystal display device according to a second embodiment of the present invention.

本実施例の特徴は第8図の断面構造にある。絶縁膜GI
上には第1導電膜d1及び第2導電膜d2の積層構造で
形成された映像信号線DLがあり、その上には保護膜P
SVI膜が形成され、前記保護膜PSVIはホトエツチ
ング技術で加工されている。画素型1’MIT○1は前
記構造形成後に形成される。従って、隣合う画素電極I
rO2間には段差が4000Å以上の保護膜PSVIの
加工段差が2カ所、映像信号線の段差が2カ所ある7点
欠陥を誘因する隣合う長さしの間隙に画素な横丁T○1
が残膜上して残ったとしても、上記4箇所の段差により
第3図実験データに従い断線され点欠陥は生しない。第
1図の断面構造及びこの記述において映像信号線DLを
挾んで隣合う2つの画素電極工T○1間の段差(保護膜
PSVL及び映像信号!DLによる)は共に3000 
(入)と設定されているが、本実施例においては映像信
号線は3000 (人)以下でも本発明の効果は達成さ
れる。
The feature of this embodiment lies in the cross-sectional structure shown in FIG. Insulating film GI
There is a video signal line DL formed of a laminated structure of a first conductive film d1 and a second conductive film d2 on top, and a protective film P is on top of the video signal line DL.
An SVI film is formed, and the protective film PSVI is processed using a photo-etching technique. The pixel type 1'MIT○1 is formed after the structure is formed. Therefore, the adjacent pixel electrode I
Between rO2, there are two processing steps of the protective film PSVI with a step difference of 4000 Å or more, and two steps of the video signal line. Alley T○1 with pixels in the gap between adjacent lengths that induces 7-point defects.
Even if it remains on the residual film, it will be disconnected due to the steps at the four locations, according to the experimental data in FIG. 3, and no point defects will occur. In the cross-sectional structure of FIG. 1 and this description, the height difference (due to the protective film PSVL and the video signal!DL) between two adjacent pixel electrodes T○1 with the video signal line DL in between is 3000.
However, in this embodiment, the effects of the present invention can be achieved even if the number of video signal lines is 3000 (people) or less.

(実施例3) 本発明の実施例3であるアクティブマトリクス方式の液
晶表示装置の液晶表示部の1画素の走査信号線の平面構
造で垂直線上を切断した断面を第9図で示す。
(Third Embodiment) FIG. 9 shows a cross section cut along a vertical line in the planar structure of a scanning signal line for one pixel of a liquid crystal display section of an active matrix type liquid crystal display device according to a third embodiment of the present invention.

本実施例の特徴は第9図の断面構造にある。走査信号線
GL上には走査信号線即ちゲー1へ電極GTは電極材料
である。例えば、アルミニウム(AQ)、タンタル(T
 a )等の金属で形成される。
The feature of this embodiment lies in the cross-sectional structure shown in FIG. On the scanning signal line GL, the scanning signal line, that is, the electrode GT to the gate 1 is an electrode material. For example, aluminum (AQ), tantalum (T
It is made of metal such as a).

前記金属は陽極酸化膜A○、即ち、アルミナ絶縁膜、5
酸化タンタル絶縁膜を形成する。画素電極ITOIは前
記構造形成後に形成さ九る。その後、絶縁膜GIを形成
する。絶縁膜GI上には第1導電膜d1及び第2導電膜
d2の積層構造で形成された映像信号線DLがある。従
って、走査信号線GLに対して、隣合う画素電極IrO
2間には走査信号mGLとその降車酸化膜A○の差があ
り、段差が3000Å以上の場合上記段差により第3図
実験データに従い断線され走査信号IGLに対して隣合
う画素電極間の電気的短絡による点欠陥は生じない。こ
の場合の保持容量Caddの上部電極は映像信号線DL
と同様な工程で形成された第1導電膜d1、第2導電膜
d2で形成される。
The metal is an anodic oxide film A○, that is, an alumina insulating film, 5
Form a tantalum oxide insulating film. The pixel electrode ITOI is formed after forming the structure. After that, an insulating film GI is formed. On the insulating film GI, there is a video signal line DL formed with a laminated structure of a first conductive film d1 and a second conductive film d2. Therefore, with respect to the scanning signal line GL, the adjacent pixel electrode IrO
There is a difference between the scanning signal mGL and its dismounting oxide film A○ between 2, and when the step is 3000 Å or more, the step causes a disconnection according to the experimental data in Figure 3, and the electrical connection between adjacent pixel electrodes with respect to the scanning signal IGL No point defects occur due to short circuits. In this case, the upper electrode of the storage capacitor Cadd is connected to the video signal line DL.
The first conductive film d1 and the second conductive film d2 are formed in a process similar to the above.

本実施例の別な特徴は、絶縁膜GIが光の透過する画素
電極IrO1上(第9図のLTの示す領域)に存在して
いないことである。もちろん、第1の導電膜はr、cの
領域で画素電極ITO上と接触されている。画素電極I
rO1上の絶縁は表示品質上の不良である残像に影響を
与える。画素電極ITo1に別の工程で形成された絶縁
膜GIと保護膜PSVIが存在すると、GIとPSVI
の界面に電荷が蓄積され残像が大きくなる。本発明では
画素電tiIT○1上に絶縁11@GIがないので残像
不良が低減できる。また、画素電極ITOY上に一旦堆
積された#lAl膜GTは薄膜トランジスタTPTのゲ
ート絶縁膜上して使用されるので保護膜PSVIより薄
膜トランジスタの安定化のために形成温度が高い。その
ため、絶縁膜GIに含まれる水素のために光の透過する
面上の画素電極ITOI表面が還元され透過率が低下す
る。そのため、画素電極ITOI上の光の透過する領域
の#4A縁膜GIを除去することにより、その除去工程
で還元された画素電極ITOIの表面を除去することは
、透過率の高い液晶表示装置を実現できる。
Another feature of this embodiment is that the insulating film GI is not present on the pixel electrode IrO1 through which light passes (the region indicated by LT in FIG. 9). Of course, the first conductive film is in contact with the pixel electrode ITO in regions r and c. Pixel electrode I
The insulation on rO1 affects afterimage, which is a defect in display quality. If the pixel electrode ITo1 has an insulating film GI and a protective film PSVI formed in different processes, GI and PSVI
Charge is accumulated on the interface of the image and the afterimage becomes larger. In the present invention, since there is no insulation 11@GI on the pixel electrode tiIT○1, afterimage defects can be reduced. Further, since the #lAl film GT once deposited on the pixel electrode ITOY is used on the gate insulating film of the thin film transistor TPT, its formation temperature is higher than that of the protective film PSVI in order to stabilize the thin film transistor. Therefore, the surface of the pixel electrode ITOI on the surface through which light is transmitted is reduced due to the hydrogen contained in the insulating film GI, and the transmittance decreases. Therefore, removing the surface of the pixel electrode ITOI that has been reduced in the removal process by removing the #4A edge film GI in the light-transmitting region on the pixel electrode ITOI is effective in creating a liquid crystal display device with high transmittance. realizable.

(実施例4) 本発明の実施例4であるアクティブマトリクス方式の液
晶表示装置の液晶表示部の1画素の走査信号線の平面構
造で垂直線上を切断した断面を第10図で示す。
(Embodiment 4) FIG. 10 shows a cross section cut along a vertical line in the planar structure of the scanning signal line of one pixel of the liquid crystal display section of an active matrix type liquid crystal display device according to Embodiment 4 of the present invention.

本実施例の特徴は第10図の断面構造にある。The feature of this embodiment lies in the cross-sectional structure shown in FIG.

この場合の保持容量Caddの上部電極は画素電極IT
Oで形成される。従って、保持容量Caddの絶縁膜が
走査信号線GLの材料を陽嘆酸化された陽極酸化膜A○
のみで構成されているため少ない平面上の面積で保持容
量Caddを形成できるため、実施例4に比べて開口率
を大きくでき。
In this case, the upper electrode of the storage capacitor Cadd is the pixel electrode IT.
Formed by O. Therefore, the insulating film of the storage capacitor Cadd is an anodic oxide film A
Since the holding capacitor Cadd can be formed using only a small plane area, the aperture ratio can be increased compared to the fourth embodiment.

明るい画面表示ができると言う特徴を持つ。It has the characteristic of providing a bright screen display.

本実施例の別な特徴も実施例3と同様に、絶縁膜GIが
光の透過する画素電極ITOI上(第9図のLtの示す
領域)に存在していないことである。もちろん、第1の
導電膜はLCの領域で画素電極IT○1と接触されてい
る。画素電極IrO2上の絶縁は表示品質上の不良であ
る残像に影響を与える。画素電極ITOIに別の工程で
形成された絶縁膜GIと保護膜PSVIが存在すると、
GIとPSVIの界面に電荷が蓄積され残像が大きくな
る。本発明では画素電極ITOI上に絶縁膜GIがない
ので残像不良が低減できる。また画素電極ITOI上に
一旦堆積された絶縁IIGTは薄膜トランジスタTPT
のゲート絶縁膜上して使用されるので保護膜PSVIよ
り薄膜トランジスタの安定化のために形成温度が高い。
Another feature of this embodiment, similar to the third embodiment, is that the insulating film GI is not present on the pixel electrode ITOI through which light passes (the region indicated by Lt in FIG. 9). Of course, the first conductive film is in contact with the pixel electrode IT○1 in the LC region. The insulation on the pixel electrode IrO2 affects afterimage, which is a defect in display quality. If the pixel electrode ITOI has an insulating film GI and a protective film PSVI formed in separate processes,
Charges are accumulated at the interface between GI and PSVI, increasing the afterimage. In the present invention, since there is no insulating film GI on the pixel electrode ITOI, afterimage defects can be reduced. Furthermore, the insulation IIGT once deposited on the pixel electrode ITOI is a thin film transistor TPT.
Since it is used over the gate insulating film of the protective film PSVI, its formation temperature is higher than that of the protective film PSVI in order to stabilize the thin film transistor.

そのため、絶縁膜GIに含まれる水素のために光の透過
する面上の画素電極IT○1表面が還元され透過率が低
下する。そのため1画素型IIT○1上の光の透過する
領域の絶縁膜GIを除去することにより、その除去工程
で還元された画素電極ITOIの表面を除去することは
、透過率の高い液晶表示装置を実現できる。
Therefore, the surface of the pixel electrode IT○1 on the surface through which light is transmitted is reduced due to the hydrogen contained in the insulating film GI, and the transmittance decreases. Therefore, by removing the insulating film GI in the light-transmitting region on the one-pixel type IIT○1, the surface of the pixel electrode ITOI reduced in the removal process can be removed, making it possible to create a liquid crystal display device with high transmittance. realizable.

(実施例5) 本実施例5は、前記液晶表示装置の液晶表示部の点欠陥
を低減した、本発明の他の実施例である。
(Example 5) Example 5 is another example of the present invention in which point defects in the liquid crystal display section of the liquid crystal display device are reduced.

本発明の実施例5である液晶表示部の液晶表示部の複数
画素を第11図(要部平面図)に、同図のI−■切断線
で切った断面を第12図に示す5本実施例2の液晶表示
装置は、第12図に示すように、映像信号線DLに直角
方向線上の断面構造に直角方向線上の断面構造において
、映像信号線DL、隣合う画素電極ITOI工及びIT
OI2がそれぞれ絶縁膜G1.保護膜PSVI、psV
2を用いて電気的に絶縁されていると共に、走査信号線
GI、隣合う画素電極ITOi及び工]゛02がそれぞ
れMl膜GI、保護膜PSVI、用いて電気的に絶縁さ
れている。従って、例えば、同一平面上(同一絶縁膜G
Iあるいは保護IIPsvl上)にある画素電極ITO
IIあるいはITOI2の映像信号線DLに直角方向の
距離は隣合う映像信号線間の距離より大きくなる。
A plurality of pixels of the liquid crystal display section of the liquid crystal display section according to the fifth embodiment of the present invention is shown in FIG. As shown in FIG. 12, the liquid crystal display device of Example 2 has a cross-sectional structure on a line perpendicular to the video signal line DL, and a cross-sectional structure on a line perpendicular to the video signal line DL.
OI2 is the insulating film G1. Protective film PSVI, psV
The scanning signal line GI, the adjacent pixel electrode ITOi, and the electrode 2 are electrically insulated using the Ml film GI and the protective film PSVI, respectively. Therefore, for example, on the same plane (the same insulating film G
Pixel electrode ITO (on I or protection IIPsvl)
The distance of II or ITOI2 in the direction perpendicular to the video signal line DL is greater than the distance between adjacent video signal lines.

このように構成される画素は、同一平面上の画素電極間
の距離が大きくなるので、点欠陥不良に対する歩留Ya
はポアソン分布統計を用いた次の指数式に従い著しく向
上することができる。
In pixels configured in this way, the distance between pixel electrodes on the same plane is large, so the yield rate Ya for point defects is low.
can be significantly improved according to the following exponential formula using Poisson distribution statistics.

Ya=exp (−D−LD/LN)XIO○(%)こ
こで、Dは第2図で示した従来構造を用いた場合の点欠
陥不良率、Loは同しく第2図の隣合う画素電極間の距
離で、LNN本実側例同一平面上の画素電極間の距離を
示す。
Ya=exp (−D−LD/LN)XIO○(%) Here, D is the point defect failure rate when using the conventional structure shown in FIG. The distance between electrodes indicates the distance between pixel electrodes on the same plane in the actual LNN example.

一例として、対角10.4インチ水平方向の映像信号線
数が1920本(II3i1合う映像信号線間の距離を
110(μm))、走査信号線線数480本のアクティ
ブマトリクス方式の液晶表示装置で、第2図の従来構造
での隣合う画素電極間の距離LDを20(μm)として
、従来構造と同し寸法ルールで液晶表示装置を作成する
と、LNは130(μm)となる。この場合、従来構造
の不良率を0.4(歩留Ya=60%)、 0.2 (
歩留Ya=80%)とすると、本実施例の点欠陥歩留Y
aはそれぞれ94%、97%と従来構造に比へて著しく
向上することができる。
As an example, an active matrix liquid crystal display device with a diagonal of 10.4 inches and 1920 video signal lines in the horizontal direction (distance between II3i1 matching video signal lines is 110 (μm)) and 480 scanning signal lines. If the distance LD between adjacent pixel electrodes in the conventional structure shown in FIG. 2 is 20 (μm) and a liquid crystal display device is manufactured using the same dimensional rules as in the conventional structure, LN will be 130 (μm). In this case, the defect rate of the conventional structure is 0.4 (yield Ya = 60%), 0.2 (
Yield Ya=80%), the point defect yield Y of this example is
a is 94% and 97%, respectively, which can be significantly improved compared to the conventional structure.

なお、第11図に示す様に同一平面上にある画素電極I
T○11あるいはITOI:2は走査信号線GLに対し
ても、同一平面の隣合う距離は隣合う走査電極間の距離
より大きいので点欠陥をさらに低減できるという特徴を
持つ。
Note that as shown in FIG. 11, the pixel electrodes I on the same plane
T○11 or ITOI:2 also has the characteristic that point defects can be further reduced with respect to the scanning signal line GL since the distance between adjacent scanning electrodes on the same plane is greater than the distance between adjacent scanning electrodes.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の実施例によれば、無対策
の場合の映像信号線を挾んで形成された画素電極間の短
絡不良が、映像信号線に保護膜を被服した後に形成され
映像信号線や保護膜の段差により、また、無対策の場合
の走査信号線を挾んで形成された画素電極間の短絡スζ
良が、走査信号線に走査信号線材料を陽極酸化して形成
された陽極酸化膜の段差により、不良として残ったrT
oz切断せしめるためや、映像信号線と垂直方向で隣合
う画素電極ITO間の距離が隣合う映像信号線間の距離
より大きくなっているため、点欠陥を著しく低減させる
という効果がある。
As explained above, according to the embodiment of the present invention, the short circuit between the pixel electrodes that was formed between the video signal lines in the case of no countermeasures is now formed after the video signal lines are covered with a protective film. Short-circuit strips between pixel electrodes formed between the scanning signal lines due to differences in signal lines and protective films, or when no countermeasures are taken
Although the rT was good, it remained as a defect due to a step in the anodic oxide film formed by anodizing the scanning signal line material on the scanning signal line.
oz cutting and because the distance between the pixel electrodes ITO adjacent to the video signal line in the vertical direction is greater than the distance between adjacent video signal lines, this has the effect of significantly reducing point defects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例1であるアクティブマトリクス
方式の液晶表示装置の液晶表示部の1画素を要部断面図
であり、本図は第4図の要部平面図の映像信号線に対す
る直角方向の断面図で■−■切断線で切った部分、第2
図は従来構造の断面図、第3図はインジュウムスズ酸化
物の段差に対する切断率、第4図は本発明の実施例1で
あるアクティブマトリクス方式の液晶表示装置の液晶表
承部の1画素を示す要部平面図、第5図は前記第4図の
■−■切断線で切った部分で薄膜トランジスタを含む断
面図、第6図は前記第4図の■−■切断線で切った部分
で保持容量素子を含む断面図。 第7図はアクティブマトリクス方式の液晶表示装置の液
晶表示部を示す等価回路図、第8図は本発明の実施例2
であるアクティブマトリクス方式の液晶表示装置の液晶
表示部の映像信号線の垂直線上の断面図、第9図は本発
明の実施例3であるアクティブマトリクス方式の液晶表
示装置の液晶表示部の走査信号線の垂直線上の断面図、
第10図は本発明の実施例4であるアクティブマトリク
ス方式の液晶表示装置の液晶表示部の走査信号線の垂直
線上の断面図、第11図は本発明の実施例5であるアク
ティブマトリクス方式の液晶表示itの液晶表示部の複
数の画素を配置したときの平面図、第12図は前記第1
1図のI−1切断線で切った部分で映像信号線に対する
直角方向の断面図である。 SUB・・透明ガラス基板、OL ・走査信号線、DL
・・・映像信号線、GI・・・絶縁膜、GT・・・ゲー
ト電極、SD・・ソース電極、psv・・・保護膜、L
C・液晶。 TPT・・・薄膜トランジスタ、ITO・・透明電極、
d 導電膜、Cadd・・保持容量素子、A○・・・陽
極酸化膜、Cpix・液晶容量(英文字の後の数字の添
字は省略)。
FIG. 1 is a sectional view of a main part of one pixel of a liquid crystal display section of an active matrix type liquid crystal display device according to a first embodiment of the present invention, and this figure shows the relationship between the video signal line in the plan view of the main part of FIG. The part cut along the ■-■ cutting line in the cross-sectional view in the right angle direction, the second
The figure shows a cross-sectional view of a conventional structure, Figure 3 shows the cutting rate of indium tin oxide with respect to a step, and Figure 4 shows one pixel of the liquid crystal surface of an active matrix type liquid crystal display device according to Embodiment 1 of the present invention. A plan view of the main part, Figure 5 is a sectional view including the thin film transistor taken along the section line ■-■ in Figure 4, and Figure 6 is a cross-sectional view taken along the line ■-■ in Figure 4. A cross-sectional view including a capacitive element. FIG. 7 is an equivalent circuit diagram showing a liquid crystal display section of an active matrix type liquid crystal display device, and FIG. 8 is a second embodiment of the present invention.
FIG. 9 is a cross-sectional view taken along a vertical line of the video signal line of the liquid crystal display section of the active matrix liquid crystal display device according to the third embodiment of the present invention. FIG. cross-section on the perpendicular line,
FIG. 10 is a sectional view taken along a vertical line of the scanning signal line of the liquid crystal display section of an active matrix type liquid crystal display device according to a fourth embodiment of the present invention, and FIG. 11 is a cross-sectional view of an active matrix type liquid crystal display device according to a fifth embodiment of the present invention. FIG. 12 is a plan view when a plurality of pixels of the liquid crystal display section of the liquid crystal display IT are arranged.
FIG. 2 is a cross-sectional view taken along the line I-1 in FIG. 1 in a direction perpendicular to the video signal line. SUB: Transparent glass substrate, OL, scanning signal line, DL
...Video signal line, GI...insulating film, GT...gate electrode, SD...source electrode, psv...protective film, L
C. Liquid crystal. TPT...thin film transistor, ITO...transparent electrode,
d Conductive film, Cadd...retention capacitor element, A○...anodic oxide film, Cpix/liquid crystal capacitor (numerical subscripts after letters are omitted).

Claims (1)

【特許請求の範囲】 1、1つの走査信号線と1つ映像信号線の交点に薄膜ト
ランジスタを形成し、前記走査信号線は薄膜トランジス
タのゲート電極に接触され、前記映像信号線は薄膜トラ
ンジスタのドレイン電極に接触され、前記薄膜トランジ
スタのソース電極に接触された画素電極によって液晶を
駆動する機能を有する単位画素を透明基板上にマトリス
ク状に形成した液晶表示装置において、所定の厚さを持
つ映像信号線上に所定の厚さの第一の絶縁膜が形成され
、透明な画素電極は前記映像信号線上に堆積された前記
第一の絶縁膜上の前記映像信号線の占有する面積上以外
の前記第一の絶縁膜上に形成されていることを特徴とす
る液晶表示装置。 2、請求項1に於いて、映像信号線が3000Å以上の
厚さを持つことを特徴とする液晶表示装置。 3、1つの走査信号線と1つ映像信号線の交点に薄膜ト
ランジスタを形成し、前記走査信号線は薄膜トランジス
タのゲート電極に接触され、前記映像信号線は薄膜トラ
ンジスタのドレイン電極に接触され、前記薄膜トランジ
スタのソース電極に接触された画素電極によって液晶を
駆動する機能を有する単位画素を透明基板上にマトリス
ク状に形成した液晶表示装置の製造方法に於いて、映像
信号線、映像信号線上に堆積される第一の絶縁膜及び第
一の絶縁膜上に形成される透明な画素電極の形成順序は
、映像信号線、第一の絶縁膜、透明な画素電極であるこ
とを特徴とする液晶表示装置の製造方法。 4、1つの走査信号線と1つ映像信号線の交点に薄膜ト
ランジスタを形成し、前記走査信号線は薄膜トランジス
タのゲート電極に接触され、前記映像信号線は薄膜トラ
ンジスタのドレイン電極に接触され、前記薄膜トランジ
スタのソース電極に接触された画素電極によって液晶を
駆動する機能を有する単位画素を透明基板上にマトリス
ク状に形成した液晶表示装置において、所定の厚さを持
つ映像信号線上に所定の厚さの第一の絶縁膜が形成され
、透明な画素電極は前記映像信号線上に堆積された前記
第一の絶縁膜上の前記映像信号線の占有する面積上以外
の少なくとも前記第一の絶縁膜上をエッチング除去され
た領域に形成されていることを特徴とする液晶表示装置
。 5、請求項4において、透明な画素電極は前記映像信号
線上に堆積された前記第一の絶縁膜上の前記映像信号線
の占有する面積上以外の前記第一の絶縁膜上をエッチン
グ除去された領域にのみ形成されていることを特徴とす
る液晶表示装置。 6、請求項4又は5に於いて、その一部を除去される第
1の絶縁膜が3000Å以上の厚さを持つことを特徴と
する液晶表示装置。 7、請求項4又は5に於いて、映像信号線とその一部を
除去される第一の絶縁膜がともに3000Å以上の厚さ
を持つことを特徴とする液晶表示装置。 8、1つの走査信号線と1つ映像信号線の交点に薄膜ト
ランジスタを形成し、前記走査信号線は薄膜トランジス
タのゲート電極に接触され、前記映像信号線は薄膜トラ
ンジスタのドレイン電極に接触され、前記薄膜トランジ
スタのソース電極に接触された画素電極によって液晶を
駆動する機能を有する単位画素を透明基板上にマトリス
ク状に形成した液晶表示装置において、複数本存在する
走査信号線の第1番目と最終番目を除く前記走査信号線
を平面上で垂直方向の断面構造にて、前記第1番目と最
終番目を除く前記走査信号線に対して隣合う画素電極が
、前記走査電極材料を陽極酸化して形成した陽極酸化膜
の少なくとも一つの段差以外に形成され、前記画素電極
上で光の透過する開口領域以外の部分に薄膜トランジス
タのゲート絶縁膜を設けたことを特徴とする液晶表示装
置。 9、1つの走査信号線と1つ映像信号線の交点に薄膜ト
ランジスタを形成し、前記走査信号線は薄膜トランジス
タのゲート電極に接触され、前記映像信号線は薄膜トラ
ンジスタのドレイン電極に接触され、前記薄膜トランジ
スタのソース電極に接触された画素電極によって液晶を
駆動する機能を有する単位画素を透明基板上にマトリス
ク状に形成した液晶表示装置において、複数本存在する
走査信号線の第1番目と最終番目を除く前記走査信号線
を平面上で垂直方向の断面構造にて、前記第1番目と最
終番目を除く前記走査信号線に対して隣合う透明な画素
電極が、前記走査電極材料を陽極酸化して形成した陽極
酸化膜上以外の部分に形成され、前記画素電極上で光の
透過する開口領域以外の部分に薄膜トランジスタのゲー
ト絶縁膜を設けたことを特徴とする液晶表示装置。 10、走査信号線、走査信号線上に形成される陽極酸化
膜、ソース電極に接触される画素電極形成順序は、走査
信号線、陽極酸化膜、画素電極形成の順序に製造され、
陽極酸化膜と画素電極の製造工程中に、他の絶縁膜の製
造工程を含まない工程で製造されることを特徴とする液
晶表示装置の製造方法。 11、請求項8又は9に於いて、保持容量を形成する上
部及び下部電極は共に不透明の電極材料で形成されたこ
とを特徴とする液晶表示装置。 12、請求項8又は9に於いて、保持容量を形成する上
部電極は画素電極で形成されたことを特徴とする液晶表
示装置。 13、請求項8又は9に於いて、前記走査信号線と前記
陽極酸化膜の厚さの総和が3000Å以上であることを
特徴とする液晶表示装置。 14、1つの走査信号線と1つ映像信号線の交点に薄膜
トランジスタを形成し、前記走査信号線は薄膜トランジ
スタのゲート電極に接触され、前記映像信号線は薄膜ト
ランジスタのドレイン電極に接触され、前記薄膜トラン
ジスタのソース電極に接触された画素電極によって液晶
を駆動する機能を有する単位画素を透明基板上にマトリ
スク状に形成した液晶表示装置において、複数本存在す
る映像信号線の第1番目と最終番目を除く前記映像信号
線を平面上で垂直方向の断面構造にて、前記第1番目と
最終番目を除く前記映像信号線に対して隣合う画素電極
が、隣合う画素の一方が透明基板あるいは第一の絶縁膜
上に形成され、他方の画素電極との平面上のほぼ中間位
置に形成された映像信号線が前記第一の絶縁膜上に形成
され、前記他方の画素電極が前記映像信号線上に形成さ
れた第2の絶縁膜上に形成されたことを特徴とする液晶
表示装置。 15、請求項14において、前記画素電極が映像信号線
上以外の部分に形成されことを特徴とする液晶表示装置
。 16、請求項14において、複数本存在する走査信号線
の第1番目と最終番目を除く前記走査信号線を平面上で
垂直方向の断面構造にて、前記第1番目と最終番目を除
く前記走査信号線に対して隣合う画素電極が、隣合う画
素の一方が透明基板あるいは第一の絶縁膜上に形成され
、他方の画素電極との平面上のほぼ中間位置に形成され
た走査信号線が前記第一の絶縁膜上に形成され、前記他
方の画素電極が前記走査信号線上に形成された第2の絶
縁膜上に形成されたことを特徴とする液晶表示装置。
[Claims] 1. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is in contact with the gate electrode of the thin film transistor, and the video signal line is in contact with the drain electrode of the thin film transistor. In a liquid crystal display device in which a unit pixel is formed in a matrix shape on a transparent substrate and has a function of driving a liquid crystal by a pixel electrode that is in contact with the source electrode of the thin film transistor, a predetermined pixel is formed on a video signal line having a predetermined thickness. A first insulating film having a thickness of A liquid crystal display device characterized in that it is formed on a film. 2. The liquid crystal display device according to claim 1, wherein the video signal line has a thickness of 3000 Å or more. 3. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is in contact with the gate electrode of the thin film transistor, the video signal line is in contact with the drain electrode of the thin film transistor, and the thin film transistor is in contact with the gate electrode of the thin film transistor. In a method of manufacturing a liquid crystal display device in which unit pixels having a function of driving liquid crystal by a pixel electrode in contact with a source electrode are formed in a matrix shape on a transparent substrate, a video signal line, a pixel deposited on the video signal line, etc. Manufacturing of a liquid crystal display device characterized in that the first insulating film and the transparent pixel electrode formed on the first insulating film are formed in the following order: a video signal line, a first insulating film, and a transparent pixel electrode. Method. 4. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is in contact with the gate electrode of the thin film transistor, the video signal line is in contact with the drain electrode of the thin film transistor, and the thin film transistor is in contact with the gate electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having the function of driving liquid crystal by a pixel electrode in contact with a source electrode are formed in a matrix shape on a transparent substrate, a first pixel of a predetermined thickness is placed on a video signal line having a predetermined thickness. an insulating film is formed, and the transparent pixel electrode is etched away at least on the first insulating film other than the area occupied by the video signal line on the first insulating film deposited on the video signal line. A liquid crystal display device characterized in that the liquid crystal display device is formed in a region where 5. In claim 4, the transparent pixel electrode is etched away on the first insulating film deposited on the video signal line other than the area occupied by the video signal line. A liquid crystal display device characterized in that a liquid crystal display device is formed only in a region where 6. The liquid crystal display device according to claim 4 or 5, wherein the first insulating film from which a portion is removed has a thickness of 3000 Å or more. 7. The liquid crystal display device according to claim 4 or 5, wherein both the video signal line and the first insulating film from which a portion thereof is removed have a thickness of 3000 Å or more. 8. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with the gate electrode of the thin film transistor, the video signal line is contacted with the drain electrode of the thin film transistor, and the thin film transistor is connected to the gate electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode are formed in a matrix shape on a transparent substrate, the above scanning signal lines excluding the first and last of a plurality of scanning signal lines exist. Anodic oxidation in which pixel electrodes adjacent to the scanning signal line except the first and last scanning signal lines are formed by anodic oxidation of the scanning electrode material in a cross-sectional structure in a vertical direction on a plane. A liquid crystal display device characterized in that a gate insulating film of a thin film transistor is provided in a portion other than at least one step of the film and in a portion other than an opening region through which light passes on the pixel electrode. 9. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is contacted with the gate electrode of the thin film transistor, the video signal line is contacted with the drain electrode of the thin film transistor, and the thin film transistor is connected to the gate electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode are formed in a matrix shape on a transparent substrate, the above scanning signal lines excluding the first and last of a plurality of scanning signal lines exist. A transparent pixel electrode adjacent to the scanning signal line except for the first and last scanning signal lines is formed by anodizing the scanning electrode material in a vertical cross-sectional structure on a plane. 1. A liquid crystal display device comprising: a gate insulating film of a thin film transistor formed on a portion other than the anodic oxide film and provided on the pixel electrode other than the opening region through which light passes. 10. The scanning signal line, the anodic oxide film formed on the scanning signal line, and the pixel electrode in contact with the source electrode are formed in the order of forming the scanning signal line, the anodic oxide film, and the pixel electrode,
A method for manufacturing a liquid crystal display device, characterized in that the liquid crystal display device is manufactured in a process that does not include a manufacturing process for other insulating films during the manufacturing process for an anodic oxide film and a pixel electrode. 11. The liquid crystal display device according to claim 8 or 9, wherein both the upper and lower electrodes forming the storage capacitor are formed of an opaque electrode material. 12. The liquid crystal display device according to claim 8 or 9, wherein the upper electrode forming the storage capacitor is formed of a pixel electrode. 13. The liquid crystal display device according to claim 8 or 9, wherein the total thickness of the scanning signal line and the anodic oxide film is 3000 Å or more. 14. A thin film transistor is formed at the intersection of one scanning signal line and one video signal line, the scanning signal line is in contact with the gate electrode of the thin film transistor, the video signal line is in contact with the drain electrode of the thin film transistor, and the thin film transistor is in contact with the gate electrode of the thin film transistor. In a liquid crystal display device in which unit pixels having a function of driving a liquid crystal by a pixel electrode in contact with a source electrode are formed in a matrix shape on a transparent substrate, the above-mentioned video signal lines excluding the first and last of a plurality of video signal lines exist. In a vertical cross-sectional structure of the video signal line on a plane, pixel electrodes adjacent to the video signal line except for the first and last video signal lines are connected to a transparent substrate or a first insulator. A video signal line formed on the first insulating film is formed on the first insulating film, and the video signal line is formed on the first insulating film, and the other pixel electrode is formed on the video signal line. A liquid crystal display device characterized in that the liquid crystal display device is formed on a second insulating film. 15. The liquid crystal display device according to claim 14, wherein the pixel electrode is formed on a portion other than the video signal line. 16. In claim 14, the scanning signal lines excluding the first and last of the plurality of scanning signal lines are arranged in a cross-sectional structure in a vertical direction on a plane, and the scanning signal lines excluding the first and last are One of the pixel electrodes adjacent to the signal line is formed on a transparent substrate or a first insulating film, and the scanning signal line is formed at approximately the midpoint on the plane with the other pixel electrode. A liquid crystal display device, wherein the pixel electrode is formed on the first insulating film, and the other pixel electrode is formed on the second insulating film formed on the scanning signal line.
JP31983490A 1990-11-22 1990-11-22 Liquid crystal display Expired - Lifetime JP2772405B2 (en)

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