JPH05267344A - Thin-film semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent disconnection of wirings based on adherence of a foreign matter by sequentially forming an insulating film and a semiconductor film on a control electrode, and forming a pair of main electrodes patterned after doping with n-type impurity. CONSTITUTION:Chromium and an ITO film are sputtered on a glass board 1, and patterned, thereby forming a gate electrode 2 and a pixel electrode 9. Then, a gate insulating film 3 of silicon nitride and a hydrogenated a-Si semiconductor film 4 are continuously deposited by a plasma CVD method, and a resist pattern is formed by ion implanting and then a photolithography method. With the resist pattern as a mask it is etched. Then, after molybdenum and aluminum are sputtered, they are patterned to form a source electrode 5 and a drain electrode 6, and then ion implanted. Eventually, a protective film 11 of silicon nitride is formed on the entire surface of the board 1. A photoetching step is needed only once. A step is prevented between the electrodes by holding cleanness of the surface of the film, thereby preventing disconnection of wirings.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device and a method for manufacturing the same, and more particularly to a thin film semiconductor device used for a liquid crystal driving device such as a liquid crystal display device, which is free from defects such as disconnection of wiring.
The present invention relates to a thin film semiconductor device capable of exhibiting excellent liquid crystal display characteristics and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, a thin film transistor (hereinafter referred to as a TFT) formed on a transparent insulating substrate such as glass.
Is widely applied to an active element in a driving matrix substrate of an active matrix type liquid crystal flat panel display, an active element in a line image sensor of a facsimile, and the like.

In this case, TFTs applied to these
Since it is easy to form a large number in a large area at low temperature, a TFT using amorphous silicon (Si) (hereinafter referred to as a-Si) is widely used.

FIGS. 9A to 9C and FIGS. 10A to 10C show one a in the conventional matrix substrate.
FIG. 6 is a cross-sectional view showing a manufacturing process of a SiTFT.

In these figures, 51 is a glass substrate constituting a transparent insulating substrate, 52 is a gate electrode, 53 is a gate insulating film, 54 is an a-Si semiconductor film, and 55 is an n-type a-S.
i semiconductor film, 56 is a transparent pixel electrode, 57 is a drain electrode, 58 is a source electrode, and 59 is a protective insulating film.

The a-Si TFT is manufactured by the following steps.

First, a gate electrode 52 connected to a scanning signal electrode line (not shown) is formed on a glass substrate 51, and then a gate insulating film is sequentially formed on the glass substrate 51 including the gate electrode 52. 53, a-Si semiconductor film 54,
The n-type a-Si semiconductor film 55 is continuously formed (FIG. 9).
a).

Next, the a-Si semiconductor film 54 and the n-type a-Si semiconductor film 55 are patterned into a predetermined pattern shape (FIG. 9b).

Next, the gate insulating film 53 is patterned into a predetermined pattern shape to form an external connection portion for the scanning signal electrode line (FIG. 9c).

Subsequently, a transparent pixel electrode 56 is formed on the gate insulating film 53, and then a drain electrode 57 connected to a video signal electrode line (not shown) and the pixel electrode 5 are formed.
6 to form the source electrode 58 (see FIG. 10).
a).

Further, the n-type a-Si semiconductor film 55 is etched off to electrically isolate the drain electrode 57 and the source electrode 58 (FIG. 10b).

Finally, a protective insulating film 59 is formed on the entire surface of the glass substrate 51, and the protective insulating film 59 is patterned into a predetermined pattern (FIG. 10c).

By the way, the above-mentioned conventional method for manufacturing an a-Si TFT has various problems as described below.

First, the gate insulating film 53, a-Si
Between the continuous formation of the semiconductor film 54 and the n-type a-Si semiconductor film 55 and the formation of the drain electrode 57 and the source electrode 58, the transparent pixel electrode 56 is formed and photoetching is performed on the transparent pixel electrode 56. -Si semiconductor film 54 and n
The photo-etching for the type a-Si semiconductor film 55 and the photo-etching for the gate insulating film 53 have a total of one film-forming process and three photo-etching processes. Therefore, the surface on which the drain electrode 57 and the source electrode 58 are formed. The cleanliness of can not be maintained. Specifically, the etching residue of the transparent pixel electrode 56, the photoresist layer that has been deteriorated and cannot be removed, and the like tends to remain on the surface of the gate insulating film 53 as foreign matter. When the drain electrode 57 or the video signal electrode line connected to the drain electrode 57 and the source electrode 58 are formed on the surface of the gate insulating film 53 in which such foreign matter is present, the wiring is disconnected due to the step caused by the foreign matter, the penetration of the etching solution, or the like. Is more likely to occur and the yield is reduced.

Secondly, when the n-type a-Si semiconductor film 55 is etched, the a-Si semiconductor film 54 also needs to be etched to some extent.
It is difficult to reduce the film thickness of the semiconductor film 54 to a certain thickness or less, which causes a slight photocurrent to flow through the a-Si semiconductor film 54, which reduces the off resistance of the TFT. Then, when the TFT is applied to a display device, the reduction in the off resistance causes a reduction in the image contrast ratio, which has a fatal effect on the display screen such as image burning. Further, since the thickness of the a-Si semiconductor film 54 is large, a-S
When a foreign substance due to an etching residue adheres to the i semiconductor film 54, the foreign substance causes a step difference in the wiring or the like, and the disconnection of the wiring is apt to occur in the gap portion.

Further, recently, an improved TFT
As a manufacturing process of, for example, means disclosed in JP-A-63-9157 has been proposed.

11 (a) to 11 (c) are sectional views showing steps of manufacturing the TFT according to the above disclosure.

In FIG. 11, 61 is a transparent insulating substrate such as a glass substrate, 62 is a gate electrode, 63 is an insulating layer, 64 is a semiconductor layer, 65 is an impurity semiconductor layer, 66 is a source electrode,
67 is a drain electrode.

This TFT is manufactured by the following steps.

First, the gate electrode 62 is formed on the glass substrate 61.
To form. Then, an insulating layer 63 of silicon nitride or silicon oxide is formed on the glass substrate 61 including the gate electrode 62, and a semiconductor layer 64 of polycrystalline silicon or amorphous silicon is formed on the insulating layer 63.
An impurity semiconductor layer 65 doped with an element such as phosphorus is formed thereon (FIG. 11a).

Next, a conductive layer for forming a main electrode is deposited and formed on the impurity semiconductor layer 65, and the conductive layer and the impurity semiconductor layer 65 are simultaneously patterned to form a source electrode 66 and a drain electrode 67. (Fig. 11b).

Finally, by patterning the insulating layer 63 and the semiconductor layer 64 in the same pattern shape at the same time,
A TFT is to be formed (FIG. 11c).

According to this manufacturing process, the selective etching of the semiconductor layer 64 and the insulating layer 63 becomes unnecessary, and it is not necessary to go through the unstable manufacturing process associated with the selective etching, and the source electrode 66 and the drain. This has the advantage that highly precise pattern alignment of the electrodes 67 is not required.

[0024]

However, even in the manufacturing process of the TFT according to the above disclosure (disclosed in Japanese Patent Laid-Open No. 63-9157), the above-mentioned first process mentioned in the conventional manufacturing process of the TFT is used. Among the second and the second adverse effects, the first adverse effect can be solved, but no consideration is given to the second adverse effect.

The present invention eliminates the above-mentioned various adverse effects, and an object of the present invention is to reduce the occurrence of disconnection in wiring and to prevent a decrease in off resistance due to photocurrent, and a thin film semiconductor device. It is to provide the manufacturing method.

[0026]

To achieve the above object, the present invention provides a step of forming a control electrode on a transparent insulating substrate and a step of sequentially forming a first insulating film and a semiconductor film on the control electrode. A step of doping the semiconductor film with an n-type impurity, a step of patterning the first insulating film and the semiconductor film, a step of forming a pair of main electrodes on the semiconductor film, and a step of forming the pair of main electrodes. Step of doping the semiconductor film with a p-type impurity using the main electrode as a mask, a step of forming a second insulating film on the semiconductor film and the main electrode of the pair, and the main electrode of the pair and the second electrode of the pair. First step of patterning the semiconductor film using the insulating film as a mask
It is equipped with means.

In order to achieve the above object, the present invention provides a scanning signal electrode line and a video signal electrode line which are arranged in a matrix on a transparent insulating substrate so as to be insulated from each other by an insulating film, and the scanning. A thin film semiconductor element and a pixel electrode arranged at each intersection of the signal electrode line and the video signal electrode line, wherein the thin film semiconductor element is a control electrode conductively connected to the scanning signal electrode line; One main electrode that is conductively connected to the signal electrode line, the other main electrode that is conductively connected to the pixel electrode, and a semiconductor film disposed below the main electrodes, and the semiconductor film is The second pattern extending in the lower layer in the same pattern as the video signal electrode line
It is equipped with means.

[0028]

The disconnection of the wiring in the video signal electrode line and the drain electrode is mainly caused by various film formation and photoetching processes between the PCVD process and the formation of the video signal electrode line and the drain electrode. This occurs because foreign matter such as photoresist residue remains on the surface of the film.

According to the present invention, first, a step of forming a control electrode on a transparent insulating substrate, and then a first step on the control electrode.
The step of sequentially forming an insulating film and a semiconductor film, the step of doping the semiconductor film with an n-type impurity, the step of patterning the first insulating film and the semiconductor film, and the semiconductor film Since the pair of main electrodes is formed on the upper side, the steps from the step of forming the semiconductor film to the step of doping the n-type impurity to the formation of the video signal electrode line and the drain electrode are Since only one photo-etching step is performed, the contamination of the surface of the semiconductor film or the first insulating film can be reduced as much as possible, and thereby the video signal electrode line or the signal signal electrode line due to the adhesion of foreign matter on the surface can be reduced. It is possible to prevent disconnection of the wiring in the drain electrode.

The transparent pixel electrode film is formed by the semiconductor film before the step of sequentially forming the first insulating film and the semiconductor film on the control electrode, or by using the paired main electrode and the second insulating film as a mask. By forming after the step of patterning, the residue of the pixel electrode film does not stay on the surface of the semiconductor film or the first insulating film, and it is possible to further reduce the contamination of the surface. It is possible to considerably reduce the frequency of disconnection of the wiring in the video signal electrode line and the drain electrode due to the adhesion of foreign matter on the surface.

According to the present invention, first, a step of forming a control electrode on a transparent insulating substrate, then a step of sequentially forming a first insulating film and a semiconductor film on the control electrode, and then, A step of doping the semiconductor film with an n-type impurity, a step of patterning the first insulating film and the semiconductor film, a step of forming a pair of main electrodes on the semiconductor film, and a step of forming the pair of main electrodes. A step of doping the semiconductor film with a p-type impurity using the main electrode as a mask is performed, and after the entire portion of the semiconductor film is doped with an n-type impurity, a pair of main electrodes (a source electrode and a drain) is formed. (Electrode) as a mask, the channel formation region between the source electrode and the drain electrode in the semiconductor film is doped with a p-type impurity at a concentration equal to or higher than that of the n-type impurity. . Therefore, in the semiconductor film, the resistance of the channel formation region between the source electrode and the drain electrode is increased, and the n-type a-Si film which is required in the conventional manufacturing method is not etched, The source electrode and the drain electrode can be electrically isolated.

Therefore, according to the present invention, since it is not necessary to etch the n-type a-Si film, the semiconductor film can be made as thin as possible, and the decrease in off resistance due to photocurrent can be suppressed. ..

According to the present invention, n-type and p-type impurities are doped in the semiconductor film which is the active layer. By the way, in the hydrogenated a-Si semiconductor film, if either n-type or p-type impurities are doped to control the conductivity, the number of structural defects in the semiconductor film increases, and n-type and It is known that the simultaneous doping of p-type impurities suppresses the increase of the structural defects. Further, structural defects in the semiconductor film bring about undesired characteristics such as an increase in the threshold voltage of the TFT and an increase in off current. Therefore, it is necessary to reduce the structural defects as much as possible. In this regard, according to the present invention, n-type and p-type
Since the co-doping with the type impurities is performed, the increase of structural defects in the semiconductor film is suppressed, and the above-mentioned undesired characteristics do not occur in the obtained TFT.

In this case, if the semiconductor film is excessively doped with impurities, complex defects of n-type impurities and p-type impurities are generated, and the characteristics of the obtained TFT are deteriorated. It must be doped with a predetermined amount or less of impurities. On the other hand, in order to maintain good electrical contact between the source electrode and the drain electrode and the semiconductor film, the surface portion of the semiconductor film that is in contact with the source electrode and the drain electrode should have a certain amount or more. It must be doped with an amount of impurities. Here, in order to satisfy the above two requirements, it is necessary to make the concentration distribution such that the impurity amount sharply decreases exponentially from the surface of the semiconductor film in the depth direction. Such a special impurity concentration distribution is difficult to realize by the conventional ion implantation method.

Therefore, in the present invention, an ion beam without mass separation, that is, a non-mass separation type ion implantation is performed, and impurity ions are doped at a low energy of 2500 eV or less to obtain the special impurity concentration distribution. A TFT that is realized and thereby has good characteristics
Is getting

[0036]

Embodiments of the present invention will be described below with reference to the drawings.

1A to 1D and FIGS. 2A to 2D show one thin film semiconductor device (TF) according to the present invention.
It is a structure sectional view showing an example of a manufacturing process of T).

In FIGS. 1 and 2, 1 is a transparent insulating substrate made of a glass substrate or the like, 2 is a gate electrode, 3 is a gate insulating film, 4 is an a-Si semiconductor film, 5 is a source electrode, 6 is a drain electrode, Reference numerals 7 and 8 are large-diameter ion beams, 9 is a transparent pixel electrode, 10 is a photoresist pattern, and 11 is a protective film.

The thin film semiconductor device (TFT) is manufactured through the following steps.

First, chrome (Cr) is formed on the glass substrate 1.
Is deposited by a sputtering method and then patterned into a predetermined pattern shape to form a gate electrode 2 (FIG. 1a). Next, an ITO film is deposited by sputtering, and then patterned into a predetermined pattern shape to form a transparent pixel electrode 9 (FIG. 1b). continue,
A gate insulating film 3 made of silicon nitride (SiN) is deposited to a thickness of 400 nm by a plasma CVD method, and hydrogenated amorphous silicon (a-Si: H) is continuously formed thereon.
The a-Si semiconductor film 4 made of is deposited to a thickness of 60 nm. Then, the glass substrate 1 is kept at a temperature of 200 to 300 ° C., and P +, PH +, PH ₂ +, etc. extracted from the plasma of phosphine (PH ₃ ) gas are placed on the a-Si semiconductor film 4 of the substrate 1. The large-diameter ion beam 7 containing phosphorus (P) is implanted at an acceleration energy of 1.0 kV at 5 × 10 ¹⁵ per 1 cm 2 (FIG. 1c).

In this case, as a device for performing the low energy, non-mass separation type ion implantation as described above, for example, a magnetic bucket type ion source as disclosed in JP-A-2-199824 may be used. .. By the way, the magnetic bucket ion source is characterized in that it can extract a large-current ion beam even with a low acceleration voltage of about 1 kV or less, and requires an ion beam of low energy of 2.5 kV or less. It is suitable for the manufacturing method of this embodiment. Further, the magnetic bucket type ion source,
5 x 1 per square cm with 1.0 kV acceleration energy
The time required to inject 0 ¹⁵ pieces is within 10 seconds, which has extremely high throughput characteristics.

Next, a photoresist pattern is formed on the a-Si semiconductor film 4 by a normal photolithography method, and the a-Si semiconductor film 4 and the gate insulating film 3 are etched using this pattern as a mask. In this etching, SF ₆ or the like is used as an etching gas, and
-The Si semiconductor film 4 and the gate insulating film 3 are continuously etched (FIG. 1d). Then, a-
Molybdenum (Mo) and aluminum (Al) are successively deposited and formed on the Si semiconductor film 4 and the like, which is patterned into a predetermined pattern shape to form the source electrode 5 and the drain electrode 6. After that, the glass substrate 1
Diborane (B ₂ H ₆ ) maintained at a temperature of 00 to 300 ° C.
A large-diameter ion beam 8 containing boron (B) extracted from a gas plasma is injected at an acceleration energy of 1.0 kV at 5 × 10 ¹⁵ per 1 cm 2 (FIG. 2a). Also in the implantation of the large-diameter ion beam 8, it is preferable to use the magnetic bucket type ion source as in the case of the above-mentioned implantation. Then, a predetermined photoresist pattern 10 is formed on the a-Si semiconductor film 4, the source electrode 5 and the drain electrode 6 by a normal photolithography method (FIG. 2b). Then, this photoresist pattern 10,
A-S using the source electrode 5 and the drain electrode 6 as a mask
The i semiconductor film 4 is patterned (FIG. 2c). Finally, the protective film 11 made of silicon nitride (SiN) is formed on the entire surface of the substrate 1, and the manufacturing of the thin film semiconductor device (TFT) is completed.

As described above, in this embodiment, the photo-etching process is performed between the plasma CVD process and the process of forming the drain electrode 6 and the source electrode 5 by using the a-S process.
Since the photo-etching of the i semiconductor film 4 and the gate insulating film 3 is performed only once, the cleanliness of the surfaces of the a-Si semiconductor film 4 and the gate insulating film 3 can be sufficiently maintained. It is possible to prevent a gap from occurring in the source electrode 5 and the drain electrode 6 formed on the surfaces of the semiconductor film 4 and the gate insulating film 3, and to prevent a wiring from being broken due to the gap.

In this case, in the present embodiment, since the a-Si semiconductor film 4 is etched using the drain electrode 6 and the source electrode 5 as a mask, the a-Si semiconductor film 4 is always underneath the drain electrode 6 by a. -Si semiconductor film 4 remains. Here, when a liquid crystal display device is configured using the thin film semiconductor device (TFT) manufactured by the manufacturing method of the present embodiment, the a-Si semiconductor film 4 below the drain electrode 6 is formed on the back surface of the glass substrate 1. Since the incident light is directly irradiated, a
There is a possibility that a photocurrent is generated in the -Si semiconductor film 4 and the off resistance of the TFT is reduced. By the way, since the photocurrent of the TFT is proportional to the square or the cube of the film thickness of the a-Si semiconductor film 4, thinning the a-Si semiconductor film 4 is extremely effective for reducing the photocurrent. It becomes an effective means. However, the TFT manufactured by the manufacturing method of the present embodiment is
The etching step of the n-type a-Si semiconductor layer, which has been conventionally required, is omitted, so that the a-S that becomes an active layer is formed.
Since the i semiconductor film 4 can be thinned, a−
It is possible to suppress the decrease in the off resistance of the TFT due to the photocurrent generated in the Si semiconductor film 4, and a-
By thinning the Si semiconductor film 4, it becomes possible to improve the productivity of forming the a-Si semiconductor film 4.

In this embodiment, the glass substrate 1
The transparent pixel electrode 9 is formed on the same glass substrate 1 immediately after the gate electrode 2 is formed thereon.
The formation of the pixel electrode 9 by the manufacturing method of the present invention is not limited to such an example, and the pixel electrode 9 is formed by a-
It may be formed on the glass substrate 1 after patterning the Si semiconductor film 4 and the gate insulating film 3.

Further, in this embodiment, hydrogenated amorphous silicon (a-Si: H) is used as the semiconductor film 4, but the semiconductor film 4 produced by the manufacturing method of the present invention.
Is not limited to these types, but other than that, hydrogenated amorphous SiGe, hydrogenated amorphous Si
It is also possible to use Sn, hydrogenated amorphous SiN, hydrogenated amorphous SiC, or hydrogenated amorphous Ge.

Further, in the present embodiment, the glass substrate 1 is simultaneously exposed to 200 to 30 at the time of doping impurities.
The means for activating the impurities by heating to a temperature of about 0 ° C. is not limited to such an example, and the means according to the manufacturing method of the present invention does not heat the glass substrate 1. Alternatively, it is possible to perform only impurity doping, and after this doping, the glass substrate 1 is heated to a temperature of about 200 to 300 ° C. to activate the impurities.

In this embodiment, a non-mass separation type ion implantation means is used as the impurity doping method at the time of doping the impurities, but the impurity doping method according to the manufacturing method of the present invention is as follows. However, the means for directly exposing the glass substrate 1 to the plasma of phosphine (PH ₃ ) gas or diborane (B ₂ H ₆ ) gas may be used, and any means may be used. A desired impurity doping layer having a steep impurity concentration distribution can be formed in the Si semiconductor film 4.

FIG. 3 is a sectional view showing the structure of an example of a microwave discharge device in which an a-Si semiconductor film is doped with impurities by directly exposing it to gas plasma.

In FIG. 3, 30 is a microwave oscillator,
Reference numeral 31 is a vacuum container, 32 is a solenoid coil, 33 is a glass substrate on which the a-Si semiconductor film 4 is formed, and 34 is a gas supply port.

In this case, the output of the microwave oscillator 30 is coupled to the top of the vacuum container 31 via a waveguide, and the solenoid coil 32 is arranged on the outer peripheral surface of the vacuum container 31. A glass substrate 33 is placed on a processing table provided inside the vacuum container 31.

The outline of the operation of this microwave discharge device is as follows.
It is as follows.

Inside the vacuum container 30, phosphine (PH ₃ ) gas or diborane (B ₂ ) is supplied from the gas supply port 34.
When H ₆ ) gas is introduced and at the same time microwave power is supplied from the microwave oscillator 30, the phosphine (PH ₃ ) gas or diborane (B ₂ H ₆ ) gas causes discharge decomposition and the inside of the vacuum container 30 is discharged. Microwave plasma is generated at. In this case, the impurity ions in the plasma are transported toward the glass substrate 33 along the magnetic lines of force formed by the solenoid coil 32, and the substrate 33
The a-Si semiconductor film 4 formed above is doped. In the means using this microwave discharge, since the ion density in the plasma is high, it becomes possible to perform high throughput doping as in the case of using non-mass separation type ion implantation. ..

FIG. 4 is a characteristic diagram showing an example of the impurity concentration profile in the depth direction in the channel region of the a-Si semiconductor film of the TFT manufactured by the manufacturing method of this embodiment.

In FIG. 4, the vertical axis represents the impurity concentration of the a-Si semiconductor film, the horizontal axis represents the distance from the surface thereof, the solid line represents phosphorus (P), and the dotted line represents boron (B).

The impurity concentrations of phosphorus (P) and boron (B) are both high in the vicinity of the surface of the a-Si semiconductor film 4, which is 10 ²¹ per cubic cm or more, but they proceed in the depth direction. In accordance with the above, the number decreases exponentially and decreases to 10 ¹⁸ per cubic cm in the vicinity of the interface with the gate insulating film 3, and a rapid impurity concentration distribution is realized in the meantime. In this case, since the impurity concentration distributions of phosphorus (P) and boron (B) show almost the same characteristics,
Phosphorus (P) and boron (B) doped a-Si
The resistivity of the semiconductor film 4 is as high as 10 ⁹ (Ωcm) or more. Further, since the impurity concentration in the vicinity of the interface with the gate insulating film 3 which becomes a carrier storage layer is sufficiently low, a composite defect of phosphorus (P) and boron (B) is not generated, T with good operating characteristics
FT can be realized.

Next, FIG. 5 is a characteristic diagram showing the relationship between the acceleration voltage and the threshold voltage at the time of doping in the TFT manufactured by the manufacturing method of this embodiment.

In FIG. 5, the vertical axis represents the threshold voltage of the TFT and the horizontal axis represents the acceleration voltage at the time of doping.

When the acceleration voltage is 2.5 kV or less, T
The threshold voltage of FT is constant and has a considerably low value, but when the acceleration voltage is 2.5 kV or more, the threshold voltage of TFT rapidly increases. It is considered that the reason for this increase is that the a-Si semiconductor film 4 and the gate insulating film 3 are damaged by the impact of ions. Therefore, it is desirable that the acceleration energy (acceleration voltage) of ions at the time of doping is at least 2.5 kV or less, preferably 1.0 kV or less. Also,
When the film thickness of the a-Si semiconductor film 4 is thinner than 20 nm, even if the acceleration energy (acceleration voltage) is reduced as much as possible, the a-Si semiconductor film 4 and the gate insulating film 3 due to the ion bombardment can be formed. The a-Si semiconductor film 4 needs to be thicker than 20 nm because they are damaged respectively.

Next, FIG. 6 is a partial sectional view showing an example of a liquid crystal display device in which a thin film semiconductor device (TFT) obtained by the manufacturing method of the present invention is incorporated in an active matrix substrate.

In FIG. 6, 12 is a TFT, 13 is a scanning signal electrode line, 14 is a video signal electrode line, 15 is a liquid crystal layer, 1
Reference numeral 6 is a polarizing plate, 17 is an upper glass substrate, 18 is a color filter, 19 is a counter electrode, and the same components as those shown in FIGS. 1 and 2 are denoted by the same reference numerals.

A large number of scanning signal electrode lines 13 and video signal electrode lines 14 are arranged and formed in a matrix on the lower glass substrate 1, and these signal electrode lines 13 and 1 are formed.
A TFT 12 and a pixel electrode 9 made of an ITO film are arranged and formed in a region near each intersection of 4 to form a TFT active matrix substrate. Here, the gate electrode of the TFT 12 is the corresponding scanning signal electrode line 13, the source electrode is the corresponding video signal electrode line 14, and the drain electrode is the pixel electrode 9
Respectively connected to. In addition, the upper glass substrate 17
A counter electrode 19 and a color filter 18 made of an ITO film are arranged and formed on the lower side of the lower glass substrate 1.
The liquid crystal layer 15 is disposed between the upper glass substrate 17 and the upper glass substrate 17. Further, a pair of polarizing plates 16 are arranged and arranged so as to sandwich the lower glass substrate 1 and the upper glass substrate 17.

Subsequently, FIGS. 7 and 8A and 8B are an enlarged plan view and a sectional configuration view showing a part of the structure of the TFT active matrix substrate, and FIG. A cross-sectional view taken along line XX ′ in FIG.
It is sectional drawing of a Y'line.

In these figures, FIGS.
The same components as those shown in are denoted by the same reference numerals.

The gate electrode 2 of the TFT 12 is composed of a region protruding from the scanning signal electrode line 13,
The scanning signal electrode line 13 is formed on the glass substrate 1 at the same time when the gate electrode 2 is formed. Further, the source electrode 5 is composed of a region protruding from the video signal electrode line 14,
The video signal electrode line 14 is also the source electrode 5 and the drain electrode 6.
Since it is formed on the glass substrate 1 at the same time as forming, the a-Si semiconductor film 4 is present below the video signal electrode line 14 as shown in FIG. 8B. Further, the pixel electrode 9 has a substantially rectangular shape with a part cut off, and the TFT 12 is formed and arranged in the cut part.

By the way, since the liquid crystal display device having the TFT active matrix substrate having the above-described structure is already widely used in various fields and its operation is known, the description of the operation relating to the liquid crystal display device will be omitted.

In this case, in the thin film semiconductor device (TFT) manufactured by the manufacturing method of the present invention, since the semiconductor layer 4 to be the active layer can be made thinner than the conventional one as described above, It is possible to avoid a decrease in off resistance due to photocurrent generated in the layer 4, and if a thin film semiconductor device (TFT) having such characteristics is used to form a TFT active matrix substrate for a liquid crystal display device, the contrast ratio is reduced. It is possible to display a high quality image with high quality. Further, in the thin film semiconductor device (TFT), since the a-Si semiconductor film 4 is also present under the video signal electrode line 14, it is formed between the video signal electrode line 14 and the source electrode 5. Since there is no difference and no residue remains on the semiconductor layer 4 on which the video signal electrode line 14 and the source electrode 5 are formed as described above, the video signal electrode line 14
The probability of disconnection failure is extremely low, the manufacturing yield of the liquid crystal display device can be improved, and the manufacturing cost of the active matrix substrate can be reduced.

[0068]

As described above, according to the manufacturing method of the present invention, the photo-etching step is performed in the a- step between the plasma CVD step and the step of forming the main electrodes (source and drain electrodes) 5 and 6. Since the photo-etching of the Si semiconductor film 4 and the gate insulating film 3 is performed only once, a-S
The cleanliness of the surfaces of the i-semiconductor film 4 and the gate insulating film 3 can be sufficiently maintained, and thus the source electrode 5 formed on the surfaces of the a-Si semiconductor film 4 and the gate insulating film 3.
Also, it is possible to prevent a gap from occurring in the drain electrode 6, and it is possible to prevent a wiring from being broken due to the gap.

Further, according to the manufacturing method of the present invention, the etching step of the n-type a-Si semiconductor layer, which has been conventionally required, can be omitted, so that the a-Si semiconductor film 4 to be the active layer can be thinned. This makes it possible to suppress the decrease in the off-resistance of the TFT due to the photocurrent generated in the a-Si semiconductor film 4, and improve the productivity of forming the a-Si semiconductor film 4. The effect is that it will be possible.

Further, according to the thin-film semiconductor device of the present invention, a TFT having a high off resistance and good characteristics with a low probability of occurrence of wire breakage, and the occurrence of the same wire breakage coupled to the TFT. Since it is possible to obtain a circuit portion having good characteristics with a low probability at the same time, when the thin film semiconductor device is used as an active matrix substrate of a liquid crystal display device, the liquid crystal display device is configured at a low manufacturing cost due to a high manufacturing yield. In addition, there is an effect that a liquid crystal display device having high contrast characteristics can be obtained.

[Brief description of drawings]

FIG. 1 shows one thin film semiconductor device (TF) according to the present invention.
It is a structure sectional view showing a part of example of the manufacturing process of T).

FIG. 2 shows one thin film semiconductor device (TF) according to the present invention.
It is a sectional view showing the composition of the remainder of the example of the manufacturing process of T).

FIG. 3 is a configuration cross-sectional view showing an example of a microwave discharge device for doping impurities into a semiconductor film.

4 is a characteristic diagram showing an example of an impurity concentration profile in a depth direction in a channel region of a semiconductor film of a TFT manufactured according to the example of FIG.

5 is a characteristic diagram showing a relationship between an acceleration voltage and a threshold voltage at the time of doping in the TFT manufactured according to the example of FIG.

FIG. 6 is a partial cross-sectional view showing an example of a liquid crystal display device in which a thin film semiconductor device (TFT) manufactured by the manufacturing method of the present invention is incorporated in an active matrix substrate.

FIG. 7 is an enlarged plan view showing a partial configuration of a TFT active matrix substrate.

8 is a cross-sectional configuration diagram of a part of the TFT active matrix substrate of FIG.

FIG. 9 is a cross-sectional view showing a part of an example of a manufacturing process of a conventional thin film semiconductor device (TFT).

FIG. 10 is a structural cross-sectional view showing the rest of the example of the manufacturing process of one conventional thin film semiconductor device (TFT).

FIG. 11 is a configuration cross-sectional view showing another example of the manufacturing process of one conventional thin film semiconductor device (TFT).

[Explanation of symbols]

 1 Transparent Insulating Substrate (Glass Substrate) 2 Gate Electrode 3 Gate Insulating Film 4 a-Si Semiconductor Film 5 Source Electrode 6 Drain Electrode 7 and 8 Large Diameter Ion Beam 9 Transparent Pixel Electrode 10 Photoresist Pattern 11 Protective Film 12 TFT 13 Scan Signal electrode line 14 Video signal electrode line 15 Liquid crystal layer 16 Polarizing plate 17 Upper glass substrate 18 Color filter 19 Counter electrode 30 Microwave oscillator 31 Vacuum container 32 Solenoid coil 33 Substrate 34 Gas inlet

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location 9056-4M H01L 29/78 311 H

Claims (14)

[Claims] 1. A step of forming a control electrode on a transparent insulating substrate, a step of sequentially forming a first insulating film and a semiconductor film on the control electrode, and a step of doping the semiconductor film with an n-type impurity. Patterning the first insulating film and the semiconductor film, forming a pair of main electrodes on the semiconductor film, and doping the semiconductor film with p-type impurities using the pair of main electrodes as a mask. And a step of forming a second insulating film on the semiconductor film and the pair of main electrodes, and a step of patterning the semiconductor film using the pair of main electrodes and the second insulating film as a mask. A method for manufacturing a thin film semiconductor device, comprising: 2. The step of forming a control electrode on the transparent insulating substrate, followed by the step of forming a transparent electrode of a predetermined pattern on the transparent insulating substrate. Method for manufacturing thin film semiconductor device. 3. A step of forming a transparent electrode having a predetermined pattern is performed subsequent to the step of patterning the semiconductor film using the pair of main electrodes and the second insulating film as a mask. 1. The method for manufacturing a thin film semiconductor device according to 1. 4. The non-mass separated ion beam containing n-type or p-type impurities is used in the step of doping the semiconductor film with n-type or p-type impurities. 4. The method for manufacturing a thin film semiconductor device according to item 3. 5. The method of manufacturing a thin film semiconductor device according to claim 4, wherein the acceleration energy of ions contained in the non-mass separated ion beam is set to 2500 eV or less. 6. The step of doping the semiconductor film with an n-type or p-type impurity, the transparent insulating substrate having the semiconductor film is exposed to a plasma gas containing an n-type or p-type impurity. 4. The method for manufacturing a thin film semiconductor device according to any one of 1 to 3. 7. The method of manufacturing a thin film semiconductor device according to claim 1, wherein a photoresist is selected as the second insulating film. 8. As the semiconductor film, amorphous Si, amorphous SiGe, amorphous Ge, amorphous SiN, amorphous Si
4. The method for manufacturing a thin film semiconductor device according to claim 1, wherein one of C and amorphous SiSn is selected. 9. The method according to claim 1, wherein after the semiconductor film is doped with p-type impurities, the doped portion is heat-treated at 300 ° C. or lower to activate the p-type impurities. 4. The method for manufacturing a thin film semiconductor device according to item 3. 10. A scanning signal electrode line and a video signal electrode line, which are insulated from each other by an insulating film and formed in a matrix on a transparent insulating substrate, and intersections of the scanning signal electrode line and the video signal electrode line. A thin film semiconductor element and a pixel electrode, the thin film semiconductor element is a control electrode conductively connected to the scanning signal electrode line and one main electrode conductively connected to the video signal electrode line. And the other main electrode that is conductively connected to the pixel electrode, and a semiconductor film disposed below the both main electrodes, and the semiconductor film is formed on the lower layer in the same pattern as the video signal electrode line. A thin film semiconductor device characterized by being extended. 11. The semiconductor film of the thin film semiconductor device comprises:
11. The thin film semiconductor device according to claim 10, wherein the channel portion is doped with both n-type impurities and p-type impurities, and the other portions are doped with only n-type impurities. 12. The thin film semiconductor device according to claim 10, wherein the pixel electrode is arranged in a lower layer of the insulating film or an upper layer of a video signal electrode line. 13. The thin film semiconductor device according to claim 10, wherein the semiconductor film is selected so that the film thickness thereof is in the range of 20 to 100 nm. 14. A gate electrode formed on a transparent insulating substrate, and a gate insulating film formed on the gate electrode,
In a thin film transistor including a semiconductor film formed on the gate insulating film and source and drain electrodes formed on the semiconductor film, the semiconductor film is formed by doping n-type impurities under the source and drain electrodes. , N in the portion where the source and drain electrodes are not in contact
A thin film transistor characterized by being doped with both p-type and p-type impurities.