JPH04196574A - リードフレーム - Google Patents

リードフレーム

Info

Publication number
JPH04196574A
JPH04196574A JP2331348A JP33134890A JPH04196574A JP H04196574 A JPH04196574 A JP H04196574A JP 2331348 A JP2331348 A JP 2331348A JP 33134890 A JP33134890 A JP 33134890A JP H04196574 A JPH04196574 A JP H04196574A
Authority
JP
Japan
Prior art keywords
chip
brazing material
lead
die pad
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2331348A
Other languages
English (en)
Inventor
Ryuichi Sakano
坂野 竜一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2331348A priority Critical patent/JPH04196574A/ja
Publication of JPH04196574A publication Critical patent/JPH04196574A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009Pre-treatment of the layer connector or the bonding area
    • H01L2224/83051Forming additional members, e.g. dam structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、樹脂封止部の半導体装置に用いられるリー
ドフレームの構造に関するものである。
〔従来の技術〕
第6図は従来の半導体装置に用いられるリードフレーム
を示す平面図、第7図は第6図の■−■線の断面図であ
る。図において%lはリードフレーム、2はリードフレ
ーム1上のインナーリード。
3はリードフレーム1上のダイパラ)”、4dグイパツ
ド3を支える宙吊りリード、5は上記ダイパッド3上の
チップ、6はこのチップ5上のボンディングパッド、7
は上記チップ5とインナーリード2もしくは宙吊りリー
ド4を接続するワイヤー。
8は上記ダイパッド3上にチップ5を固定するためのロ
ウ材である。
次にその組立!1様について説明する。半導体装置を組
み立てる場合、ダイパッド3にロウ材8をのせ、ダイパ
ッド3を高温にしてロウ材8を溶融させ、その状態でデ
ツプ5をロウ材8の上にの飢チップ5とグイバッド3を
密着させる。この場合、チップ5がロウ材8を上から押
し付ける形になるので、ロウ材8がチップからはみ出し
ダイパッド3上を流れ、更に高温になった宙吊りリード
4上をロウ材8がはい上がる。次に、チップ5上のボン
ディングパッド6とインナーリード2とを、ワイヤー7
によりワイヤーボンドする。ここで、チツブ5上のボン
ディングパッド6と宙吊りリード4とを、ワイヤー7に
よりワイヤーボンドしようとすると、宙吊りリード4上
をはい上がったロウ材8のために、正常なワイヤーボン
ドができなくなる。
〔発明が解決しようとする課題〕
従来のリードフレームは以上のように構成されているが
、ワイヤーボンドする際の歩留まりが悪く、またロウ材
上にワイヤーを打てた場合でも密着性が悪く、温度サイ
クルや熱衝撃等の信頼性試験を行った場合、ワイヤーが
外れる等の問題点がめった。
この発明は上記のような問題点を解消するためになされ
たもので、ワイヤーボンドの歩留まシが良く%信頼性の
高いリードフレームを得ることを目的とする。
〔課題を解決するための手段〕
この発明に係るリードフレームは、宙吊りリードとにロ
ウ材溜りを備えたものでめる0〔作用〕 この発明におけるリードフレームは、ダイパッドから溢
れたロウ材をロウ材溜りに溜めることで、宙吊りリード
上へのロウ材のはい上がりを防ぐ。
〔実施例〕
以′F、この発明の実施例を図について説明する。
第1図はこの発明の−実り例を示すリードフレームの構
造を示す平面図、第2図は第1図のl−1線の断面図で
あり、上記従来例と異なるところは。
百出シリード4上にロウ材溜り9を設けた点である0 このようなものにおいて、半導体装置を組み立てる場合
、ダイパッド3にロウ材8をのせ、ダイパッド3を高温
にしてロウ材8を溶融させ、その状態でチップ5をロウ
材8の上にのせ、チップ5とダイパッド3を密着させる
。この場合、チップ5がロウ材8を上から押し付ける形
になるので、ロウ材8がテップ5からはみ出してダイパ
ッド3上を流れ%更に高温になった宙吊りリード4上の
ロウ材溜り9にロウ材8が流れ込み、このロウ材溜り9
に溜ったロウ材8はそこでせき止められる。
次に、チップ5):のポンプイングツくラド6と、イン
ナーリード2もしくは宙吊りリード4とをワイヤー7に
よりワイヤーボンドする。
なお、上記実り例では宙吊りリード4をフレームの中心
に2個所あるものを示したが、第3図の如く1個所にあ
るもの、もしくは第4図のように3個所以上で中心以外
の位置でも良い。また、上記実施例では、ダイパッド3
がリードフレーム1より低い位置にあるものを示したが
、第5図の如くダイパッド3とリードフレーム1が同じ
高さにあるものでも、同様の効果を奏する。
〔発明の効果〕
以上のように、この発明によれば、宙吊りリード上にロ
ウ材溜りを設けたので、宙吊シリードヘのロウ材のはい
土がシを防ぐことができ、これによってワイヤーボンド
の歩留まりが曳く、信頼性の高いリードフレームが得ら
れる効果があるO
【図面の簡単な説明】
第1図はこの発明の−実り例によるリードフレームを示
す平面図、第2図は第1図の1−1線の断面図、第3図
、@4図はこの発明の他の実施例を示す平面図、第5図
はこの発明の他の実施例を示す断面図、第6図は従来の
リードフレームを示す平面図、第7図は第6図の■−4
線の断面図である。 図中% 1はリードフレーム、2はインナーリード、3
はダイパッド、4は宙吊りリード、5はチップ、6はボ
ンディングパッド、7はワイヤー。 8はロウ材、9はロウ材溜りである。 なお、図中%同一符号は同一、又は相当部分を示す。

Claims (1)

    【特許請求の範囲】
  1. 樹脂封止型半導体装置のリードフレームであつて、ダイ
    パッド上にロウ材を介して固定されるチップと、このチ
    ップ上のボンディングパッドに接続されたワイヤーと導
    通をとるためのインナーリードと、上記ダイパッドを支
    えるための宙吊りリードとを有するものにおいて、上記
    宙吊りリード上に、上記チップとダイパッドを密着させ
    るためのロウ材が溢れた時に流れ込み溜めるためのロウ
    材溜りを設けたことを特徴とするリードフレーム。
JP2331348A 1990-11-28 1990-11-28 リードフレーム Pending JPH04196574A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2331348A JPH04196574A (ja) 1990-11-28 1990-11-28 リードフレーム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2331348A JPH04196574A (ja) 1990-11-28 1990-11-28 リードフレーム

Publications (1)

Publication Number Publication Date
JPH04196574A true JPH04196574A (ja) 1992-07-16

Family

ID=18242681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2331348A Pending JPH04196574A (ja) 1990-11-28 1990-11-28 リードフレーム

Country Status (1)

Country Link
JP (1) JPH04196574A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6455348B1 (en) 1998-03-12 2002-09-24 Matsushita Electric Industrial Co., Ltd. Lead frame, resin-molded semiconductor device, and method for manufacturing the same
NL2020928A (en) * 2017-05-19 2018-11-23 Shindengen Electric Mfg Electronic module, method of manufacturing connector, and method of manufacturing electronic module

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5724555A (en) * 1980-07-22 1982-02-09 Nec Kyushu Ltd Semiconductor device
JPS594647B2 (ja) * 1975-01-15 1984-01-31 ロ−ベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング 流入媒体の流量測定器
JPS6392048A (ja) * 1986-10-06 1988-04-22 Mitsubishi Electric Corp 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594647B2 (ja) * 1975-01-15 1984-01-31 ロ−ベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング 流入媒体の流量測定器
JPS5724555A (en) * 1980-07-22 1982-02-09 Nec Kyushu Ltd Semiconductor device
JPS6392048A (ja) * 1986-10-06 1988-04-22 Mitsubishi Electric Corp 半導体装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6455348B1 (en) 1998-03-12 2002-09-24 Matsushita Electric Industrial Co., Ltd. Lead frame, resin-molded semiconductor device, and method for manufacturing the same
NL2020928A (en) * 2017-05-19 2018-11-23 Shindengen Electric Mfg Electronic module, method of manufacturing connector, and method of manufacturing electronic module
US11437340B2 (en) 2017-05-19 2022-09-06 Shindengen Electric Manufacturing Co., Ltd. Electronic module, method of manufacturing connector, and method of manufacturing electronic module

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