JPH04196175A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To increase, capacitance to enhance writing efficiency even when an occupied area is kept constant by introducing a stack structure in which a first conductive layer forming a floating gate of a memory cell transistor is electrically connected. CONSTITUTION:A field oxide film (FOX) 2, a first insulating film 3, a first conductive layer 4 forming a floating gate, a second insulating film 5 and a second conductive layer as a control gate are formed on a semiconductor substrate 1 in a memory cell transistor. When a capacitance of a capacitor consisting of substrate 1 - insulating film 3 - conductive layer 4 is defined as C1, a capacitance of a capacitor consisting of conductive layer 4 - insulating film 5 conductive layer 6 as C2, the writing efficiency can be enhanced if a value of C2/(C1+C2) is large. Therefore, when the first conductive layer 4 has a stacked multilayer structure, the surface area of C2 becomes larger, making large the capacitance C2. Therefore, the writing capacity can be enlarged without changing the occupied area.

Description

[Detailed description of the invention] 〔overview〕 Regarding a nonvolatile semiconductor memory device and its manufacturing method.

Increasing the capacitance of the second insulating film without increasing the area occupied by the memory cell transistor.

Aimed at increasing writing efficiency.

A nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate, wherein the first conductive layers constituting five floating gates are electrically connected. It is constructed to have a stacked multilayer structure.

The first manufacturing method is a method for manufacturing a nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer constituting floating gates 1 to 1 and a second conductive layer constituting a control gate. 1 step of forming an insulating film, and (
b) forming a first conductive layer on the first insulating film;
(C) forming a sacrificial oxide film on the first conductive layer;
(d) forming an opening in the sacrificial oxide film and the first conductive layer; (e) further forming a first conductive layer on one surface so as to cover the opening; (f) the step of forming an opening in the sacrificial oxide film and the first conductive layer; (g) removing the sacrificial oxide film; and (h) covering the surface of the first conductive layer with a second insulating film. (i) covering the surface of the second insulating film with a second conductive layer.

The second manufacturing method is a method for manufacturing a nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer forming a floating gate and a second conductive layer forming a control gate, the method comprising: (a) a first insulating layer; a step of forming a film, (b
) forming a first conductive layer on the first insulating film;
C) forming a sacrificial oxide film on the first conductive layer;
(d) forming an opening in the sacrificial oxide film; (e
) further forming a first conductive layer on one surface so as to cover the opening; (f) patterning the first conductive layer, the sacrificial oxide film, and the first conductive layer.

(g) removing the sacrificial oxide film; and (h) covering the surface of the first conductive layer with a second insulating film.

(i) covering the surface of the second insulating film with a second conductive layer.

[Industrial application field]

The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly to a nonvolatile semiconductor memory device and a method of manufacturing the same.

As a non-volatile semiconductor memory device, PROIv'l,
There are EPROM, EEPROM, etc.

[Conventional technology]

FIG. 10 is a diagram showing a conventional example. The same figure (a) is a plan view, the same figure (b) is an A-A' sectional view, the same figure (c) is a B-B
'This is a cross-sectional view.

In FIG. 10, 31 is a silicon substrate, 32 is a FOX
(field oxide film), 33 is a first insulating film (gate insulating film) 34, a first conductive layer constituting a floating gate, 35 a second insulating film, and 36 a second conductive layer constituting a control gate.

In this conventional example, a FAMO3 type non-volatile type soil volatile semiconductor memory device is written.A voltage is applied between a silicon substrate 31 and a second conductive layer 36 constituting a control gate. death.

This is done by injecting hot electrons generated on the surface of the silicon substrate 31 into the first conductive layer 34 forming the floating gate through the first insulating film 33 forming the D1-insulating film.

[Problem to be solved by the invention]

The data write efficiency of the FAMO3 type non-volatile volatile semiconductor memory device is 2. Among the voltages applied between the silicon substrate 31 and the second conductive layer 36 forming the control gate, the voltage applied between the silicon substrate 31 and the second conductive layer 36 forming the control gate is The larger the voltage applied between the first conductive layer 34 and the first conductive layer 34, the higher the voltage becomes. That is, silicon substrate 31 - first insulating film 33 - first conductive layer 3
The capacitance of the capacitor consisting of C3 and the first conductive layer 34-
Let us assume that the capacitance of the capacitor composed of the second insulating film 35 and the second conductive layer 36 is 02.

C2/ (C, ten C2) The larger the value, the higher the write efficiency.

As non-volatile semiconductor memory devices become more highly integrated and elements become smaller, free space within memory cells disappears, and the first conductive layer 34 forming the floating gate and the second conductive layer 36 forming the control gate become smaller. area has become smaller. the result.

The capacitance C2 of the capacitor composed of the first conductive layer 34 - the second insulating film 35 - the second conductive layer 36 becomes smaller.

Then, the value of the above equation becomes smaller, and the writing efficiency decreases.

As a means to prevent the capacitance -02 of the capacitor composed of the first conductive layer 34 - the second insulating film 35 - the second conductive layer 36 from becoming small, it is possible to reduce the thickness of the second insulating film 35. However, since the base is the first conductive layer 34, it is difficult from the viewpoint of film quality.

In other words, as the conventional FAMO3 type non-volatile semiconductor memory device becomes more integrated, the write efficiency decreases.

There was a problem.

The present invention solves this problem and increases the capacity of the second insulating film without increasing the area occupied by the memory cell transistor, thereby increasing write efficiency. It is an object of the present invention to provide a method for manufacturing a semiconductor device, particularly a nonvolatile semiconductor memory device and a method for manufacturing the same.

[Means to solve the problem]

In order to achieve the above object, two semiconductor devices according to the present invention are nonvolatile semiconductor memory devices in which a memory cell transistor has a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate. The first conductive layer constituting the floating gate is configured to have a stacked multilayer structure electrically connected.

The first manufacturing method is a method for manufacturing a nonvolatile semiconductor memory device in which two memory cell transistors have a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate, comprising: (a) a first insulating layer; a step of forming a film, (b
) forming a first conductive layer on the first insulating film;
C) forming a sacrificial oxide film on the first conductive layer;
(d) forming an opening in the sacrificial oxide film and the first conductive layer; (e) further forming a first conductive layer on the surface so as to cover the opening; (f) the step of forming an opening in the sacrificial oxide film and the first conductive layer; (g) removing the sacrificial oxide film; and (h) covering the surface of the first conductive layer with a second insulating film. and (b) covering the surface of the second insulating film with a second conductive layer.

The second manufacturing method is a method for manufacturing a nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer that constitutes a floating gate and a second conductive layer that constitutes a control gate, the method comprising: (a) a first insulating layer; (b) forming a film;
forming a first conductive layer on the first insulating film;
) forming a sacrificial oxide film on the first conductive layer;
d) forming an opening in the sacrificial oxide film; and (e)
further forming a first conductive layer on one surface so as to cover the opening; (f) patterning the first conductive layer, the sacrificial oxide film, and the first conductive layer; 1(g)
a step of removing the sacrificial oxide film; and (h) a step of covering the surface of the first conductive layer with a second insulating film.

(i) covering the surface of the second insulating film with a second conductive layer.

[For production]

The principle of the present invention will be explained with reference to FIG.

In the same figure, ■ indicates that the semiconductor substrate 12 is a FOX (field oxide film) 23 is a first insulating film constituting a gate insulating film;
4 is a first conductive layer constituting a floating gate, 5 is a second insulating film, and 6 is a second conductive layer constituting a control gate.

In the nonvolatile semiconductor memory device according to the present invention, the first conductive layer 4 constituting the floating gate has a stacked multilayer structure. Therefore, the surface area of the first conductor N4 increases.

The capacitance of a capacitor consisting of semiconductor substrate 1 - first insulating film 3 - first conductive layer 4 is C5, first conductive layer 4 - second insulating film 5 -
If the capacitance of the capacitor made of the second conductive layer 6 is 02, the present invention can increase C2. the result.

C2/ (c, +C2) As the value of becomes larger, the writing efficiency becomes higher.

〔Example] (Example of semiconductor device) FIG. 1 is a diagram showing an embodiment of the present invention.

In the figure, ■ is a semiconductor substrate, 2 is a FOX (field oxide film), 3 is a first insulating film constituting a gate insulating film,
4 is a first conductive layer constituting a floating gate, 5 is a second insulating film, and 6 is a second conductive layer constituting a control gate.

In the nonvolatile semiconductor memory device according to the present invention, the first conductive layer 4 constituting the floating gate has a stacked multilayer structure. In this embodiment, a case of two layers is shown, but a multilayer structure of three or more layers is also possible. As a result, the surface area of the first conductive layer 4 increases.

The capacitance of a capacitor consisting of semiconductor substrate 1 - first insulating film 3 - first conductive layer 4 is set to 01. First conductive layer 4 - Second insulating film 5 -
If the capacitance of the capacitor made of the second conductive layer 6 is 02, C2 can be increased by 2 in this embodiment. the result.

C2/ (CI + C2) As the value of becomes larger, the writing efficiency becomes higher.

(Embodiment of the manufacturing method (Part 1)) FIGS. 2 to 5 are diagrams showing each step of the first embodiment of the method of manufacturing a semiconductor device according to the present invention.

The steps will be explained below in order.

Step 1. FIG. 2 A FOX (field oxide film) 12 is formed on the surface of a silicon substrate 11 to isolate elements.

A silicon oxide film 13 is formed on the surface to a thickness of 200 mm. This becomes the first insulating film (gate oxide film).

Next, a silicon nitride film 14 is formed to a thickness of 3,000 wafers.

This silicon nitride film 14 acts as a stone bar in later steps. Therefore, if the silicon nitride film 14 is present on the D1-oxide film 13.

This is not preferable because hot electrons are trapped. Therefore, the silicon nitride film on the gate oxide film 13'' is removed by photolithography.

Also, immediately after forming the FOX 12, the silicon nitride film 14 is
After forming and patterning, the D1-oxide film 13 may be formed.

Thereafter, the polysilicon layer 15 is coated with a thickness of 1000 nm by the CVD method.
Grow into the thickness of a person.

<Step 2. FIG. 3 A CvDSi*2 film I6 is grown on the surface to a thickness of 800 nm.

The CVD5 i O□ film 6 and the polysilicon layer 15 are etched to form an opening 17 .

<Step 3. FIG. 4 After growing a polysilicon layer 17 on the surface to a thickness of 1000 nm, it is patterned by anisotropic etching.

<Step 4. Fig. 4, Fig. 5〉 The wafer is immersed in HF solution and CVD5iO□ film 1
6 is removed by etching.

A CVD5iO□ film 18 is grown to a thickness of 250 nm.

A polysilicon layer 19 is grown to a thickness of 1000 nm by CVD.

Thereafter, by patterning, a FAMO3 type non-volatile soil volatile semiconductor memory device shown in FIG. 1 is obtained.

(Embodiment (Part 2) of the manufacturing method) FIGS. 6 to 9 are diagrams showing each step of a second embodiment of the method of manufacturing a semiconductor device according to the present invention.

The steps will be explained below in order.

<Step 1. FIG. 6 A FOX (field oxide film) 22 is formed on the surface of a silicon substrate 21 to perform element isolation.

A silicon oxide film 23 is formed on the surface to a thickness of 200 mm. This becomes the first insulating film (gate oxide film).

A polysilicon layer 24 is grown to a thickness of 1000 nm using the CVD method.

A CVD5iOz film 25 is grown on the surface to a thickness of 800 nm.

Step 2. FIG. 7 Openings 26 are formed by etching the CVD5iO□ film 25. FIG.

<Step 3. FIG. 8 A polysilicon layer 27 is grown on the surface to a thickness of 1000 nm.

Step 4. Figure 9〉 Patterning is done by anisotropic etching.

<Step 5> Immerse the wafer in an HF solution to form the CVDSi○2 film 2.
5 is removed by etching.

A CV D Si O2 film is grown to a thickness of 250 nm.

A polysilicon layer is grown to a thickness of 1000 nm by CVD.

Thereafter, by patterning, a FAMO3 type non-volatile soil volatile semiconductor memory device shown in FIG. 1 is obtained.

(Effects of the Invention) According to the present invention, the capacitance of the second insulating film can be increased without increasing the area occupied by the memory cell transistor. It becomes possible to increase the writing efficiency.Therefore, it greatly contributes to miniaturization and speeding up of nonvolatile semiconductor memory devices.

Further, since the area of the second insulating film can be made sufficiently large, sufficient capacity can be ensured even if the insulating film is made thin. Therefore, it greatly contributes to improving the reliability of nonvolatile semiconductor memory devices.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention. FIG. 2 to FIG. 5 are diagrams showing each step of the first manufacturing method of a semiconductor device according to the present invention. FIG. 6 to FIG. 9 are diagrams showing each step of the second manufacturing method of a semiconductor device according to the present invention. FIG. 10 is a diagram showing a conventional example. In FIG. 1, 1: semiconductor substrate 2: FOX (field oxide film) 3: first insulating film 4; first conductive layer 5: second insulating film 6: second conductive layer

Claims (3)

[Claims] (1) A nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate, wherein the first conductive layer constituting the floating gate is electrically connected to the first conductive layer constituting the control gate. A semiconductor device characterized by having a connected stacked multilayer structure. (2) A method for manufacturing a nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate, the method comprising: (a) forming a first insulating film; (b) forming a first conductive layer on the first insulating film; (c) forming a sacrificial oxide film on the first conductive layer; (d) the sacrificial oxide film; forming an opening in the first conductive layer; (e) further forming a first conductive layer on the surface so as to cover the opening; and (f) the laminated first conductive layer. and patterning the sacrificial oxide film; (g) removing the sacrificial oxide film; (h) covering the surface of the first conductive layer with a second insulating film; (i) the second insulating film; 1. A method of manufacturing a semiconductor device, comprising the step of: coating a surface of an insulating film with a second conductive layer. (3) A method for manufacturing a nonvolatile semiconductor memory device in which a memory cell transistor has a first conductive layer constituting a floating gate and a second conductive layer constituting a control gate, the method comprising: (a) forming a first insulating film; (b) forming a first conductive layer on the first insulating film; (c) forming a sacrificial oxide film on the first conductive layer; and (d) forming a sacrificial oxide film on the sacrificial oxide film. (e) further forming a first conductive layer on the surface so as to cover the opening; (f) the first conductive layer, the sacrificial oxide film and the first conductive layer; (g) removing the sacrificial oxide film; (h) covering the surface of the first conductive layer with a second insulating film; (i) the surface of the second insulating film. A method of manufacturing a semiconductor device, comprising the step of: covering the semiconductor device with a second conductive layer.