JPH04188824A - Ion-implantation method - Google Patents

Ion-implantation method

Info

Publication number
JPH04188824A
JPH04188824A JP31892190A JP31892190A JPH04188824A JP H04188824 A JPH04188824 A JP H04188824A JP 31892190 A JP31892190 A JP 31892190A JP 31892190 A JP31892190 A JP 31892190A JP H04188824 A JPH04188824 A JP H04188824A
Authority
JP
Japan
Prior art keywords
resist
capacitor structure
polycrystalline silicon
silicon film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31892190A
Other languages
Japanese (ja)
Inventor
Shintaro Matsuda
信太郎 松田
Hirohisa Yamamoto
裕久 山本
Shigeru Shiratake
茂 白竹
Satoshi Yamada
聡 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP31892190A priority Critical patent/JPH04188824A/en
Publication of JPH04188824A publication Critical patent/JPH04188824A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To restrain the emission of the secondary electrons from the capacitor structure part for restraining the accumulation of positive charge and further avoiding the electrostatic breakdown in the capacitor part by a method wherein the whole surface of the structure part, after being covered with an insulator, is implanted with ions. CONSTITUTION:The whole surface of a capacitor structure formed of a polycrystalline silicon film 3, an insulating film 4 and another polycrystal silicon film 5 is covered with a photoresist 6 as an insulator to be ion-implanted later. At this time, the film 5 is also irradiated with ion beams 7 through the intermediary of the first resist 6 but the emission of the secondary electrons from the film 5 is restrained by the resist 6 comprising insulator so as to restrain the accumulation of positive charge. Furthermore, the surface of the resist 6 is carbonized by the irradiation with the ion beams 7 to make the resist 6 conductive. Resultantly, the positive charge is relieved from the resist 6 further restraining the positive charging. Through these procedures, the electrostatic breakdown in the capacitor structure part can be avoided.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体基板上にキャパシタ構造部を有する半
導体装置にイオン注入を行うイオン注入方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an ion implantation method for implanting ions into a semiconductor device having a capacitor structure on a semiconductor substrate.

〔従来の技術〕[Conventional technology]

第2図は半導体基板上にキャパシタ構造部を有する半導
体装置にイオン注入を行う場合の従来のイオン注入方法
を説明するための図である。
FIG. 2 is a diagram for explaining a conventional ion implantation method when implanting ions into a semiconductor device having a capacitor structure on a semiconductor substrate.

半導体基板1上には酸化膜2が、酸化膜2上には第1の
多結晶シリコン膜3が、第1の多結晶シリコン膜3上に
はキャパシタ用の絶縁膜(酸化膜等)4が、絶縁膜4上
には第2の多結晶シリコン膜5が各々形成されている。
An oxide film 2 is provided on the semiconductor substrate 1, a first polycrystalline silicon film 3 is provided on the oxide film 2, and an insulating film (oxide film, etc.) 4 for a capacitor is provided on the first polycrystalline silicon film 3. , a second polycrystalline silicon film 5 is formed on the insulating film 4, respectively.

第1の多結晶シリコン膜3.絶縁膜4及び第2の多結晶
シリコン膜5によりキャパシタ構造部が構成されている
First polycrystalline silicon film 3. The insulating film 4 and the second polycrystalline silicon film 5 constitute a capacitor structure.

このようなキャパシタ構造部を有する半導体装置に例え
ばソース・ドレイン領域などを形成するためイオン(A
s、B)を注入する場合、イオンの注入により導電型が
不都合に変化したり、不純物濃度が不都合に変化したり
して影響を受ける領域は、レジストで覆い、その他の領
域、例えば上記に示したキャパシタ構造部はレジストで
覆っていなかった。上記に示したキャパシタ構造部がイ
オン注入により上記の影響を受けないのは以下の理由に
よる。すなわち、多結晶シリコン膜5の不純物濃度は一
般にイオン注入による不純物濃度より高く、また、イオ
ン注入により注入されるイオンの導電型が多結晶シリコ
ン膜5のそれと同じである場合が多いからである。
Ions (A) are used to form, for example, source/drain regions in semiconductor devices having such capacitor structures.
When implanting s, B), the affected regions where the conductivity type changes unfavorably or the impurity concentration changes unfavorably due to the ion implantation are covered with a resist, and other regions, such as those shown above, are covered with resist. The exposed capacitor structure was not covered with resist. The reason why the capacitor structure shown above is not affected by the ion implantation is as follows. That is, the impurity concentration of the polycrystalline silicon film 5 is generally higher than the impurity concentration obtained by ion implantation, and the conductivity type of the ions implanted by ion implantation is often the same as that of the polycrystalline silicon film 5.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のイオン注入は以上のようにキャパシタ構造部をレ
ジストで覆うことなく行われているため多結晶シリコン
膜5にダイレクトにイオンビーム7が照射される。しか
し、第2の多結晶シリコン膜5の性質は変化しないもの
の、第2の多結晶シリコン膜5上に直接イオンビーム7
の正電荷が蓄積されるとともに、イオンビーム7の照射
により第2の多結晶シリコン膜5から発生する二次電子
によりさらに第2の多結晶シリコン膜5への正電荷の蓄
積が助長され、第1と第2の多結晶シリコン膜3.5を
絶縁している絶縁膜4の静電破壊を招くという問題点が
あった。
Since the conventional ion implantation is performed without covering the capacitor structure with resist as described above, the polycrystalline silicon film 5 is directly irradiated with the ion beam 7. However, although the properties of the second polycrystalline silicon film 5 do not change, the ion beam 7 is applied directly onto the second polycrystalline silicon film 5.
In addition to accumulating positive charges, secondary electrons generated from the second polycrystalline silicon film 5 by irradiation with the ion beam 7 further promote the accumulation of positive charges in the second polycrystalline silicon film 5. There is a problem in that the insulating film 4 that insulates the first and second polycrystalline silicon films 3.5 is damaged by electrostatic discharge.

この発明は上記のような問題点を解決するためになされ
たもので、キャパシタ構造部が静電破壊されることがな
いイオン注入方法を得ることを目的とする。
The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide an ion implantation method that does not cause electrostatic damage to the capacitor structure.

〔課題を解決するための手段〕[Means to solve the problem]

この発明は、半導体基板上にキャパシタ構造部を有する
半導体装置にイオン注入を行うイオン、注入方法に適用
される。
The present invention is applied to ions and an implantation method for implanting ions into a semiconductor device having a capacitor structure on a semiconductor substrate.

この発明に係るイオン注入方法は、キャパシタ構造部の
表面全面を絶縁物で覆った後、イオン注入することを特
徴とする。
The ion implantation method according to the present invention is characterized in that ions are implanted after the entire surface of the capacitor structure is covered with an insulator.

〔作用〕[Effect]

この発明においてはキャパシタ構造部の表面全面を絶縁
物で覆った後、イオンを注入するようにしたので、キャ
パシタ構造部からの二次電子の放出が抑制される。
In this invention, since ions are implanted after the entire surface of the capacitor structure is covered with an insulator, the emission of secondary electrons from the capacitor structure is suppressed.

〔実施例〕〔Example〕

第1図はこの発明に係るイオン注入方法の一実施例を説
明するための図である。図において、従来のイオン注入
方法との相違点は、イオン注入を行う前に第1図に示す
ように多結晶シリコン膜3−絶縁膜4−多結晶シリコン
膜5により構成されるキャパシタ構造部の表面全面を絶
縁物であるフォトレジスト6で覆い、その後、ソース・
ドレイン領域等の形成のため、イオン注入を行う。この
ときフォトレジスト6を介して多結晶シリコン膜5にも
イオンビーム7が照射されるが、フォトレジスト6は絶
縁物であるため、多結晶シリコン膜5からの二次電子の
放出が抑制され、従来に比し、多結晶シリコン膜5の正
電荷の蓄積か抑制される。
FIG. 1 is a diagram for explaining an embodiment of the ion implantation method according to the present invention. In the figure, the difference from the conventional ion implantation method is that, as shown in FIG. The entire surface is covered with a photoresist 6, which is an insulator, and then the source
Ion implantation is performed to form a drain region and the like. At this time, the ion beam 7 is also applied to the polycrystalline silicon film 5 through the photoresist 6, but since the photoresist 6 is an insulator, the emission of secondary electrons from the polycrystalline silicon film 5 is suppressed. Accumulation of positive charges in the polycrystalline silicon film 5 is suppressed compared to the prior art.

その結果、絶縁膜4が静電破壊されることがなくなる。As a result, the insulating film 4 will not be damaged by electrostatic discharge.

さらに、フォトレジスト6にカーボンが含まれている場
合には、イオンビーム7の照射によりフォトレジスト表
面が炭化され、表面が導電性を帯びる。その結果、イオ
ンビーム7の照射により生じる正電荷がフォトレジスト
6の表面を伝って逃げて行き、上記二次電子の放出の抑
制と相まって、多結晶シリコン膜5の正電荷の帯電をさ
らに抑制できる。
Further, if the photoresist 6 contains carbon, the surface of the photoresist is carbonized by irradiation with the ion beam 7, and the surface becomes conductive. As a result, the positive charges generated by the irradiation with the ion beam 7 escape along the surface of the photoresist 6, and in combination with the above-mentioned suppression of the emission of secondary electrons, it is possible to further suppress the charging of the polycrystalline silicon film 5 with positive charges. .

なお、上記実施例では多結晶シリコン膜3−絶縁膜4−
多結晶シリコン膜5によりキャパシタ構造部を構成した
が、その他の構成のキャパシタ構造部、例えば半導体基
板−絶縁膜−多結晶シリコン膜のような構成でもよい。
Note that in the above embodiment, polycrystalline silicon film 3 - insulating film 4 -
Although the capacitor structure is made of the polycrystalline silicon film 5, the capacitor structure may have another structure, for example, a semiconductor substrate-insulating film-polycrystalline silicon film structure.

また、上記実施例ではフォトレジスト6でキャパシタ構
造部の表面全面を覆ったが、絶縁物であればフォトレジ
ストに限定されない。
Further, in the above embodiment, the entire surface of the capacitor structure was covered with the photoresist 6, but the photoresist is not limited to any insulating material.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、キャパシタ構造部の表
面全面を絶縁物で覆った後、イオンを注入するようにし
たので、キャパシタ構造部からの二次電子の放出が抑制
される。その結果、キャパシタ構造部への正電荷の蓄積
か抑制され、キャパシタ構造部の静電破壊が防止できる
という効果がある。
As described above, according to the present invention, since ions are implanted after the entire surface of the capacitor structure is covered with an insulator, the emission of secondary electrons from the capacitor structure is suppressed. As a result, accumulation of positive charges in the capacitor structure is suppressed, and electrostatic damage to the capacitor structure can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明に係るイオン注入方法の一実施例を説
明するための図、第2図は従来のイオン注入方法を説明
するための図である。 図において、3及び5は多結晶シリコン膜、4は絶縁膜
、6はフォトレジストである。 なお、各図中同一符号は同一または相当部分を示す。
FIG. 1 is a diagram for explaining an embodiment of the ion implantation method according to the present invention, and FIG. 2 is a diagram for explaining a conventional ion implantation method. In the figure, 3 and 5 are polycrystalline silicon films, 4 is an insulating film, and 6 is a photoresist. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板上にキャパシタ構造部を有する半導体
装置にイオン注入を行うイオン注入方法において、 前記キャパシタ構造部の表面全面を絶縁物で覆った後、
イオン注入することを特徴とするイオン注入方法。
(1) In an ion implantation method for implanting ions into a semiconductor device having a capacitor structure on a semiconductor substrate, after covering the entire surface of the capacitor structure with an insulator,
An ion implantation method characterized by ion implantation.
JP31892190A 1990-11-22 1990-11-22 Ion-implantation method Pending JPH04188824A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31892190A JPH04188824A (en) 1990-11-22 1990-11-22 Ion-implantation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31892190A JPH04188824A (en) 1990-11-22 1990-11-22 Ion-implantation method

Publications (1)

Publication Number Publication Date
JPH04188824A true JPH04188824A (en) 1992-07-07

Family

ID=18104467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31892190A Pending JPH04188824A (en) 1990-11-22 1990-11-22 Ion-implantation method

Country Status (1)

Country Link
JP (1) JPH04188824A (en)

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