JPH01282815A - Manufacture of trench type memory cell - Google Patents

Abstract

PURPOSE:To control the quantity of ions being implanted to the sidewall of a trench easily by forming a trench etching mask in the two layer structure of a semi-insulating film or a conductive film and a normal insulating trench etching mask. CONSTITUTION:A semi-insulating film 2 is shaped onto a semiconductor substrate 1, and an insulating trench etching mask 13 is formed onto the film 2. A specified section is removed, and the pattern of a trench etching mask 4 in two layers is formed. A trench 5 is shaped to the substrate 1 through patterning. The sidewall of the trench 5 is irradiated with ion beams 6 under the state in which ion beams 6 are inclined to the sidewall of the trench 5 at a fixed angle as the mask 3 is left as it is, the substrate 1 to which the trench 5 is formed is turned, ions are implanted to the sidewall of the trench 5 and an impurity is doped, and annealing is conducted. The charges of the mask 4 escape to the substrate 1 side through the insulating film 2, and the quantity of the charging of the mask 4 is controlled. Accordingly, the quantity of ions implanted to the sidewall of the trench 5 is controlled easily.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a trench type memory cell using an ion implantation method.

BACKGROUND ART In a memory device having a degree of integration higher than that of a 4 Mbit dynamic RAM, it is necessary to secure a capacitor capacity of 50 f or more and at the same time reduce the chip area in order to increase the degree of integration. For this reason, trench capacitor technology, which uses trenches to form capacitors, has become indispensable. In trench capacitors, in order to make it easier for electrons to move and to extend the charge retention time,
A --like impurity diffusion layer must be formed at a certain concentration or higher on the trench sidewall under the oxide film.

Conventionally, ion implantation has been used as a method for doping impurities into trench sidewalls. In this method, as shown in FIG. 2(a), a trench etch mask 1 is placed on a semiconductor substrate 11.
A trench etch mask 12 is formed by anisotropic etching as shown in FIG. 2(1)), and a trench is formed in the semiconductor substrate 11 as shown in FIG. 2(C). 13 is formed, and then, while irradiating the beam 14 while being tilted at a predetermined angle, the wafer on which the trench has been formed is rotated and ions are implanted into the side wall of the trench, thereby doping impurities.

Problems to be Solved by the Invention However, in the conventional ion implantation method into the trench sidewall using the trench etch mask 12, the trench etch mask 12 usually uses a resist film or an insulator such as 5iO2Wi made by CVD. For example, when the implanted ions 14 are A S + ions, the As'' ions positively charge the resist backbone and the SiO2 film, which repels the ions 14 and spreads the ion beam. There is a problem in that the amount of ion implantation is insufficient, and the ion implantation amount varies widely within the wafer, resulting in a lack of precision.

The present invention solves the above problem, and aims to provide an H3W method for a trench type memory cell in which the trench etch mask is not charged by the implanted ions and the ion beam does not spread when ions are implanted into the trench sidewall. That is.

Means for Solving the Problems In order to solve the above problems, the present invention forms at least two layers of trench etch masks on a semiconductor substrate, uses an insulating trench etch mask as the upper layer of the trench etch mask, and uses an insulating trench etch mask as the bottom layer of the trench etch mask. - uses a semi-insulating film or a conductive film.

□Operation With the above configuration, since a semi-insulating film or a conductive film is used as the lower layer as a trench etch mask, the electric charge of the trench etch mask escapes to the semiconductor substrate side through the semi-insulating film or conductive film. The amount charged by ions on the trench etch mask is controlled, thereby preventing the ion beam from spreading, and furthermore, the amount of ions implanted into the side walls of the trench can be easily controlled.

Example Embodiments of the present invention will be described below based on the drawings.

FIGS. 1A to 1C are cross-sectional views showing the steps of a method for manufacturing a trench type memory cell according to an embodiment of the present invention.

First, as shown in FIG. 1(a), a carbon-based semi-insulating film 2 is coated on a semiconductor substrate 1 made of single crystal silicon.
．． An insulating trench etch mask 3 consisting of a 5102 film formed to a thickness of 2 μm and formed thereon by the CVD method.
is formed to have a thickness of 1.0 μm, and a predetermined portion is removed to form a two-layer trench etch mask 4 pattern as shown in FIG. 1(b). Next, patterning is performed using a dry etching method, and a trench 5 is formed in the semiconductor substrate 1. After that, an ion beam 6 is applied to the side wall of the trench while leaving the insulating film 2 and the insulating trench etch mask 3 in place. The wafer on which the trenches 5 have been formed is rotated while irradiation is performed while tilted at a predetermined angle, ions are implanted into the side walls of the trenches to dope impurities, and then annealing is performed. The depth of the diffusion layer at this time is approximately 0.15 μm at the trench sidewall and approximately 0 at the bottom.
．． It is set to 25 μm.

With the above configuration, the semi-insulating g! 2 is used, the charge accumulated in the trench etch mask 4 escapes to the semiconductor substrate 1 side through the semi-insulating film 2, and the amount of charge caused by the ions in the trench etch mask 4 is controlled. This prevents the ion beam 6 from spreading, reduces variations in the depth of the diffusion layer within the wafer, and at the same time provides a depth of the diffusion layer that does not pose any practical problems.

Note that a conductive film may be used as the lower layer of the trench etch mask 4 instead of the semi-insulating film, and similar effects can be obtained.

Effects of the Invention As described above, according to the present invention, the trench etch mask has a two-layer structure consisting of a semi-insulating film or a tetraconducting film and a normal insulating trench etch mask 7, thereby making it possible to reduce the amount of damage to the side walls of the trench. Variations within the wafer during ion implantation are reduced, and the amount of ions implanted into the trench sidewalls can be easily controlled.

[Brief explanation of the drawing]

FIGS. 1(a) to (C) are cross-sectional views showing the process order of a method for manufacturing a trench type memory cell according to an embodiment of the present invention, and FIGS. FIG. 3 is a cross-sectional view showing the steps of impurity doping by ion implantation. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Semi-insulating film, 3... Insulating trench etch mask, 4... Trench etch mask, 5... Trench, 6... Ion beam. Agent Yoshihiro Morimoto Figure 2 1 To Ginkei

Claims (1)

[Claims] 1. After forming a semi-insulating film or a conductive film as a lower layer and an insulating trench etch mask as an upper layer on a semiconductor substrate as a trench etch mask, a trench is formed, and then an ion beam is applied to the side walls of the trench. A method for manufacturing a trench type memory cell in which impurities are doped into the trench sidewalls by rotating a wafer on which a trench has been formed while irradiating the wafer at a predetermined angle.