JPS5913375A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable to prevent a gate electrode from generation of high electric potential, and to eliminate the destruction phenomenon of a gate insulating film by a method wherein a process to form a pattern to previously short-circuit electrically the gate electrode and a semiconductor substrate is provided. CONSTITUTION:After the gate insulating film 13 and a field insulating film 15 are formed on the semiconductor substrate 11, a poly-silicon film is adhered on the gate insulating film 13, patterning is performed to form the gate electrode 14, and openings 17a, 17b are formed to the gate insulating film 13 parts corresponding to a source region and a drain region utilizing the gate electrode 14 thereof as the mask. A conductive material of Al, etc., is adhered on the whole surface, and patterning is performed to form the conductive layer 16 to short- circuit the gate electrode 14 and the semiconductor substrate 11. After then, impurities are introduced through the openings 17a, 17b by performing ion implantation to form the source region 12a and the drain region 12b.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to M 08 (Metal Oxide 8
emlcOnductor) The present invention relates to a method of manufacturing an integrated circuit, and particularly to a method of manufacturing a semiconductor device that prevents breakdown of a dart insulating film due to static electricity during ion implantation. - [Technical Background of the Invention] Figure 1 (N is a plan view of a conventional MOSFET, the same figure (B)
is a cross-sectional view taken along line X-X in the same figure (N. Figure 1 (A)
, In (B), 11 is a semiconductor substrate, 12B is a source region, 12b is a drain region, 13 is an r-to insulating film,
14 is a dirt electrode, and 15 is a field insulating film. Here, the ion implantation method that has been used to manufacture M08 integrated circuits is mainly used to control the r-to threshold voltage, and the implantation amount is on the order of 10 m at most, and the charged beam current at the time of implantation is on the order of 10 m. As for the number of 100μ
It was a person's order. In such a case, the semiconductor substrate 1
Even if ions are implanted into the so-called dirt region including the f-) electrode 14 and the dirt insulating film 13 provided insulated on the f-) electrode 14, it is thought that the positive charges generated due to the implantation mainly leak through the surface. There is almost no potential difference caused by charging between the dirt electrode 14 and the substrate 11 that would destroy the dirt insulating film 13. However, in recent years, as the dart length (in other words, the channel length between the source and drain) has become shorter, the ion implantation method has been used instead of the conventional thermal diffusion method.
.

12b has come into use.

In such a case, a higher concentration or composition is required than the channel doping for threshold voltage control, and the amount of impurity ions implanted for this purpose must be increased. In order to increase the implantation amount, there is a way to lengthen the implantation time, but since this results in manufacturing inefficiency, it is common practice to perform ion implantation with a large beam current on the order of several yLA. be.

[Problems with background technology]

However, when impurity ions are implanted with such a large beam current, a phenomenon called f-) electrostatic breakdown of the insulating film 13 occurs. The cause of such electrostatic breakdown of the dirt insulating film 13 is that although there is ion leakage on the surface of the dirt insulating film 13, the charged beam current is extremely large, so r
- For something like a meter electrode that is completely insulated from the semiconductor substrate 11, the amount of charge that accumulates is greater than the amount of charge that escapes. This inevitably causes an increase in the potential of the f-) electrode.On the other hand, since the area of the semiconductor substrate 1 is very large compared to the area of the dirt region including the dirt electrode, the area of the semiconductor substrate 1 is Since the increase in potential is considered to be negligible, the difference between the dirt electrode 14 and the semiconductor substrate 11
As the ion implantation time increases, the potential difference between
r-) There is a drawback that breakdown occurs when the breakdown voltage of the insulating film 13 is exceeded. Further, as integrated circuits become thinner, the dart insulating film 13 tends to become thinner, and such a destructive phenomenon becomes more noticeable.

A method for preventing such an increase in charge in the date region is to carry out ion implantation by lowering the beam current, but as described above, the ion implantation is performed using an ax.

The problem is that it is inefficient and unrealistic in terms of time.

there were.

[Purpose of the invention]

This invention has been made in view of the above points.The purpose of this invention is to provide a method for manufacturing MO8 integrated circuits that does not produce a product of charge in the dirt region even when ion implantation is performed with a large beam current of several mA. An object of the present invention is to provide a method for manufacturing a semiconductor device that does not cause breakdown of an insulating film.

[Summary of the invention]

A new process is added to form a pattern that electrically shorts the dirt electrode and the semiconductor substrate, and impurity ions are implanted to form the source and drain regions while the dirt electrode and the semiconductor substrate are electrically shorted. This is a method for manufacturing the device.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

A method of manufacturing a semiconductor device showing one embodiment of the present invention will be described with reference to FIG. First, as shown in FIG. 2(a), a dirt insulating film 13 and a field insulating film 15 are formed on the semiconductor substrate 11. Here, FIG. -X cross section is shown.Next, a polysilicon film is deposited on the f-) insulating film 13 and patterned by photolithography to form the f-) electrode 14. 14 as a mask, openings 178 and 17b are formed in portions of the dirt insulating film 13 corresponding to the source and drain regions. Here, Fig. 2(b)
Figure 2 (C) shows the Y-Y cross section of the uniform.Next, as shown in Figure 2 (C), a conductive material such as A! is deposited on the entire surface by vapor deposition or the Sufu 4 ivy method. f-) A short-circuit conductive layer 16 for short-circuiting the electrode 14 and the semiconductor substrate 11 is formed by /IP turning as shown by the notation in the figure using a normal photo-etching process. As shown by double hatching in FIG. It has contacting portions 16c and 16d. After forming the shorting conductive layer 16, impurities are implanted into the substrate surface through the openings 17m and J7b by ion implantation to form a source region 1211 and a drain region 12b. For this ion implantation,
Since the r-meter electrode 14 is short-circuited to the substrate 11 by the conductive layer 16, the charge generated at the gate electrode 14 is released to the substrate 11, and a potential difference is hardly generated between the semiconductor substrates 11. Therefore, destruction of the r-) insulating film 13 does not occur. Here, FIG. 2 (cl shows the zz section of FIG. 2 (q). Also, when λ! is used for the shorting conductive layer 16, Since it can be easily removed by acid treatment after ion implantation, it has little effect on device manufacturing.

Note that - in the above embodiment, the MOS is mounted on the semicircular substrate.
Although the manufacturing method for forming a transistor has been described, the same can be said for a MOS transistor formed on a semiconductor thin film provided on an insulating substrate7. [Effects of the Invention] As detailed above, this According to the invention, since a new step is newly provided to form a no-e turn to electrically short-circuit the dirt electrode and the semiconductor substrate, it is possible to easily implant impurity ions to form the source region and the drain region. , Even if charges are to be accumulated on the r-to electrode, the charges are quickly released to the semiconductor substrate having a large area, so that a high potential is not generated on the dirt electrode, and f-) Eliminating the phenomenon of breakdown of the insulating film. I can do it.

[Brief explanation of drawings]

Figure 1 (AJ is a plan view of a conventional MOS FET, the same figure (
B) is the same figure (XX sectional view at N, Figure 2 (A1-
(q and +a) to (C1 are respectively a plan view and a cross-sectional view for explaining a method of manufacturing a semiconductor device showing one embodiment of the present invention. 11... Semiconductor substrate, 12a... Source region, 12
b...Drain region, 13...Dart insulating film, 14
...Dart electrode, 16...Conductive layer for short circuit.

Claims (1)

[Claims] In the method for manufacturing MO8 integrated circuits, an insulated case is
A step of forming a pattern that short-circuits the f-) electrode and the substrate with a conductive material is provided to prevent the generation of a potential difference caused by a charge between the f-) electrode and the substrate during ion implantation. A method for manufacturing a semiconductor device.