JPH0927618A - Manufacture of mos semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a MOS semiconductor device, which effectively checks the decline in breakdown strength and the damage to gate oxide film in the manufacturing steps. SOLUTION: Photoresist patterns 11 are formed on an element separating thick oxide film 8 in the state of a gate electrode 10 formed on an Si made semiconductor substrate 7 through the intermediary of the thick oxide film 8 and a gate oxide film 9. Next, a carbon thin film 12 10-100nm thick is formed on the semiconductor substrate 7 including the photoresist patterns 11 and the gate electrode 10. Finally, after the formation of drain/source regions 13 by irradiating with ionized B(boron) by ion implanting process, the carbon thin film 12 and the photoresist patterns 11 are ashed away using oxygen plasma.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOS type semiconductor device, and more particularly to an improvement in doping an N type or P type impurity into a semiconductor substrate for forming a source / drain region.

[0002]

2. Description of the Related Art Conventionally, as a method of doping N-type or P-type impurities into a semiconductor substrate, an ion implantation method is important because of its high control accuracy of the doping amount and the doping depth. Has been done. Doping and steps before and after it in a conventional method for manufacturing a MOS semiconductor device will be described with reference to FIG.

First, with the thick oxide film 2 for element isolation and the gate electrode 4 via the gate oxide film 3 formed on the semiconductor substrate 1 (a), for ion implantation in the next step. As a mask, a photoresist pattern is formed on the element isolation thick oxide film 2.
To form the film 5 (b). It should be noted that mask protection of the gate electrode 4 with a photoresist pattern has not been performed at present because of the problem of its positional accuracy. Next, by applying a high voltage to the positively ionized N-type impurity or P-type impurity by the ion implantation method, the semiconductor substrate 1 is at the ground potential through the device to which it is attached. Source and drain regions 6 are formed by accelerating toward and irradiating the entire upper surface of the semiconductor substrate 1 in the direction of the arrow shown in FIG.
After that, the photoresist pattern 5 was removed by oxygen plasma (d).

[0004]

However, in the above-mentioned conventional manufacturing method, the semiconductor substrate 1 is formed by the gate oxide film 3.
The gate electrode 4 which is insulated from the gate electrode 4 is positively charged in its entirety by the irradiated positive ionized impurities, so that an electric field is generated between the gate electrode 4 and the semiconductor substrate 1 at the ground potential. Moreover, the gate oxide film 3 has a thickness of 10 to 15 n.
Since it is very thin, the electric field strength between the gate electrode and the semiconductor substrate is abnormally increased by this charging, and as a result,
There is a problem in that discharge occurs and the gate oxide film is destroyed or the breakdown voltage of the film is reduced. Since the element isolation thick oxide film 5 is protected by the photoresist pattern 5 and has a large thickness of about 500 nm, the above problem does not occur.

The above-mentioned problems have become more prominent in recent years in semiconductor integrated circuits that are becoming more and more integrated, with the gate electrodes becoming finer and the gate oxide film becoming thinner. There is. In view of the above problems and background, it is an object of the present invention to provide a method of manufacturing a MOS type semiconductor device capable of effectively preventing a breakdown voltage of the gate oxide film from being lowered or broken.

[0006]

In order to achieve the above object, a method of manufacturing a MOS type semiconductor device according to claim 1 includes:
MOS type including a semiconductor substrate, a gate electrode provided on the semiconductor substrate via an insulating layer, and a drain / source electrode provided on the semiconductor substrate and connecting a drain / source region In a method of manufacturing a semiconductor device, the gate electrode is provided on the semiconductor substrate via the insulating layer, and then the drain / soap is formed by doping N-type impurities or P-type impurities using an ion implantation method. -Before forming the source region, a conductive thin film is coated so as to bridge at least the gate electrode exposed surface and the semiconductor substrate exposed surface, and after forming the drain / source region, the drain / source region is formed.
It is characterized in that the conductive thin film is removed before the source electrode is attached.

The method of manufacturing a MOS semiconductor device according to a second aspect of the present invention is the same as the method of manufacturing a MOS semiconductor device according to the first aspect, in which a conductive thin film is formed on the entire exposed surface of the gate electrode and the drain. The gate of the semiconductor substrate including the source region
It is characterized in that the entire exposed surface on the side where the electrode is attached is covered. The method for manufacturing a MOS semiconductor device according to claim 3 is different from the method for manufacturing a MOS semiconductor device according to claim 1 or 2 in that the conductive thin film has a thickness of 10 to 100 nm.
It is characterized by being a carbon thin film.

[0008]

According to the method of manufacturing a MOS type semiconductor device of claim 1, when doping N-type or P-type impurities using an ion implantation method, the impurities having an ionic charge are not limited to the semiconductor substrate. Since the gate electrode is also irradiated without it, the gate electrode tries to be charged, but the ionic charge is
Since the gate electrode and the semiconductor substrate can freely move between the gate electrode and the semiconductor substrate through the conductive thin film covering the exposed surface of the gate electrode and the exposed surface of the semiconductor substrate, the gate electrode can be freely moved. Between the semiconductor substrate and the semiconductor substrate, or a potential difference between them is very small, and a strong electric field is generated that causes the breakdown of the insulating layer between the gate electrode and the semiconductor substrate or the breakdown voltage of the same layer. do not do.

According to the method of manufacturing the MOS type semiconductor device of the second aspect, when the N type or P type impurity is doped by the ion implantation method, the impurity having the ionic charge is not limited to the semiconductor substrate. The gate electrode tries to be charged because it is also irradiated to the gate electrode, but the ionic charge causes the gate electrode of the semiconductor substrate including the entire exposed surface of the gate electrode and the drain source region. Since it is possible to freely move between the gate electrode and the semiconductor substrate through the conductive thin film covering the entire exposed surface on the electrode mounting side, between the gate electrode and the semiconductor substrate, The potential difference does not occur, or even if it occurs, it is extremely small, and a strong electric field that causes destruction of the insulating layer between the gate electrode and the semiconductor substrate or reduction of breakdown voltage of the same layer is not generated.

According to the method of manufacturing the MOS type semiconductor device of the third aspect, at the time of doping the N type or P type impurity by the ion implantation method, the impurity having the ionic charge is not limited to the semiconductor substrate. Since the gate electrode is also irradiated without it, the gate electrode tries to be charged, but the ionic charge is generated by the carbon thin film having a film thickness of 10 to 100 nm.
Since it can freely move between the gate electrode and the semiconductor substrate, there is no potential difference between the gate electrode and the semiconductor substrate or the potential difference is very small. An electric field that is so strong as to cause the breakdown of the insulating layer between the electrode and the semiconductor substrate or the reduction of the breakdown voltage of the same layer is not generated. The film thickness is 10
100 nm means that if the film thickness is 10 nm or more,
This is because sufficient conductivity can be ensured between the gate electrode and the semiconductor substrate, and when the thickness is 100 nm or less, the same film passability of the same impurity at the time of impurity doping can be sufficiently ensured.

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a manufacturing process diagram according to the manufacturing method of the present invention. As shown in the figure, first, Si (silicon)
A gate electrode 1 made of a polycrystalline silicon film with an oxide film 8 having a thickness of about 500 nm and a gate oxide film 9 having a thickness of 10 to 15 nm as a thick film for element isolation on a semiconductor substrate 7 made of
In the state where 0 and (a) are formed, the element isolation thick oxide film 8 is formed.
A photoresist pattern 11 is formed thereon (b). Since the steps up to this point can be easily realized by using a known method, detailed description thereof will be omitted here.

Then, using a vacuum deposition method, as shown in (c), a film thickness of 10 to 100 nm is formed on the semiconductor substrate 7 including the photoresist pattern 11 and the gate electrode 10.
The carbon thin film 12 is formed. Film thickness 10-100n
If m is less than 10 nm, the process of forming
It becomes difficult to form a carbon thin film on the side wall 10a of the gate electrode 10, and therefore the gate electrode 10 and the semiconductor substrate 7 are formed.
If the conductivity is deteriorated and the thickness is thicker than 100 nm, the P-type impurities will be covered during the doping of the P-type impurities described later.
This is because it becomes difficult to pass through the Bonn thin film 12.

With the carbon thin film 12 formed, the positively ionized B (boron) (P-type impurity) is irradiated from the direction of the arrow by the ion implantation method as shown in (d). At this time, the ionized B (boron) penetrates through the carbon thin film 12, and as shown in FIG.
And a drain region 6 are formed. On the other hand, the element isolation thick oxide film 1 covered with the photoresist pattern 12
2 does not reach B (boron). Also, the gate electrode 1
The ionic charge of B (boron) reaching 0 flows to the semiconductor substrate 1 via the carbon thin film 12, and further escapes to the device to which the semiconductor substrate 1 is attached. Therefore, no electric field is generated between the gate electrode 10 and the semiconductor substrate 1, and therefore the gate is generated by the discharge.
The oxide film 9 is not damaged.

Next, the carbon thin film 12 is exposed to oxygen plasma.
Then, the photoresist pattern 11 is removed by ashing (e). After that, the MOS type semiconductor device is completed through steps such as the attachment of the source electrode and the drain electrode.
Since these steps can be easily realized by using a known method, detailed description thereof will be omitted here.

In the above embodiment, the vacuum vapor deposition method was used to form the carbon thin film, but the present invention is not limited to this. For example, a sputtering method or a chemical vapor deposition method (CVD method) is used. May be used. In the above embodiment,
Although the case of doping P-type impurities is shown, the doping of N-type impurities such as P (phosphorus) and As (arsenic) can also be performed by the same method.

[0016]

As described above, the MOS according to the invention described in claim 1
According to the method of manufacturing a type semiconductor device, a gate electrode is provided on a semiconductor substrate via an insulating layer, and a drain / soap is formed by doping an N type impurity or a P type impurity using an ion implantation method. Before forming the gate region, the conductive thin film is coated so as to bridge at least the gate electrode exposed surface and the semiconductor substrate exposed surface, so that P-type or N-type impurities are doped by the ion implantation method. In this case, the gate electrode is not charged, and therefore it is possible to prevent the breakdown voltage and the breakdown of the insulating layer between the gate electrode and the semiconductor substrate due to the discharge between the gate electrode and the semiconductor substrate. it can.

As described above, according to the method of manufacturing the MOS type semiconductor device of the present invention, the gate electrode is provided on the semiconductor substrate via the insulating layer, and then the N type is formed by the ion implantation method. Before forming the drain source region by doping impurities or P-type impurities, the conductive thin film is gated.
The entire exposed surface of the gate electrode and the entire exposed surface of the semiconductor substrate including the drain / source region on the side where the gate electrode is attached are covered, so that the same effect as the method of manufacturing the MOS type semiconductor device according to claim 1 is obtained. Is obtained.

As described above, according to the method of manufacturing the MOS type semiconductor device of the present invention, the conductive thin film has a film thickness of 10
The carbon thin film having a thickness of about 100 nm, the M according to claim 1.
In addition to the effect of the manufacturing method of the OS type semiconductor device, when doping the P type or N type impurity by the ion implantation method,
It is possible to obtain sufficient conductivity between the gate electrode and the semiconductor substrate and sufficient permeability of the conductive thin film of P-type or N-type impurities.

[Brief description of drawings]

FIG. 1A is a diagram showing one step according to the manufacturing method of the present invention. (B) is a figure showing 1 process by a manufacturing method of the present invention. (C) is a figure showing 1 process by a manufacturing method of the present invention. (D) is a figure showing 1 process by a manufacturing method of the present invention. (E) is a figure showing 1 process by a manufacturing method of the present invention.

FIG. 2A is a diagram showing one step by a conventional manufacturing method. (B) is a figure showing 1 process by the conventional manufacturing method. (C) is a figure showing 1 process by the conventional manufacturing method. (D) is a figure showing 1 process by the conventional manufacturing method.

[Explanation of symbols]

 7 Semiconductor substrate 8 Thick oxide film for element isolation 9 Gate oxide film 10 Gate electrode 11 Photoresist pattern 12 Carbon thin film 13 Drain / source region

Claims (3)

[Claims] 1. A semiconductor substrate, a gate electrode provided on the semiconductor substrate via an insulating layer, and a drain electrode provided on the semiconductor substrate for connecting a drain source region.
In a method of manufacturing a MOS type semiconductor device including a source electrode, an N type impurity or a P type impurity using an ion implantation method after the gate electrode is provided on the semiconductor substrate via the insulating layer. A conductive thin film before forming the drain source region by doping at least one of the gates.
The exposed surface of the semiconductor substrate so as to bridge the exposed surface of the semiconductor substrate, and after forming the drain / source region, the drain / source is formed.
A method of manufacturing a MOS type semiconductor device, characterized in that the conductive thin film is removed before attaching the electrode. 2. The conductive thin film is coated on the entire exposed surface of the gate electrode and the exposed surface of the semiconductor substrate including the drain / source region on the gate electrode mounting side. The method of manufacturing a MOS semiconductor device according to claim 1. 3. The conductive thin film has a thickness of 10 to 100 n.
3. A method for manufacturing a MOS type semiconductor device according to claim 1, wherein the carbon thin film is m.