JPH04154158A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enable a cell for reworking to be placed at an optimum position by placing an unwired cell with a function which is the same as or similar to that of a cell of a logic function next to the cell or a position which is closet to the cell. CONSTITUTION:A basic logic function cell 2 and a wiring region 3 are placed as normally and two types of cells for reworking 1 and 4 with different element layout are placed in an empty part between these cells. At this time, the corresponding cell 1 or 4 for reworking is placed next to the cell 2 or in a position closet to the cell depending on whether the cell 2 is a cell of an order circuit or a cell of a combination circuit. Thus, wiring length when performing reworking can be reduced and modification a circuit can easily be made.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor integrated circuit device.

[Conventional technology]

Conventional semiconductor integrated circuit devices have a configuration in which a plurality of logical function cells each consisting of a group of semiconductor elements are arranged on a semiconductor substrate, and wiring is provided within the cells and between the cells, or in addition to the above configuration, a characteristic is installed in the empty space between the cells. Unwired cells (hereinafter referred to as rework cells) for adjustment, replacement when cells are unavailable, etc.
It is configured with .

[Problem to be solved by the invention]

The conventional semiconductor integrated circuit device described above has a configuration in which work cells with the same pattern are simply placed in empty areas of cell rows, so during actual rework (when wiring cells for rework) Disadvantages include the need to run long wires to the cell, and furthermore, the reworked cell may not have a transistor arrangement suitable for the circuit to be modified.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device in which work cells are arranged at optimal positions.

[Means to solve the problem]

The semiconductor integrated circuit device of the present invention has a plurality of logic function cells each composed of a group of semiconductor elements arranged therein, and furthermore, from among several types of glue work cells with different semiconductor element arrangements, the one most suitable for the cell to be arranged and the one suitable for the work cell are selected. It has a configuration in which cells are selected and work cells are selected and placed at optimal positions between each cell.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a cell layout diagram of an embodiment of the present invention, in which a basic logic function cell 2 consisting of a group of semiconductor elements and a wiring area 3 are arranged in the same manner as in the conventional case. Rework cells (unwired cells) are placed in the empty spaces between these cells. In this embodiment, two types of glue work cells 1.4 with different element arrangements are used. From these two types of glue work cells 1 and 4, rework cells 1 and 4 suitable for cell 2 to be placed (rework cells with the same or similar functions) are selected, and the optimal between each cell is selected. It is placed in a certain position. In other words, use a glue work cell with the same function as the cell, for example, a sequential circuit glue work cell for a sequential circuit cell, a combinational circuit glue work cell for a combinational circuit cell, next to that cell, if that is not possible. Place it closest to that cell. As a result, it becomes possible to shorten the wiring length during rework.

Since there are several types of glue work cells with different element arrangements, the most suitable glue work cell can be selected from among these, making it easy to change the circuit.

FIG. 2 is a cell layout diagram of a second embodiment of the present invention. Second
In the arrangement of the work cells in the cell row in the lower row of the figure, the rework cell 1 and the rework cell 4, which have different element arrangements from each other, are adjacent to each other. In this way, by using several types of glue work cells side by side, it is possible to realize a rework cell that can handle more special work.

〔Effect of the invention〕

As explained above, the present invention selects the optimal work cell to be placed from among several types of glue work cells, and arranges the selected work cell at the optimal position between each cell. Therefore, it is possible to provide an optimal work cell for circuits that cannot be realized.

[Brief explanation of drawings]

FIG. 1 is a cell layout diagram of an embodiment of the present invention, and FIG. 2 is a cell layout diagram of a second embodiment of the invention. 1... First glue work cell, 2... Cell, 3...
- Wiring area, 4... Cell for second glue work.

Claims (1)

[Claims] In a semiconductor integrated circuit device in which a plurality of logic function cells each consisting of a group of semiconductor elements are arranged on a semiconductor substrate, and unwired cells are arranged in the empty spaces between the logic function cells, several types of unwired cells with different semiconductor element arrangements are used. 1. A semiconductor integrated circuit device comprising a cell, and an unwired cell having the same or similar function as the logic cell is arranged next to the cell or at a position closest to the cell.