JPH04152730A - Multiplexing data transmission system - Google Patents

Abstract

PURPOSE:To use only one wiring through which an address and an information bit are sent and to simplify the circuit by processing a data signal synchronously with a clock on which an address and an information bit are multiplexed and using a 1st timing pulse and a 2nd timing pulse so as to send the information bit to a specific destination. CONSTITUTION:At first a data signal 2 on which a clock 3, an address 6 and an information bit 8 are multiplexed synchronously with the clock 3, and a 1st timing pulse 1 representing the multiplexed location of the address 6 are inputted to an address coincidence detection circuit 5, the address 6 of the data signal 2 is detected by using a 1st timing pulse 1 and whether or not the address 6 is coincident with the destination to which the information bit 8 is sent is detected and when they are coincident, the clock 3, the data signal 2 and a 2nd timing pulse 4 representing the multiplexed position of the information bit are inputted to a data detection circuit 7, and the information bit 8 is detected from the data signal 2 and fetched. Through the method above, the information bit 8 is sent to the destination of the address 6.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to data transmission, and in particular to a data transmission system for distributing information such as control signals to specific destinations.Prior art: Conventionally, this type of data transmission system has not been used. Two methods were known: one in which a separate line was established for each destination, and the other in which the address and information bits were multiplexed into a data signal and transmitted with a single timing pulse.

Problems to be Solved by the Invention However, in the conventional data transmission system described above, the system in which a separate line is installed for each destination has the disadvantage that as many wiring lines as there are destinations are required.

In addition, in a method that transmits a data signal in which address and information bits are multiplexed together with a single timing pulse, the circuit implementation means is to latch all the data signals in which address and information bits are multiplexed with a single timing pulse. Then, in order to latch only the address of the data signal, a second timing pulse for address latch is generated from a single timing pulse, and the second timing pulse is One possible method is to latch the address using a timing pulse of The latter method requires a large amount of memory, and the latter method has the disadvantage that the circuit becomes complex due to the generation of the second timing pulse.

The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a new multiplexed data transmission system which makes it possible to eliminate the above-mentioned drawbacks inherent in the conventional technology.

Means for Solving the Problems In order to achieve the above object, the multiplex data transmission system according to the present invention provides a data signal in which a clock, an address and information bits are multiplexed and synchronized with the clock, and a multiplex position of the address. It is characterized by transmitting a first timing pulse indicating the multiplexing position of the information bits and a second timing pulse indicating the multiplexing position of the information bits.

Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a timing chart for explaining the operation of an embodiment according to the present invention.

The multiplexed data transmission method of the present invention multiplexes address and information bits and transmits a data signal synchronized with a clock.
This is a transmission method that sends information bits to a specific destination using a first timing pulse and a second timing pulse.

Referring to FIGS. 1 and 2, first, a clock 3, an address 6, and an information bit 8 are multiplexed, and a first timing pulse indicating the multiplexing position of the data signal 2 and address 6 synchronized with the clock 3 is generated. 1 is input to the address-number output circuit 5, the address 6 of the data signal 2 is detected with the first timing pulse 1, and a match is detected to see if the address 6 matches the destination to which the information bit 8 is sent. , if they match, input the clock 3, data signal 2, and second timing pulse 4 to the data detection circuit 7, and detect and capture the information bit 8 from the data signal 2. Information bit 8 can be sent to the designated destination at address 6.

As described in detail, according to the present invention, only one wire is required for sending the address and information bits, and the address is detected from the data signal and the information bits are sent after confirming the match with the destination. Since this method detects and transmits data, it has the advantage of requiring less memory and making the circuit less complicated.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is an explanatory diagram of a multiplexed data transmission system that is disadvantageous to the present invention. 1...First timing pulse. 2... Data signal, 3... Clock, 4... Second timing pulse, 5... Address - several types of output circuit, 6... Address,
7...Data detection circuit, 8...Information bit patent applicant NEC Co., Ltd. Representative Patent attorney Yutabe Kumagai Figure 3-''■几Figure 2

Claims (1)

[Claims] In the data transmission system, a clock, a data signal in which addresses and information bits are multiplexed and synchronized with the clock, a first timing pulse indicating the multiplexing position of the address, and a first timing pulse indicating the multiplexing position of the information bit. A multiplex data transmission method characterized by transmitting two timing pulses.