JPH04146673A - Thin film semiconductor device - Google Patents
Thin film semiconductor deviceInfo
- Publication number
- JPH04146673A JPH04146673A JP27126390A JP27126390A JPH04146673A JP H04146673 A JPH04146673 A JP H04146673A JP 27126390 A JP27126390 A JP 27126390A JP 27126390 A JP27126390 A JP 27126390A JP H04146673 A JPH04146673 A JP H04146673A
- Authority
- JP
- Japan
- Prior art keywords
- film
- contact hole
- thin film
- substrate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 239000010409 thin film Substances 0.000 title claims abstract description 19
- 239000010408 film Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000001039 wet etching Methods 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 238000000034 method Methods 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 230000002093 peripheral effect Effects 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜半導体装置のコ する。[Detailed description of the invention] [Industrial application field] The present invention is a core of a thin film semiconductor device. do.
ンタク
ト構造に関
〔従来の技術〕
従来、薄膜半導体装置のコンタクト構造は、第2図に断
面図で示す如き構造を取っていた。すなわち、500μ
m厚程度のSi基板11上のo5μm5μm厚程i02
膜12上に形成された、0.1μm厚程度の81膜16
上の05μm5μm厚程VD Sio、膜14にウェ
ット・エツチングで開けられたコンタクト穴を介して、
電極15が接続されて成るのが通例であった。Regarding Contact Structure [Prior Art] Conventionally, a contact structure of a thin film semiconductor device has a structure as shown in a cross-sectional view in FIG. That is, 500μ
o5μm5μm thickness i02 on Si substrate 11 with a thickness of about m
81 film 16 with a thickness of about 0.1 μm formed on the film 12
Through a contact hole made by wet etching in the film 14,
It was customary for the electrodes 15 to be connected.
しかし、上記従来技術によると、ウェット・エツチング
によるコンタクト穴の形成は、2μmφ程度迄のコンタ
クト穴形成に限定され、2μmφ程度以下のコンタクト
穴形成には、ドライ・エツチングの適用を要するが、ド
ライ・エツチングを適用すると、01μm1μm厚程1
膜はエツチング除去されて、従来技術によるコンタクト
構造を形成することは実際上、量産的には取れないと言
う課題があった。However, according to the above-mentioned conventional technology, the formation of contact holes by wet etching is limited to forming contact holes up to about 2 μmφ, and dry etching is required to form contact holes of about 2 μmφ or less. When etching is applied, the thickness is about 0.1 μm to 1 μm.
The problem is that the film is removed by etching and forming a contact structure using conventional techniques is practically impossible for mass production.
本発明は、かかる従来技術の課題を解決し、量産的な薄
膜半導体装置のコンタクト構造を提供する事を目的とす
る。It is an object of the present invention to solve the problems of the prior art and to provide a contact structure for mass-produced thin film semiconductor devices.
本発明は、上記課題を解決するために、薄膜半導体装置
に関し、半導体薄膜基板上に形成した絶縁膜に形成した
コンタクト穴を通して、前記半導体薄膜基板を前記コン
タクト穴側面より張り出して残在させ、該張り出し部と
自己整合的に電極を形成する手段を取る。In order to solve the above problems, the present invention relates to a thin film semiconductor device, in which the semiconductor thin film substrate is passed through a contact hole formed in an insulating film formed on the semiconductor thin film substrate, and the semiconductor thin film substrate is left extending from the side surface of the contact hole. Measures are taken to form the electrode in self-alignment with the overhang.
以下、実施例により本発明を詳述す′萎。 Hereinafter, the present invention will be explained in detail with reference to Examples.
第1図は、本発明の一実施例を示す、薄膜半導体装置の
コンタクト構造の断面図である。すなわち、Si基板1
0表面に形成された5in2膜2上のS1膜3上に形成
した(!VD 5i02膜4にドライ・エツチングに
よるコンタクト穴を形成すると共に、前記Si膜6をエ
ツチングするに際し、5i02 と81のドライ・エツ
チングの選択比を20対1程度に大きく取るか、又は、
ドライ・エゾチング後、ウェット・エラチンクラ追加ス
る等して、Si膜3に張り出し部6を斜形又は台形に形
成した後、電極5を形成する事により、Sj、膜6と、
電極5との確実な接続が量産的に行なえる。FIG. 1 is a sectional view of a contact structure of a thin film semiconductor device, showing one embodiment of the present invention. That is, the Si substrate 1
Contact holes are formed on the S1 film 3 on the 5in2 film 2 formed on the 0 surface (!VD) by dry etching in the 5i02 film 4, and when etching the Si film 6, - Increase the etching selection ratio to about 20:1, or
After dry esoching, by adding a wet elastincula or the like to form a diagonal or trapezoidal protrusion 6 on the Si film 3, and then forming an electrode 5, Sj, a film 6,
Reliable connection with the electrode 5 can be made in mass production.
尚、S1膜3は、コンタクト穴の全面に存在する必要は
な(、少な(とも一部に予じめ存在させて置き、張り出
し部6をコンタクト穴の周辺全体ではなく、一部に形成
する事になっても良い事は言うまでもない。It should be noted that the S1 film 3 does not need to be present on the entire surface of the contact hole. Needless to say, it's okay if something happens.
本発明により、量産的な薄膜半導体装置のコンタクト構
造を提供する事ができる効果がある。The present invention has the advantage of being able to provide a contact structure for mass-produced thin film semiconductor devices.
第1図は本発明の一実施例を示す薄膜半導体装置のフン
タクト構造の断面図である。第2図は従来技術による薄
膜半導体装置のコンタクト構造の断面図である。
1基板
i02膜
1膜
VD 5in2
極
出し部
1 ・・・・・・・・・ S
2 ・・・・・・・・・ S
5 ・・・・・・ ・・・ S
4 ・・・・・・・・・ C
5・・・・・・・・・電
・・・・・・・・・張り
出願人 セイコーエプソン株式会社FIG. 1 is a cross-sectional view of a tactile structure of a thin film semiconductor device showing one embodiment of the present invention. FIG. 2 is a sectional view of a contact structure of a thin film semiconductor device according to the prior art. 1 substrate i02 film 1 film VD 5in2 Pole extension part 1 ...... S 2 ...... S 5 ...... S 4 ......・・・・・・ C 5・・・・・・・・・Electricity・・・・・・・・・Applicant Seiko Epson Corporation
Claims (1)
ンタクト穴を通して、前記半導体薄膜基板をエッチング
すると共に、該半導体薄膜基板を前記コンタクト穴側面
より張り出して残存せしめ、該張り出し部と自己整合的
に電極を形成する事を特徴とする薄膜半導体装置。Etching the semiconductor thin film substrate through a contact hole formed in an insulating film formed on the semiconductor thin film substrate, and leaving the semiconductor thin film substrate projecting from the side surface of the contact hole so as to be self-aligned with the projecting portion. A thin film semiconductor device characterized by forming electrodes.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27126390A JPH04146673A (en) | 1990-10-09 | 1990-10-09 | Thin film semiconductor device |
KR1019910017508A KR920008834A (en) | 1990-10-09 | 1991-10-07 | Thin film semiconductor devices |
EP19910117135 EP0480373A3 (en) | 1990-10-09 | 1991-10-08 | Thin-film semiconductor device |
US07/773,162 US5294821A (en) | 1990-10-09 | 1991-10-08 | Thin-film SOI semiconductor device having heavily doped diffusion regions beneath the channels of transistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27126390A JPH04146673A (en) | 1990-10-09 | 1990-10-09 | Thin film semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04146673A true JPH04146673A (en) | 1992-05-20 |
Family
ID=17497645
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27126390A Pending JPH04146673A (en) | 1990-10-09 | 1990-10-09 | Thin film semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04146673A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05347412A (en) * | 1992-06-15 | 1993-12-27 | Nec Corp | Semiconductor integrated circuit |
US7425746B2 (en) | 2003-06-30 | 2008-09-16 | Kabushiki Kaisha Toshiba | Semiconductor storage device and semiconductor integrated circuit |
-
1990
- 1990-10-09 JP JP27126390A patent/JPH04146673A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05347412A (en) * | 1992-06-15 | 1993-12-27 | Nec Corp | Semiconductor integrated circuit |
US7425746B2 (en) | 2003-06-30 | 2008-09-16 | Kabushiki Kaisha Toshiba | Semiconductor storage device and semiconductor integrated circuit |
US7638840B2 (en) | 2003-06-30 | 2009-12-29 | Kabushiki Kaisha Toshiba | Semiconductor storage device and semiconductor integrated circuit |
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