JPH04146659A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH04146659A JPH04146659A JP27093190A JP27093190A JPH04146659A JP H04146659 A JPH04146659 A JP H04146659A JP 27093190 A JP27093190 A JP 27093190A JP 27093190 A JP27093190 A JP 27093190A JP H04146659 A JPH04146659 A JP H04146659A
- Authority
- JP
- Japan
- Prior art keywords
- lead parts
- insulator
- outer lead
- semiconductor element
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000012212 insulator Substances 0.000 claims abstract description 17
- 239000004020 conductor Substances 0.000 claims abstract description 15
- 238000005452 bending Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims abstract description 5
- 238000000059 patterning Methods 0.000 claims abstract description 4
- 239000000758 substrate Substances 0.000 claims description 10
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 238000007789 sealing Methods 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 5
- 241000272168 Laridae Species 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はリードフレームとしてフレキシブル基板を使用
した半導体装置と、その製造方法に関するものであム
従来の技術
現在 半導体装置の小型（Ｉｌ、 薄型化 軽量化多
ビン化が望まれていも そのたぬ 積層フィルム基材を
リードフレームとした半導体装置が多く開発されていも
第２図はその一例の断面図であム 図において、ｌは絶
縁轍２，３はそれぞれ希望する形状にパターニングされ
た導体部のダイパッド部と外部導出リード狐 ４は半導
体素子、 ５はボンディングワイヤ、 ６は樹脂封止し
たパッケージ、 ７はパッケージ６内に樹脂封止された
外部導出リード部３のインナーリード狐 ８はパッケー
ジ６外にある外部導出リード部３のアウターリード部で
あもこの半導体装置の製造方法について述べも絶縁物１
と導体部の積層されたフレキシブル基板の導体部を所定
の形状にパターニングし、ダイパッド部２と外部導出リ
ード部３とを形成すム次に ダイパッド部２上に半導体
素子４を接着し、この半導体素子４の外部接続端子と外
部導出リード部３のインナーリード部７とをボンディン
グワイヤ５で接続してから、樹脂封止して、パッケージ
６を形成すも 最後に アウターリード部８を含むフレ
キシブル基板の先端部を鈍角り字状に折り曲げへ
発明が解決しようとする課題
ところが 上述した従来の構成では アウターリード部
８の先端部をプリント配線基板などに接続する場合、絶
縁物ｌの熱伝導性が悪く、半田リフローが困難であム
また アウターリード部８の先端部の曲げ方向が絶縁物
１が上になるように限定されていも
本発明はこのような問題を解決するもので、半田リフロ
ーを容易にし、かつアウターリード部の先端部の曲げる
方向が上下逆方向にできる半導体装置と、それを製造す
るのに適した方法を提供することを目的とすム
課題を解決するための手段
本発明の半導体装置は 導体部の外部導出リード部にお
けるアウターリード部の先端部が絶縁物と積層せず、か
つ鈍角り字状に曲げられたものであム
また 本発明の半導体装置の製造方法↓裏 外部導出リ
ード部のインナーリード狐 半導体素子およびボンディ
ングワイヤを樹脂で封止してから、外部導出リード部の
先端部を鈍角り字状に折曲し、さらに アウターリード
部の先端部の絶縁物を除去するものであム
作用
この構成により、外部導出リード部のアウターリード部
の先端部が絶縁物と積層されず、熱伝導性がよくなム
まＬ 半導体装置を上下どちらでも半田リフローが可能
となム
実施例
以下、本発明の一実施例について、図面を参照して説明
すも
図において、 １はたとえばポリイミドテープからなる
絶縁物２．３はそれぞれ希望する形状にパターニングさ
れた たとえば銅箔からなる導体部のダイパッド部と外
部導出リード１ｉｌｌ＋、４は半導体素子、 ５はたと
えば金線であるボンディングワイヤ、６は樹脂封止した
パッケージ、７はパッケージ６内に樹脂封止された外部
導出リード部３のインナーリード狐 ８はパッケージ６
外にある外部導出リード部３のアウターリード部であム
この半導体装置は ダイパッド部２および外部導出リー
ド部３をパターニングした導体部と、この導体部に接着
した絶縁物１とからなるフレキシブル基板と、ダイパッ
ド部２に接着した半導体素子４と、この半導体素子４の
外部接続端子および外部導出リード部３のインナーリー
ド部７を接続したボンディングワイヤ５と、ダイパッド
部２、半導体素子４．インナーリード部７およびボンデ
ィングワイヤ５を樹脂封止したパッケージ６とを備え
外部導出リード部３のアウターリード部８の先端部が絶
縁物１と積層せず、導体部のみが露呂し、かつ鈍角り字
状 すなわちガルウィング形状に曲げ加工された構造を
してぃム
なム パッケージ６の外側のフレキシブル基板またはア
ウターリード部８の先端部の祈り曲げられる方向は第１
図に示す方向とは反対であってもよ し〜
この半導体装置の製造方法について述べへま旭 絶縁物
１と導体部の積層されたフレキシブル基板の導体部をパ
ターニングして、ダイパッド部２と外部導出リード部３
とを形成すも そして、ダイパッド部２に半導体素子４
をたとえば銀ベーストなどの導電性接着剤で接着し、さ
らに半導体素子４の外部接続端子と外部導出リード部３
のインナーリード部７とをボンディングワイヤ５で接続
すム それから、ダイパッド部２、半導体素子４、イン
ナーリード部７およびボンディングワイヤ５を樹脂封止
して、パッケージ６を形成すも 次に アウターリード
部８を含むフレキシブル基板の先端部を鈍角り字状に
すなわちガルウィング形状に曲げ加工すム 最後に 窓
明はエツチング等でアウターリード部８を含むフレキシ
ブル基板の先端部の絶縁物１を除去し、アウターリード
部８を露出させも
発明の効果
以上のように 本発明によれば アウターリード部を含
むフレキシブル基板の先端部の絶縁物を除去し、アウタ
ーリード部を露出させることにより、アウターリード部
の熱伝導性がよくなり、半田リフローが容易に行えも
また 半導体装置の上下いずれからも半田リフローが可
能となり、アウターリード部を髪加工する方向も上下い
ずれも可能となム[Detailed Description of the Invention] Industrial Application Field The present invention relates to a semiconductor device using a flexible substrate as a lead frame and a method for manufacturing the same. Although it is desired to increase the number of bins, this is not the case.Although many semiconductor devices have been developed that use a laminated film base material as a lead frame, Figure 2 is a cross-sectional view of one example. 4 is a semiconductor element, 5 is a bonding wire, 6 is a resin-sealed package, and 7 is an external lead-out that is resin-sealed in the package 6. The inner lead part 8 of the lead part 3 is the outer lead part of the external lead part 3 outside the package 6.The method for manufacturing this semiconductor device is also described below.Insulator 1
The conductor part of the flexible substrate on which the conductor part and the conductor part are laminated is patterned into a predetermined shape to form the die pad part 2 and the external lead part 3. Next, the semiconductor element 4 is bonded on the die pad part 2, and the semiconductor element 4 is bonded onto the die pad part 2. After connecting the external connection terminal of the element 4 and the inner lead part 7 of the external lead part 3 with the bonding wire 5, resin sealing is performed to form the package 6.Finally, a flexible substrate including the outer lead part 8 However, in the conventional configuration described above, when the tip of the outer lead part 8 is connected to a printed wiring board, etc., the thermal conductivity of the insulator l is Unfortunately, solder reflow is difficult.
Furthermore, even if the bending direction of the tip of the outer lead portion 8 is limited so that the insulator 1 is on top, the present invention solves this problem, facilitates solder reflow, and bends the tip of the outer lead portion. It is an object of the present invention to provide a semiconductor device in which the bending direction of the conductive portion is upside down, and a method suitable for manufacturing the same. The tip of the outer lead part of the lead part is not laminated with an insulator and is bent in an obtuse angular shape. After the element and bonding wire are sealed with resin, the tips of the external leads are bent into an obtuse angular shape, and the insulation at the tips of the outer leads is removed. As a result, the tip of the outer lead part of the external lead part is not laminated with the insulating material, and it is made of a material with good thermal conductivity.
Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, 1 indicates an insulator 2.3 made of polyimide tape, for example. are patterned into a desired shape, for example, a die pad part of a conductor part made of copper foil and an external lead-out lead 1ill+, 4 is a semiconductor element, 5 is a bonding wire, for example, a gold wire, 6 is a resin-sealed package, and 7 is a Inner lead 8 of the external lead portion 3 sealed with resin inside the package 6 is the package 6
This semiconductor device is an outer lead part of the external lead part 3 located outside.This semiconductor device has a flexible substrate consisting of a conductor part formed by patterning the die pad part 2 and the external lead part 3, and an insulator 1 bonded to this conductor part. , a semiconductor element 4 bonded to the die pad part 2, a bonding wire 5 connecting the external connection terminal of the semiconductor element 4 and the inner lead part 7 of the external lead part 3, the die pad part 2, the semiconductor element 4. It is equipped with a package 6 in which an inner lead part 7 and a bonding wire 5 are sealed with resin.
The tip of the outer lead part 8 of the external lead part 3 is not laminated with the insulator 1, only the conductor part is exposed, and the structure is bent into an obtuse angular shape, that is, a gull wing shape. The direction in which the flexible substrate on the outside of the package 6 or the tip of the outer lead portion 8 is bent is the first direction.
The direction may be opposite to that shown in the figure. Describe the manufacturing method of this semiconductor device. Patterning the conductor part of the flexible substrate in which the insulator 1 and the conductor part are laminated, and forming the die pad part 2 and the outside. Derivation lead part 3
Then, a semiconductor element 4 is formed on the die pad portion 2.
for example, with a conductive adhesive such as silver base, and further connect the external connection terminals of the semiconductor element 4 and the external lead portion 3.
Then, the die pad part 2, semiconductor element 4, inner lead part 7, and bonding wire 5 are sealed with resin to form a package 6.Next, the outer lead part The tip of the flexible board including 8 is shaped into an obtuse cursive shape.
In other words, it is bent into a gull wing shape.Finally, even if the insulator 1 at the tip of the flexible substrate including the outer lead portion 8 is removed by etching or the like and the outer lead portion 8 is exposed, the effect of the invention is more than met. According to the present invention, by removing the insulator at the tip of the flexible substrate including the outer lead portion and exposing the outer lead portion, the thermal conductivity of the outer lead portion is improved and solder reflow can be easily performed.
In addition, solder reflow can be performed from either the top or bottom of the semiconductor device, and the outer lead can be processed in either the top or bottom direction.
第１図は本発明の一実施例における半導体装置の断面医
第２図は従来の半導体装置の一例の断面図であムFIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of an example of a conventional semiconductor device.
Claims (2)
ングした導体部と、前記導体部に接着した絶縁物とから
なるフレキシブル基板、前記ダイパッド部に接着した半
導体素子、前記半導体素子の外部接続端子と前記外部導
出リード部のインナーリード部とを接続したボンディン
グワイヤ、ならびに、前記ダイパッド部、前記半導体素
子、前記インナーリード部および前記ボンディングワイ
ヤを樹脂封止したパッケージを備え、前記外部導出リー
ド部のアウターリード部の先端部が前記絶縁物と積層せ
ず、かつ鈍角Ｌ字状に折曲されたことを特徴とする半導
体装置。(1) A flexible substrate consisting of a conductor section patterned with a die pad section and an external lead section, and an insulator bonded to the conductor section, a semiconductor element bonded to the die pad section, an external connection terminal of the semiconductor device, and the external connection terminal of the semiconductor device. An outer lead portion of the external lead portion includes a bonding wire connected to the inner lead portion of the lead-out lead portion, and a package in which the die pad portion, the semiconductor element, the inner lead portion, and the bonding wire are sealed with resin. A semiconductor device characterized in that a tip portion thereof is not laminated with the insulator and is bent into an obtuse L-shape.
前記導体部をパターニングし、ダイパッド部と外部導出
リード部を形成する工程、前記ダイパッド部に半導体素
子を接着する工程、前記半導体素子の外部接続端子と前
記外部導出リード部のインナーリード部とをボンディン
グワイヤで接続する工程、前記インナーリード部、前記
半導体素子および前記ボンディングワイヤを樹脂で封止
する工程、前記外部導出リード部の先端部を鈍角Ｌ字状
に曲げ加工する工程、ならびに、前記アウターリード部
の先端部の前記絶縁物を除去する工程を備えた半導体装
置の製造方法。(2) A step of patterning the conductor portion of the flexible substrate on which the conductor portion and an insulator are bonded to form a die pad portion and an external lead portion, a step of bonding a semiconductor element to the die pad portion, and a step of bonding the semiconductor element to the outside of the semiconductor element. a step of connecting a connection terminal and an inner lead portion of the external lead portion with a bonding wire; a step of sealing the inner lead portion, the semiconductor element, and the bonding wire with resin; and a step of sealing the tip portion of the external lead portion. A method for manufacturing a semiconductor device, comprising the steps of bending into an obtuse L-shape, and removing the insulator at the tip of the outer lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27093190A JPH04146659A (en) | 1990-10-08 | 1990-10-08 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27093190A JPH04146659A (en) | 1990-10-08 | 1990-10-08 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04146659A true JPH04146659A (en) | 1992-05-20 |
Family
ID=17492995
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27093190A Pending JPH04146659A (en) | 1990-10-08 | 1990-10-08 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04146659A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5606204A (en) * | 1994-06-23 | 1997-02-25 | Nec Corporation | Resin-sealed semiconductor device |
| JP2013069809A (en) * | 2011-09-21 | 2013-04-18 | Toyota Motor Corp | Semiconductor device |
-
1990
- 1990-10-08 JP JP27093190A patent/JPH04146659A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5606204A (en) * | 1994-06-23 | 1997-02-25 | Nec Corporation | Resin-sealed semiconductor device |
| GB2290660B (en) * | 1994-06-23 | 1998-10-07 | Nec Corp | Resin-sealed semiconductor device |
| JP2013069809A (en) * | 2011-09-21 | 2013-04-18 | Toyota Motor Corp | Semiconductor device |
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