JPH11297917A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the manufacturing cost of a semiconductor device to the same level as that of the conventional SOP/QFP type resin-sealed semiconductor package and, at the same time, to increase the packaging density of the device to the same density as that of lead-less semiconductor device. SOLUTION: A resin sealed semiconductor package 18 has no outer lead. In the package 18 in which a semiconductor chip 15 is sealed with a resin in a package, in other words, the bottom and side faces of inner leads 12 are exposed from a molded resin section 17 and connected to the wiring pattern of a printed wiring board 19 through solder layers 20. Namely, the bottom and side faces of the inner leads 12 exposed from the molded resin section 17 function as the external connecting terminals of the resin sealed semiconductor package 18.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device in which a semiconductor chip is sealed with a resin and a method of manufacturing the same.

[0002]

2. Description of the Related Art Currently, resin-encapsulated semiconductor packages include SOPs (Small Outline Packages) in which a plurality of gull-wing-shaped (gull-spread wings) leads protrude from both sides of a surface mounting package. A QFP (Quad Flat Package) in which a plurality of gull wing-shaped leads protrude from four sides of a surface mounting package is widely and generally used.

Hereinafter, a conventional SOP resin-sealed semiconductor package will be described with reference to FIGS. 10 and 11. FIG. Here, FIG. 10 is a schematic sectional view showing a semiconductor device in which a conventional SOP-based resin-sealed semiconductor package is mounted on a mounting board, and FIG. 11 is a conventional SOP-based resin-sealed semiconductor package shown in FIG. It is a perspective view of. On the die pad 31 of the lead frame, a semiconductor chip 35 on which a predetermined LSI (Large Scale Integrated Circuit) is formed is mounted and fixed using, for example, a predetermined adhesive. An electrode (not shown) of the semiconductor chip 35 and one end of the inner lead portion 32 of the lead 34 of the lead frame are
The connection is made using a u (gold) wire 36.

The die pad 31, the semiconductor chip 35, the inner lead portion 32 of the lead 34, and Au
The line 36 is covered and sealed by the mold resin part 37. A plurality of gull wing-shaped outer lead portions 33 of the leads 34 protrude from both side surfaces of the mold resin portion 37. Thereafter, the semiconductor device in which the semiconductor chip 35 is packaged in a resin-encapsulated manner and a plurality of gull-wing-shaped outer lead portions 33 protrude from both side surfaces of the mold resin portion 37 is sealed with an SOP resin encapsulation. It will be referred to as a semiconductor package 38.

The SOP resin-sealed semiconductor package 38 is mounted on a printed wiring board 39.
That is, the resin-encapsulated semiconductor package 38 is mounted on a printed wiring board 39, and a plurality of gull-wing-shaped outer lead portions 33 projecting from both side surfaces of the molded resin portion 37 are connected to, for example, a conductive adhesive. Through a solder layer 40 as a wiring pattern (not shown) of the printed wiring board 39.

Next, a method of manufacturing a semiconductor device in which the SOP resin-sealed semiconductor package 38 shown in FIG. 10 is mounted on a printed wiring board 39 will be described. First, the die pad 31, the inner lead portion 32, and the outer lead portion 3
A lead frame having a lead 34 made of a 3 is prepared. Next, a die bonding step is performed. That is, the semiconductor chip 35 on which a predetermined LSI is formed is attached to the die pad 3.
1 and fixed using a predetermined adhesive. Subsequently, a wire bonding step is performed. That is, an electrode (not shown) of the semiconductor chip 35 die-bonded on the die pad 31 and one end of the inner lead portion 32 of the lead 34 are connected using the Au wire 36.

Subsequently, a molding step is performed. That is, the lead frame on which the die bonding and the wire bonding have been performed is set in a predetermined mold, a predetermined resin is injected, and then the resin is applied with pressure, cured, and molded into a predetermined shape. Thus, the die pad 31, the semiconductor chip 3
5. A mold resin portion 37 is formed to cover and seal the inner lead portion 32 of the lead 34 and the Au wire 36 connecting the electrode of the semiconductor chip 35 and one end of the inner lead portion 32.

Next, a lead processing step is performed. That is, an unnecessary portion of the lead 34 exposed from the mold resin portion 37 is cut and removed, and the outer lead portion 33 is bent to be processed into a gull wing shape. In this manner, a plurality of gull wing-shaped outer lead portions 3 are formed from both sides.
An SOP-based resin-encapsulated semiconductor package 38 from which 3 protrudes is manufactured.

Next, a mounting step is performed. That is, the SOP resin-sealed semiconductor package 38 is connected to the printed wiring board 3.
9 and mounted on a printed wiring board using a solder layer 40 as a conductive adhesive, with a tip end of a gull-wing-shaped outer lead portion 33 protruding to both sides from a mold resin portion 37 of a resin-sealed semiconductor package 38. 39 are connected to a wiring pattern (not shown). In this way, a semiconductor device in which the conventional SOP resin-sealed semiconductor package 38 shown in FIG. 10 is mounted on the printed wiring board 39 is manufactured.

[0010]

The above-mentioned conventional SOP-based resin-encapsulated semiconductor package 38 is a printed circuit board 39.
In the semiconductor device mounted on the
7, a plurality of gull-wing-shaped outer lead portions 33 protrude from both sides, so that the mounting surface width of the resin-encapsulated semiconductor package 38 is, as shown in FIG. The length 2B of the gull wing-shaped outer lead portion projecting from the outer side is added to make (A + 2B). Therefore, the mounting area of the resin-encapsulated semiconductor package 38 on the printed wiring board 39 is considerably large, and it is difficult to achieve high-density mounting.

Here, the conventional SOP-based resin-sealed semiconductor package 38 has been described. In the case of the conventional QFP-based resin-sealed semiconductor package, a plurality of gull-wing outer packages are formed from four sides of the mold resin portion. Since the lead portions protrude, the mounting area of the resin-encapsulated semiconductor package on the printed wiring board becomes large, and the problem that it is difficult to achieve high-density mounting becomes even more serious.

On the other hand, to realize high-density mounting, CS
As one type of P (Chip Size Package), a leadless BGA (Ball Grid Array) is employed. However, in the case of this BGA, although it is possible to realize a high-density mounting by reducing the mounting area, it is necessary to use a substrate such as polyimide as a base material, and to use a solder ball or the like as an external connection terminal. Since a large number of metal balls need to be bonded, the package cost is high and the use is limited to special applications.

The present invention has been made in view of the above circumstances, and can be manufactured at a cost as low as that of a conventional SOP / QFP resin-sealed semiconductor package. It is another object of the present invention to provide a semiconductor device capable of high-density mounting and a method for manufacturing the same.

[0014]

The above objects can be attained by the following semiconductor device and a method of manufacturing the same according to the present invention. That is, the semiconductor device according to claim 1 includes a lead frame having a die pad and an inner lead, a semiconductor chip mounted on the die pad, a thin metal wire connecting an electrode of the semiconductor chip to one end of the inner lead, a die pad, A mold resin portion that covers and seals the inner lead, the semiconductor chip, and the thin metal wire, wherein a side surface and a lower surface of the other end of the inner lead are exposed from the mold resin portion. Thus, claim 1
In the semiconductor device according to the above, since the side surface and the lower surface of the other end of the inner lead are exposed from the mold resin portion, the exposed lower surface or the lower surface and the side surface function as external connection terminals of the resin-encapsulated semiconductor package. Therefore, an outer leadless resin-encapsulated semiconductor package can be realized, and the package size can be reduced by the absence of the outer lead portion.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the lower surface or the lower surface and the side surface exposed from the mold resin portion of the inner lead are mounted via a conductive adhesive. By adopting a configuration that is connected to the wiring pattern of the board, a resin-encapsulated semiconductor package whose package size has been reduced by the absence of the outer lead portion is mounted on the mounting board.
The mounting area of the resin-sealed semiconductor package is reduced, and high-density mounting is realized.

According to a third aspect of the present invention, in the semiconductor device according to the first aspect, the lower surface of the inner lead exposed from the mold resin portion projects downward from the bottom surface of the mold resin portion. By this, in the mounting process of the resin-encapsulated semiconductor package, when connecting the lower surface or the lower surface and the side surface of the inner lead to the wiring pattern of the mounting board, it is extremely easy to attach a conductive adhesive such as soldering. Therefore, the efficiency and reliability of the mounting operation are improved.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a die bonding step of mounting and fixing a semiconductor chip on a die pad of a lead frame having a die pad and a lead including an inner lead portion and an outer lead portion. And a wire bonding step of connecting the electrode of the semiconductor chip and one end of the inner lead portion of the lead using a thin metal wire, and sealing the die pad, the inner lead portion of the lead, the semiconductor chip, and the thin metal wire by covering with a resin. At the same time, a molding step of exposing the lower surface of the inner lead portion from the molded resin portion formed at that time, and cutting the lead exposed from the mold resin portion to separate the outer lead portion, the other end of the inner lead portion And a lead cutting step of exposing the side surface from the mold resin portion. And butterflies. Thus, according to the method of manufacturing a semiconductor device according to claim 4, the lower surface of the inner lead portion is exposed from the mold resin portion in the molding step, and the other side surface of the inner lead portion is separated from the mold resin portion in the lead cutting step. By exposing, the exposed lower surface or lower surface and side surface can be made to function as external connection terminals of the resin-encapsulated semiconductor package, so that the outer lead portion is reduced in package size by the absence of the outer lead portion. A resin-less semiconductor package is manufactured.

Further, when manufacturing the resin packaged semiconductor package of the outer leadless, die bonding,
Since each process of wire bonding and molding is almost the same as the case of manufacturing the conventional resin-encapsulated semiconductor package except that a specific mold is used in the molding process, the conventional resin-encapsulated semiconductor package is used. It does not require new equipment or additional processes compared to manufacturing.
There is no increase in cost. Also, in the lead cutting process, the outer lead portion of the lead is cut off, so there is no need to perform bending work to make the outer lead portion into a gull wing shape as in the conventional case, so the process is simplified. Is done. Therefore,
A resin-encapsulated semiconductor package whose package size is reduced by the absence of the outer lead portion is manufactured stably and at low cost as in the conventional case.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, the lower surface exposed from the mold resin portion of the inner lead after the lead cutting step. Alternatively, by adopting a configuration having a mounting step of connecting the lower surface and side surfaces to the wiring pattern of the mounting board using a conductive adhesive, the package size is reduced by the amount of the outer lead portions. Since the semiconductor package is mounted on the mounting substrate, the mounting area of the resin-encapsulated semiconductor package is reduced, and a high-density semiconductor device is manufactured.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect of the present invention, in the method of manufacturing a semiconductor device, the lower surface of the inner lead portion and the lower surface of the mold resin portion are simultaneously formed. With the configuration in which the step is formed so as to protrude, the lower surface of the inner lead portion has a shape protruding downward. Therefore, when mounting the resin-encapsulated semiconductor package on the mounting board, the lower surface of the inner lead portion is formed. In addition, as compared with the case where the side surface is simply exposed, for example, the conductive adhesive such as soldering is easily attached, and the efficiency and reliability of the mounting operation are improved.

[0021]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
An embodiment of the present invention will be described. (First Embodiment) FIG. 1 is a schematic sectional view showing a semiconductor device in which a resin-sealed semiconductor package according to a first embodiment of the present invention is mounted on a mounting board, and FIG. It is a perspective view of a sealing semiconductor package. A semiconductor chip 15 is mounted on the die pad 11 of the lead frame, and is fixed using, for example, a predetermined adhesive. An electrode (not shown) of the semiconductor chip 15 and one end of the inner lead 12 of the lead frame are connected to the Au wire 16.
Are connected using

The die pad 11, the semiconductor chip 15, the inner lead 12, and the Au wire 16 are covered and sealed by a mold resin portion 17. Hereinafter, the semiconductor device in which the semiconductor chip 15 is packaged with the resin is referred to as a resin-sealed semiconductor package 18.

Here, the die pad 11 and the inner lead 12 are located at substantially the same height, and the lower surface of the die pad 11 and the lower surface and the side surface of the inner lead 12 are both exposed from the mold resin portion 17 in this embodiment. There are features of the form. This resin-sealed semiconductor package 18 is mounted on a printed wiring board 19. That is, the resin-encapsulated semiconductor package 18 is mounted on a printed wiring board 19, and the lower surface and side surfaces of the inner leads 12 exposed from the molding resin portion 17 are printed via, for example, a solder layer 20 as a conductive adhesive. It is connected to a wiring pattern (not shown) of the wiring board 19. That is, the lower surface and side surfaces of the inner leads 12 exposed from the mold resin portion 17 function as external connection terminals of the resin-sealed semiconductor package 18.

Next, a method of manufacturing the semiconductor device shown in FIG. 1 will be described with reference to FIGS. Here, FIG. 3 is a process cross-sectional view for explaining each process of die bonding, wire bonding, and molding, FIG. 4 is a process cross-sectional view for explaining a lead cutting process, and FIG. 5 is a mounting process. FIG. 4 is a process cross-sectional view for explaining FIG.

First, a lead frame having a die pad 11 and leads 14 including an inner lead portion 12 and an outer lead portion 13 is prepared. At this time, the die pad 11 and the lead 14 of the lead frame have substantially the same height. Next, a die bonding step is performed. That is, the semiconductor chip 15 on which a predetermined LSI is formed is mounted on the die pad 11 and fixed using a predetermined adhesive. Subsequently, a wire bonding step is performed. That is,
An electrode (not shown) of the semiconductor chip 15 die-bonded on the die pad 11 and one end of the inner lead portion 12 of the lead 14 are connected using an Au wire 16.

Subsequently, a molding step is performed. That is, the lead frame on which the die bonding and the wire bonding have been performed is set in a predetermined mold, a predetermined resin is injected, and then the resin is applied with pressure, cured, and molded into a predetermined shape. Thus, the die pad 11, the semiconductor chip 1
5. A mold resin portion 17 is formed to cover and seal the inner lead portion 12 of the lead 14 and the Au wire 16 connecting the electrode of the semiconductor chip 15 to one end of the inner lead portion 12. The mold used at this time is such that the lower surface of the die pad 11 and the lower surface of the inner lead portion 12 of the lead 14 are both exposed from the mold resin portion 17.

Thus, the steps of die bonding, wire bonding, and molding of the semiconductor chip 15 are performed. The steps up to this point are the same as those in the case of manufacturing a conventional SOP-based resin-sealed semiconductor package, except that the specific mold according to the present embodiment is used in the molding step (see FIG. 3). ).

Next, a lead cutting step is performed. That is, the lead 14 exposed from the mold resin portion 17 is cut, and the outer lead portion 13 is cut off.
Only the inner lead portion 12 remains. Further, the cut surface of the lead 14 is in a state of being exposed from the mold resin portion 17 as a side surface of the other end of the inner lead portion 12. Hereinafter, the remaining inner lead portion 12 of the lead 14 is simply referred to as the inner lead 12.
Thus, a resin-sealed semiconductor package 18 in which the semiconductor chip 15 is resin-sealed and packaged is manufactured. At this time, the side surface and the lower surface of the other end of the inner lead 12 are exposed from the mold resin portion 17 (see FIG. 4).

Next, a mounting step is performed. That is, the resin-encapsulated semiconductor package 18 is mounted on the printed wiring board 19, and the lower surface and the side surfaces of the inner leads 12 exposed from the mold resin portion 17 of the resin-encapsulated semiconductor package 18 are soldered as a conductive adhesive. The layer 20 is connected to a wiring pattern (not shown) of the printed wiring board 19. Thus, a semiconductor device in which the resin-sealed semiconductor package 18 shown in FIG. 1 is mounted on the printed wiring board 19 is manufactured (see FIG. 5).

As described above, according to the present embodiment, the outer lead portion 13 of the lead 14 is cut off, and the lower surface and the side surface exposed from the mold resin portion 17 of the remaining inner lead 12 are resin-sealed semiconductor packages. 18 function as external connection terminals. That is, the resin-encapsulated semiconductor package 18 according to the present embodiment is an outer leadless resin-encapsulated semiconductor package, although it is an SOP system in a broad sense.

For this reason, as shown in FIG. 1, the mounting surface width when the resin package semiconductor package 18 of the outer leadless is mounted on the printed wiring board 19 is as follows.
It is the same as the width A of the mold resin portion 17. As shown in FIG. 10, the conventional resin-encapsulated semiconductor package 38
Is added to the width A of the mold resin portion 37 and the length 2B of the gull-wing-shaped outer lead portions protruding from both side surfaces of the mold resin portion 37 (A + 2B).
, The length of the outer lead portion is reduced by 2B. That is, the mounting area of the resin-encapsulated semiconductor package 18 on the printed wiring board 19 is significantly reduced as compared with the conventional case, and high-density mounting can be realized.

Further, when manufacturing the resin-encapsulated semiconductor package 18 according to the present embodiment, each of the steps of die bonding, wire bonding, and molding of the semiconductor chip 15 is performed in a molding process using a specific mold according to the present embodiment. In the lead cutting step, the outer lead portion 13 is cut off, so that it is not necessary to perform the bending process of the outer lead portion 13 as in the conventional case. , Can be manufactured stably and at low cost.

(Second Embodiment) FIG. 6 is a schematic sectional view showing a semiconductor device according to a second embodiment of the present invention. Note that the same components as those of the semiconductor device of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted. In the first embodiment, as shown in FIG. 1, the die pad 11 and the inner lead 12 are located at substantially the same height, and the lower surface of the die pad 11 and the lower surface and the side surface of the inner lead 12 are both molded resin portions. 17 is exposed from the die pad 11a in the resin-sealed semiconductor package 18a according to the present embodiment.
Is higher than the position of the inner lead 12a, and the lower surface of the die pad 11a is covered by the mold resin portion 17a. In addition,
Other structures are the same as those in the first embodiment, and a description thereof will be omitted.

The method of manufacturing the semiconductor device according to the present embodiment is also substantially the same as that of the first embodiment described with reference to FIGS. However, in the present embodiment, it is necessary to prepare a lead frame in which the position of the die pad 11a is higher than the position of the inner lead 12a.
Using a mold in which the lower surface of the inner lead portion 12a of the lead is exposed from the mold resin portion 17 while the lower surface of the die pad 11 is covered by the mold resin portion 17 is different from the case of the first embodiment. Is different.

As described above, according to the present embodiment, the basic structure that the resin-sealed semiconductor package 18a is an SOP-based outer leadless resin-sealed semiconductor package in a broad sense is the same as that of the first embodiment. As in the first embodiment, the mounting area of the resin-encapsulated semiconductor package 18a is greatly reduced, and high-density mounting can be realized. And it can be manufactured at low cost. In addition to these effects, since the position of the die pad 11a is higher than the position of the inner lead 12a, the semiconductor chip 15 on the die pad 11a is also relatively high from the printed wiring board 19, and the die pad 11a Is covered with the mold resin portion 17a, and therefore has an advantage that it is more excellent in moisture resistance than in the case of the first embodiment.

(Third Embodiment) FIG. 7 is a schematic sectional view showing a semiconductor device according to a third embodiment of the present invention, and FIG. 8 is a partially enlarged view of a portion C in FIG. The same components as those of the semiconductor device of the second embodiment shown in FIG. 6 are denoted by the same reference numerals, and description thereof will be omitted. Similarly to the case of the second embodiment, in the resin-sealed semiconductor package 18b according to the present embodiment, the position of the die pad 11b is higher than the position of the inner lead 12b, so that the lower surface of the die pad 11b is molded. It is covered by the resin portion 17b.

However, in the second embodiment, as shown in FIG. 6, the lower surface of the inner lead 12b and the bottom surface of the mold resin portion 17 are located at substantially the same height. In the resin-sealed semiconductor package 18b according to the present embodiment, the position of the lower surface of the inner lead 12a is lower than the position of the lower surface of the mold resin portion 17 by D, so that the lower surface of the inner lead 12a is It is characterized in that it has a shape protruding downward by D from the bottom surface of the portion 17.

The other structure is the same as that of the second embodiment, and the description is omitted. Also, the method of manufacturing the semiconductor device according to the present embodiment is substantially the same as that of the above-described second embodiment, so that the illustration thereof is omitted. However, in the present embodiment, the die pad 11
The preparation of a lead frame in which the position b is higher than the position of the inner leads 12b is the same as in the case of the second embodiment, but in the molding step, the lower surface of the inner leads 12b of the leads is 17
b, the lower surface of the die pad 11b is covered with the mold resin portion 17b,
It is possible to use a mold in which a step in which the bottom surface of b is higher by D than the lower surface of the inner lead 12a is formed.
This is different from the case of the second embodiment.

As described above, according to the present embodiment, the basic structure that the resin-encapsulated semiconductor package 18b is an SOP-based outer leadless resin-encapsulated semiconductor package in a broad sense, and the semiconductor chip on the die pad 11b Fifteen
Is relatively high from the printed wiring board 19,
Also, the lower surface of the die pad 11b is
Since the point covered by the second embodiment is the same as that of the second embodiment, the mounting area of the resin-encapsulated semiconductor package 18b can be significantly reduced, and high-density mounting can be realized. It can be manufactured stably and at low cost, and can further improve moisture resistance.

In addition to these effects, since the lower surface of the inner lead 12b has a shape protruding downward from the bottom surface of the mold resin portion 17b, the step of mounting the resin-encapsulated semiconductor package 18b on the printed wiring board 19 is performed. In this case, when the lower surface and the side surface of the inner lead 12 are connected to the wiring pattern of the printed wiring board 19 using the solder layer 20 as a conductive adhesive, the soldering becomes extremely easy. There is an advantage that the efficiency and reliability of the mounting operation are higher than in the case.

(Fourth Embodiment) FIG. 9 is a schematic sectional view showing a semiconductor device according to a fourth embodiment of the present invention. The same components as those of the semiconductor device of the second embodiment shown in FIG. 6 are denoted by the same reference numerals, and description thereof will be omitted. Similarly to the case of the second embodiment, in the resin-sealed semiconductor package 18c according to the present embodiment, the lower surface of the die pad 11c is covered with the mold resin portion 17c. However, in the resin-sealed semiconductor package 18c according to the present embodiment, the thickness of the die pad 11c is smaller than the thickness of the die pad 11b of the second embodiment shown in FIG. It is characterized in that the position of the semiconductor chip 15 on the surface 11c is relatively low, and the height is relatively low from the printed wiring board 19 on the surface of the mold resin portion 17c.

The other structure is the same as that of the second embodiment, and the description is omitted. Also, the method of manufacturing the semiconductor device according to the present embodiment is substantially the same as that of the above-described second embodiment, so that the illustration thereof is omitted. However, in the present embodiment, the die pad 11
The difference from the second embodiment is that a lead frame having a small thickness of “c” is prepared, and a mold in which a thickness of the molding resin portion 17c is relatively thin in the molding process is used. ing. The die pad 11c
Instead of preparing a thin lead frame, the lead frame prepared in the first embodiment may be used, and the die pad 11 may be etched from the back surface to make it thinner.

As described above, according to the present embodiment, the resin-encapsulated semiconductor package 18 according to the present embodiment is
The basic structure of a P-type outer leadless resin-sealed semiconductor package and the point that the lower surface of the die pad 11c is covered with the mold resin portion 17c are common to the case of the second embodiment. In addition, the mounting area of the resin-sealed semiconductor package 18c can be significantly reduced, high-density mounting can be realized, and the semiconductor package can be manufactured stably and at low cost. The moisture resistance can be improved more than the case of.
In addition to these effects, since the height of the surface of the mold resin portion 17c from the printed wiring board 19 is relatively low, the height of the resin-encapsulated semiconductor package 18c mounted on the printed wiring board 19 is reduced. Is relatively low, which can contribute to miniaturization of the semiconductor device.

In the first to fourth embodiments, the SOP resin-sealed semiconductor package is
Although the outer leadless one has been described, the present invention is not limited to the SOP type.
It is also possible to make the outer leadless corresponding to a resin-sealed semiconductor package. In this case, the mounting area of the resin-sealed semiconductor package is significantly reduced,
The effect of realizing high-density mounting is further enhanced.

[0045]

As described above, according to the semiconductor device of the present invention, the following effects can be obtained. That is, according to the semiconductor device of the first aspect, since the side surface and the lower surface of the other end of the inner lead are exposed from the mold resin portion, the exposed lower surface or the lower surface and the side surface are sealed with the resin. Can be made to function as an external connection terminal, so that an outer leadless resin-sealed semiconductor package can be realized, and the package size can be reduced by the amount of no outer lead portion.

According to the semiconductor device of the present invention, the lower surface or the lower surface and the side surface exposed from the mold resin portion of the inner lead are connected to the wiring pattern of the mounting board via the conductive adhesive. As a result, the resin-encapsulated semiconductor package whose package size has been reduced by the absence of the outer lead portion is mounted on the mounting board, so that the mounting area of the resin-encapsulated semiconductor package is reduced and high-density mounting is achieved. Can be realized.

According to the semiconductor device of the third aspect, the lower surface of the inner lead exposed from the mold resin portion protrudes downward from the bottom surface of the mold resin portion. When connecting the side surface to the wiring pattern of the mounting board, for example, it becomes extremely easy to attach a conductive adhesive such as soldering,
The efficiency and reliability of the mounting operation can be improved.

According to the semiconductor device manufacturing method of the present invention, in the molding step and the lead cutting step, the lower surface and the side surface at the other end of the inner lead portion are exposed from the molding resin portion. Outer leadless resin-encapsulated semiconductor package in which the lower surface or the lower surface and the side surface can function as external connection terminals of the resin-encapsulated semiconductor package. Can be produced. At this time, the steps of die bonding, wire bonding, molding, and lead cutting are substantially the same as those in the case of manufacturing a conventional resin-encapsulated semiconductor package, and do not require an increase in new facilities or processes. Since the cost does not increase, a resin-encapsulated semiconductor package whose package size is reduced by the absence of the outer lead portion can be manufactured stably and at low cost as in the conventional case.

According to the method of manufacturing a semiconductor device according to the fifth aspect, after the lead cutting step, the lower surface or the lower surface and the side surface exposed from the mold resin portion of the inner lead and the wiring pattern of the mounting substrate are electrically connected. By using a conductive adhesive, the resin-encapsulated semiconductor package, whose package size has been reduced by the amount of no outer leads, is mounted on the mounting board, and the mounting area of the resin-encapsulated semiconductor package is reduced. Thus, a semiconductor device which is mounted at high density can be manufactured.

In a method of manufacturing a semiconductor device according to a sixth aspect of the present invention, in a molding step, a mold resin formed when a die pad, an inner lead portion of a lead, a semiconductor chip, and a thin metal wire are covered with a resin and sealed. By exposing the lower surface of the inner lead portion from the portion and forming a step so that the lower surface of the inner lead protrudes from the bottom surface of the mold resin portion, the lower surface of the inner lead portion has a shape protruding downward. When mounting the semiconductor package on the mounting board, it is easier to attach a conductive adhesive such as soldering, for example, compared to a case where the lower surface and side surfaces of the inner lead portion are simply exposed, and the efficiency of the mounting operation is improved. And reliability can be improved.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a semiconductor device in which a resin-sealed semiconductor package according to a first embodiment of the present invention is mounted on a mounting substrate.

FIG. 2 is a perspective view of the resin-sealed semiconductor package shown in FIG.

FIG. 3 is a process cross-sectional view for explaining each process of die bonding, wire bonding, and molding in the manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 4 is a process cross-sectional view for explaining a lead cutting process of the manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 5 is a process cross-sectional view for explaining a mounting process of the manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 6 is a schematic sectional view showing a semiconductor device in which a resin-sealed semiconductor package according to a second embodiment of the present invention is mounted on a mounting substrate.

FIG. 7 is a schematic sectional view showing a semiconductor device in which a resin-sealed semiconductor package according to a third embodiment of the present invention is mounted on a mounting substrate.

8 is a partially enlarged view of a portion A in FIG. 7;

FIG. 9 is a schematic sectional view showing a semiconductor device in which a resin-sealed semiconductor package according to a fourth embodiment of the present invention is mounted on a mounting substrate.

FIG. 10 is a schematic cross-sectional view showing a semiconductor device in which a conventional SOP resin-sealed semiconductor package is mounted on a mounting substrate.

11 is a perspective view of the conventional SOP resin-sealed semiconductor package shown in FIG.

[Explanation of symbols]

11, 11a, 11b, 11c ... die pad, 12, 1
2a, 12b, 12c ... inner lead (part), 13 ...
Outer lead portion, 14 lead, 15 semiconductor chip, 16 Au wire, 17, 17a, 17b, 17c mold resin portion, 18, 18a, 18b, 18c resin-sealed semiconductor package, 19 printed wiring board, 20 ...
Solder layer, 31: die pad, 32: inner lead part, 33: outer lead part, 34: lead, 35 ...
Semiconductor chip, 36 ... Au wire, 37 ... mold resin part,
38: SOP resin-sealed semiconductor package; 39: printed wiring board; 40: solder layer.

Claims (6)

[Claims] A lead frame having a die pad and an inner lead; a semiconductor chip mounted on the die pad; a thin metal wire connecting an electrode of the semiconductor chip to one end of the inner lead; a die pad and the inner lead; And a mold resin portion that covers and seals the semiconductor chip and the fine metal wire, wherein a side surface and a lower surface of the other end of the inner lead are exposed from the mold resin portion. Semiconductor device. 2. The semiconductor device according to claim 1, wherein a lower surface or a lower surface and side surfaces of the inner leads exposed from the mold resin portion are connected to a wiring pattern of a mounting board via a conductive adhesive. A semiconductor device. 3. The semiconductor device according to claim 1, wherein a lower surface of said inner lead exposed from said mold resin portion projects downward from a bottom surface of said mold resin portion. 4. A die bonding step of mounting and fixing a semiconductor chip on the die pad of a lead frame having a die pad and a lead composed of an inner lead part and an outer lead part; A wire bonding step of connecting one end of the inner lead portion with a thin metal wire, the die pad, the inner lead portion of the lead,
A molding step of covering and sealing the semiconductor chip and the fine metal wire with a resin, and exposing a lower surface of the inner lead portion from a molding resin portion formed at that time; and exposing from the molding resin portion. A lead cutting step of cutting the lead to separate the outer lead part and exposing a side surface of the other end of the inner lead part from the mold resin part. 5. The method of manufacturing a semiconductor device according to claim 4, wherein after the lead cutting step, the lower surface or the lower surface and the side surface of the inner lead exposed from the mold resin portion and the wiring pattern of the mounting board are formed. A method for manufacturing a semiconductor device, comprising a mounting step of connecting using a conductive adhesive. 6. The method of manufacturing a semiconductor device according to claim 4, wherein said molding step is a step of simultaneously forming a step so that a lower surface of said inner lead projects from a bottom surface of said molding resin portion. Manufacturing method of a semiconductor device.