JPH041375B2 - - Google Patents

Info

Publication number
JPH041375B2
JPH041375B2 JP57054857A JP5485782A JPH041375B2 JP H041375 B2 JPH041375 B2 JP H041375B2 JP 57054857 A JP57054857 A JP 57054857A JP 5485782 A JP5485782 A JP 5485782A JP H041375 B2 JPH041375 B2 JP H041375B2
Authority
JP
Japan
Prior art keywords
storage device
sent
storage
parallel
storage devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57054857A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58171796A (ja
Inventor
Hidetsune Kurokawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57054857A priority Critical patent/JPS58171796A/ja
Publication of JPS58171796A publication Critical patent/JPS58171796A/ja
Publication of JPH041375B2 publication Critical patent/JPH041375B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
JP57054857A 1982-04-02 1982-04-02 並列二重化記憶装置 Granted JPS58171796A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57054857A JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57054857A JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Publications (2)

Publication Number Publication Date
JPS58171796A JPS58171796A (ja) 1983-10-08
JPH041375B2 true JPH041375B2 (Direct) 1992-01-10

Family

ID=12982256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57054857A Granted JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Country Status (1)

Country Link
JP (1) JPS58171796A (Direct)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5577222A (en) * 1992-12-17 1996-11-19 International Business Machines Corporation System for asynchronously duplexing remote data by sending DASD data grouped as a unit periodically established by checkpoint based upon the latest time value

Also Published As

Publication number Publication date
JPS58171796A (ja) 1983-10-08

Similar Documents

Publication Publication Date Title
JPH0472255B2 (Direct)
JPH041375B2 (Direct)
JPH0122653B2 (Direct)
KR100324279B1 (ko) 교환기에서 이중화 프로세서 간 메모리 일치 시스템 및 방법
JP3165598B2 (ja) 先入先出メモリのバスインタフェース装置
JP2003309564A (ja) マイクロコンピュータシステムおよびそれに使用されるトランシーバ
JPH0238969B2 (Direct)
JP3081356B2 (ja) 電話交換機
CN101194235A (zh) 存储器控制装置及存储器控制方法
JP3201439B2 (ja) ダイレクト・メモリ・アクセス・制御回路
JPS63238655A (ja) 情報処理装置
JPH05225118A (ja) レジスタ回路
JPH09146662A (ja) サスペンド・レジューム方法およびコンピュータシステム
KR950006547Y1 (ko) 프로세서 이중화시 공통메모리 액세스회로
JPS61199104A (ja) メモリ多重化型プログラマブルコントローラ
JPH01236333A (ja) パッケージ二重化方式
JPH04130917A (ja) 電子ディスク装置
JPS61193245A (ja) 記憶制御方式
JPH01211057A (ja) データ幅縮退装置
JPH0315213B2 (Direct)
JPH02187880A (ja) ワンチップマイクロコンピュータ
JPS5854421B2 (ja) 情報処理装置
JPS6348688A (ja) メモリ装置
JPH0232444A (ja) データ処理装置
JPH0318207B2 (Direct)