JPH04118924A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make the impurity concentration distribution in the longitudinal direction in a plug uniform at high concentration even when the depth of a contact hole is deep and to obtain a low contact resistance by a method wherein the diffusion source of impurities is formed at the sidewall of the contact hole and the impurities are diffused to a buried polysilicon layer as a whole by a diffusion operation in the transverse direction from the diffusion source. CONSTITUTION:An element isolation region 22 and an element region 23 are formed on a semiconductor substrate 21; after that, a contact hole 25 is made in a grown interlayer insulating film 24; a contact face 26 in the region 23 is revealed. After that, a polysilicon layer 27 is grown on the whole face at the sidewall and at the bottom of the contact hole 25 as well as at the surface of the interlayer insulating film 24; ions are implanted obliquely; impurities whose conductivity type is the same as that of the element region 23 are implanted. Then, a polysilicon layer 29 is grown; the contact hole 25 is filled completely with the polysilicon layers 27, 29; a plug 30 is formed. Then, a heat treatment is executed; the impurities are diffused to the transverse direction of the plug 30 as a whole from the ion-implanted polysilicon layer 27 on the sidewall of the contact hole 25. Thereby, the plug 30 as a whole is changed to a conductor.

Description

[Detailed description of the invention]

[0001]

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a contact for connecting a wiring layer of a semiconductor device to a semiconductor substrate, a diffusion layer, or another wiring layer. [0002]

[Conventional technology]

One of the contacts mentioned above is a buried polysilicon contact. In this method, contact holes opened in an interlayer insulating film on a semiconductor substrate are filled with polysilicon. A conventional method of manufacturing this buried polysilicon contact is shown in FIG. 4 and will be described below. This method is described in Oki Electric Research & Development 1-42 Vol. 56 No, 2P
89-94. [0003] FIG. 4A shows a state in which an interlayer insulating film 4 is grown after forming an element isolation region 2 and an element region 3 on a semiconductor substrate 1. [0004] Next, as shown in FIG. 4(b), a contact hole 5 is opened in the interlayer insulating film 4 to expose the contact surface 6 of the element region 3, and then the contact hole diameter W is 0.7 to 1. Polysilicon 7 is grown on the entire surface to a thickness of about five times, and contact hole 5 is filled with polysilicon 7. [0005] Next, the polysilicon 7 on the surface of the interlayer insulating film 4 is removed by etching back, leaving the polysilicon 7 selectively only in the contact hole 5, as shown in FIG. 4(c). This remaining polysilicon 7 is called a plug. [0006] Next, impurities that give the same conductivity as the element region 3 are ion-implanted into the plug (designated 7a) as shown by arrow 8 in FIG. 4(C), and heat treatment is applied to improve the top surface. Impurities are diffused from the ion-implanted region 9 to the unimplanted region 10 on the lower side to make the entire plug 7a electrically conductive. [0007] Then, as shown in FIG. 4(d), the plug 7a is connected to the plug 7a.
As shown in the figure, a metal wiring layer 11 is formed, and a protective film (not shown) is formed thereon to complete the entire process.
08]

[Problem to be solved by the invention]

However, in the conventional manufacturing method as described above, in order to diffuse an impurity from above the plug 7a to make the plug 7a conductive, an impurity that diffuses slowly in polysilicon (for example, boron (B)) is used. Figure 4(b)
) When the contact hole depth H shown in ) becomes approximately 1 μm or more, the impurity concentration decreases near the contact surface 6 as shown in FIG. 5, and the conductivity of the plug 7a decreases, resulting in a problem that the contact resistance tends to increase. There was a point. [0009] The present invention has been made in view of the above points, and provides a method for manufacturing a semiconductor device in which the longitudinal impurity concentration distribution in the plug is made uniform at a high concentration even if the contact hole is deep, and low contact resistance can be obtained. The purpose is to provide [0010]

[Means to solve the problem]

In this invention, an impurity diffusion source is provided on the side wall of the contact hole, and the impurity is diffused throughout the buried polysilicon layer (plug) by lateral diffusion from this diffusion source. [0011] The impurity diffusion source on the side wall of the contact hole is formed by forming a contact hole in the insulating film on the base, forming a polysilicon layer on the side wall and bottom of the contact hole and on the surface of the insulating film, and then contacting by diagonal ion implantation. It is formed by ion-implanting impurities into the polysilicon layer on the side wall of the hole. [0012]

[Effect]

In this invention, the impurity is diffused throughout the plug by lateral diffusion from the impurity diffusion source on the side wall of the contact hole, so even if the contact hole is deep, the vertical impurity concentration distribution of the plug is high. The concentration is uniform and low contact resistance can be obtained. [0013]

【Example】

Embodiments of the present invention will be described below with reference to the drawings. Figure 1
This is the first embodiment of this invention, and this first embodiment will be explained first. [0014] First, as shown in FIG. 1(a), after forming an element isolation region 22 and an element region 23 on a semiconductor substrate 21, an interlayer insulating film 24 is formed.
is grown to a thickness of 0.7 μm or more. [0015] Next, a contact hole 25 is opened in the interlayer insulating film 24 as shown in FIG. Expose 6. After that, contact hole 2
A polysilicon layer 27 is grown to a thickness of about 1/10 to 1/4 of the diameter W of the contact hole on the sidewall and bottom surface of the contact hole 5 and the entire surface of the interlayer insulating film 24. Thereafter, impurities of the same conductivity type as the element region 23 are implanted into the polysilicon layer 27 by oblique ion implantation as shown by arrows 28 in FIG. 1(b). At this time, by using oblique ion implantation, the impurities are removed from the polysilicon layer 27 on the surface of the interlayer insulating film 24 and the oblique ions, as shown by hatching in the polysilicon layer 27 in FIG. 1(b). It is implanted into the polysilicon layer 27 on the side wall of the contact hole 25 facing the direction of implantation. The more detailed conditions for this oblique ion implantation are specifically shown below. The implantation angle is expressed by the formula 1 (where W is the contact hole diameter and H is the contact hole depth), where θ is the angle from the perpendicular to the surface of the substrate 21. The amount of impurity implanted is DW/s for the contact hole diameter W and implantation angle θ.
inθ (however, D is 5 E19~I E21 (c
m') ). The implantation energy is the polysilicon layer 2
When the film thickness of No. 7 is T1, the range RP and dispersion ΔRP of the introduced impurity ions at θ=0° are T1>RP+ΔRP
For the energy A that gives /2, the equation is 2.

[Math 1]

[Equation 2] A′≦A/sinθ [0016] Next, a polysilicon layer 29 is grown again on the entire surface of the substrate 21 as shown in FIG. 1(c), and the polysilicon layer 27
The total film thickness (T1 + T2, where T2 is the film thickness of the polysilicon layer 29) is 0.7 to 1.
By multiplying the contact hole 25 by 5 times, the inside of the contact hole 25 is completely filled with the polysilicon layers 27 and 29. [0017] Next, the polysilicon layers 27 and 29 are etched back to remove them from the surface of the interlayer insulating film 24 as shown in FIG. Only the polysilicon layers 27 and 29 are selectively left to form the plug 30. [0018] Next, heat treatment is applied to diffuse impurities laterally from the ion-implanted polysilicon layer 27 on the side wall of the contact hole 25 to the entire plug 30, as shown by arrow 31 in FIG. 1(d). By doing so, the entire plug 30 is made into a conductor. At this time, in the conventional method, impurity diffusion was performed from above, so the vertical impurity concentration distribution in the plug was
As shown by curve a in FIG. As shown by the straight line, the vertical impurity concentration distribution within the plug becomes high and uniform, and a decrease in concentration below the plug 30 is suppressed. [0019] Thereafter, a metal wiring layer 32 is formed as shown in FIG. 1(e) so as to be connected to the plug 30, and a protective film (not shown) is further formed thereon to complete the entire process. [0020] FIG. 3 shows a second embodiment of the invention. The conventionally problematic increase in contact resistance occurs in a buried polysilicon contact on a P diffusion layer where boron is doped into the plug. That is, boron has a slow diffusion rate, and the conventional diffusion from the top surface does not sufficiently diffuse downward when the aspect ratio becomes high. Furthermore, since a BPSG film is used as an interlayer insulating film in which a contact hole is formed, phosphorus diffuses into the plug from the film, and a portion lacking boron becomes an N-type semiconductor. Therefore, in the second embodiment shown in FIG. 3, lateral impurity (boron) diffusion from the side wall of the contact hole is used to form a buried polysilicon contact on the P diffusion layer, as in the first embodiment, and N For forming a buried polysilicon contact on the diffusion layer (doped with phosphorus, which has a high diffusion rate), impurity diffusion from above as in the conventional method is used. Furthermore, in the second embodiment, when performing oblique boron ion implantation into the polysilicon layer on the side wall of the contact hole, implantation is performed from a plurality of directions, for example, two directions different by 180 degrees, or four directions different by 90 degrees. The impurity is implanted completely into the entire polysilicon layer. As a result, boron can be doped more uniformly and at a higher concentration throughout the plug. The second embodiment will be described in detail below. [0021] First, as shown in FIG. 3A, an N well layer 42, an element isolation region 43, an N diffusion layer 44, and a P diffusion layer 45 are formed on a P type silicon substrate 41. [0022] Next, as shown in FIG. 3(b), a BPSG film 46 is formed as an interlayer insulating film on the entire surface of the substrate 41 by CVD.
(7) BPSG film 46 total 46
Each of the diffusion layer 44 and the P diffusion layer 45 has a diameter of 0.
．． A contact hole 47 of 7 μm is formed. [0023] After that, the side wall and bottom surface of the contact hole 47 and B
A polysilicon layer 48 having a thickness of 1100 nm is formed on the entire surface of the PSG film 46 as shown in FIG. 3(c). [0024] Next, as shown in FIG. 3(d), the polysilicon layer 48 on the N 2 diffusion layer 44 side is covered with a resist pattern 49. Using the resist pattern 49 as a mask, boron (11B) is added only to the polysilicon layer 48 on the P diffusion layer 45 side.
or 49BF2) oblique ion implantation (angle is 7°)
This is done from two directions that differ by 180 degrees or from four directions that differ by 90 degrees. As a result, boron is implanted into the entire polysilicon layer 48 on the P 2 diffusion layer 45 side, including the side wall portion of the contact hole 47. The ion implantation conditions at this time are acceleration energy of 50
~6KeV, dose 5x15~1x1016cm
-2. [0025] Next, after removing the resist pattern 49, a polysilicon layer 50 with a thickness of 1 μm is grown on the entire surface of the substrate 4 as shown in FIG. Contact hole 47 in silicon layer 48
[0026] After that, the polysilicon layer 50.48 is etched back to remove the polysilicon layer 50.48 from the surface of the BPSG film 46 as shown in FIG. Polysilicon layer 50.48 is selectively left only in hole 47 to form plug 51. [0027] Thereafter, the plug 51 on the P diffusion layer 45 side is covered with a resist pattern 52 as shown in FIG. 1.5 x 1016
cm''. [0028] Thereafter, after removing the resist pattern 52, 900'
Anneal for 15 minutes in cN2. As a result of this annealing, in the plug 51 on the N 2 diffusion layer 44, phosphorus is diffused downward from the phosphorus implanted portion on the upper surface, and the entire portion becomes a uniformly highly doped phosphorus portion. On the other hand, in the plug 51 on the P diffusion layer 45, boron diffuses laterally from the boron implanted part on the side wall of the contact hole 47 (in this example, diffusion from the boron implanted part at the bottom of the contact hole is also added). This results in a uniformly high-concentration boron-doped area. [0029] Finally, by forming an Al film by sputtering and patterning, the plug 51 is formed as shown in FIG. 3(h).
An Al wiring 53 connected to is formed. [0030]

【Effect of the invention】

As explained in detail above, according to the manufacturing method of the present invention, the impurity is introduced into the entire buried polysilicon layer (plug) by lateral diffusion from the side wall of the contact hole. Unlike conventional methods, there is no problem that the impurity concentration below the plug decreases depending on the impurity diffusion speed, and it is no longer affected by impurities in the interlayer insulating film, even if the contact hole is very deep (equation 3). , it becomes possible to keep the resistance value of a contact using a polysilicon plug low.

[Brief explanation of drawings]

FIG. 1 is a process sectional view showing a first embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a characteristic diagram showing improvement in the vertical impurity concentration distribution in the buried polysilicon layer (plug) in the first embodiment of the present invention in comparison with a conventional example.

FIG. 3 is a process cross-sectional view showing a second embodiment of the method for manufacturing a semiconductor device of the present invention.

FIG. 4 is a process cross-sectional view showing a conventional buried polysilicon contact manufacturing method.

FIG. 5 is a characteristic diagram showing the vertical impurity concentration distribution in a plug in a conventional example.

[Explanation of symbols]

21 Semiconductor substrate 23 Element area 24 Interlayer insulation film 25 Contact hole 27 Polysilicon layer 29 Polysilicon layer 30 Plug 41 P-type silicon substrate P Diffusion layer BPSG membrane contact hole polysilicon layer polysilicon layer plug

[Figure 11 First embodiment of the invention [Document core] drawing

Claims (1)

[Claims] 1. A step of forming an insulating film on a base, forming a contact hole in the insulating film, and then forming a polysilicon layer on the side wall and bottom of the contact hole and on the surface of the insulating film; A process of implanting impurity ions into the polysilicon layer on the side wall of the contact hole, and then growing a polysilicon layer over the entire surface again to fill the inside of the contact hole with the polysilicon layer. and then removing the polysilicon layer from the surface of the insulating film,
a step of leaving the impurity only in the contact hole; and a step of diffusing the impurity from the impurity-implanted polysilicon layer on the side wall of the contact hole to the entire polysilicon layer in the contact hole by performing heat treatment. Method of manufacturing the device.