JPH0399470U - - Google Patents
Info
- Publication number
- JPH0399470U JPH0399470U JP753890U JP753890U JPH0399470U JP H0399470 U JPH0399470 U JP H0399470U JP 753890 U JP753890 U JP 753890U JP 753890 U JP753890 U JP 753890U JP H0399470 U JPH0399470 U JP H0399470U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- wiring board
- multilayer wiring
- thick film
- paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Description
第１図は本考案の実施例を示す多層配線板の断
面図、第２図はその多層配線板の製造工程断面図
、第３図は従来の多層配線板の断面図、第４図は
従来の他の多層配線板の断面図である。
１……基板、２……グランド層、３，８……電
極、４−１……第１の中間絶縁層、４−２……第
２の中間絶縁層、５……信号層、６……ヴイアホ
ール、７……抵抗体、９……表層電極、１０……
ＩＣチツプ、１１……ワイヤ。
Fig. 1 is a sectional view of a multilayer wiring board showing an embodiment of the present invention, Fig. 2 is a sectional view of the manufacturing process of the multilayer wiring board, Fig. 3 is a sectional view of a conventional multilayer wiring board, and Fig. 4 is a conventional multilayer wiring board. FIG. 2 is a sectional view of another multilayer wiring board. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Ground layer, 3, 8... Electrode, 4-1... First intermediate insulating layer, 4-2... Second intermediate insulating layer, 5... Signal layer, 6... ... Via hole, 7 ... Resistor, 9 ... Surface electrode, 10 ...
IC chip, 11...wire.
Claims (1)
おいて、 (a) 前記実装部品の近傍に形成されるヴイア
ホールと、 (b) 該ヴイアホール内に充填される抵抗体を
設け、 (c) 前記抵抗体によつて終端抵抗を形成する
ことを特徴とする多層配線板の構造。 (2) 請求項１記載の多層配線板の構造において
、終端抵抗として厚膜抵抗ペーストを用いること
を特徴とする多層配線板の構造。 (3) 請求項２記載の多層配線板の構造において
、厚膜抵抗ペーストを用いた終端抵抗を厚膜導体
ペーストによる導体で接続することを特徴とする
多層配線板の構造。[Claims for Utility Model Registration] (1) In the structure of a multilayer wiring board on which mounted components are mounted, (a) a via hole formed in the vicinity of the mounted component; (b) a resistor filled in the via hole; (c) A terminating resistor is formed by the resistor. (2) The multilayer wiring board structure according to claim 1, characterized in that a thick film resistor paste is used as the terminating resistor. (3) The structure of a multilayer wiring board according to claim 2, wherein the terminating resistor using thick film resistor paste is connected by a conductor made of thick film conductor paste.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP753890U JPH0399470U (en) | 1990-01-31 | 1990-01-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP753890U JPH0399470U (en) | 1990-01-31 | 1990-01-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0399470U true JPH0399470U (en) | 1991-10-17 |
Family
ID=31511198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP753890U Pending JPH0399470U (en) | 1990-01-31 | 1990-01-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0399470U (en) |
-
1990
- 1990-01-31 JP JP753890U patent/JPH0399470U/ja active Pending
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