JPH0395639U - - Google Patents
Info
- Publication number
- JPH0395639U JPH0395639U JP345090U JP345090U JPH0395639U JP H0395639 U JPH0395639 U JP H0395639U JP 345090 U JP345090 U JP 345090U JP 345090 U JP345090 U JP 345090U JP H0395639 U JPH0395639 U JP H0395639U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- back surface
- package
- sectional
- showing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
第１図はこの考案の一実施例による半導体装置
の構成を示す断面図、第２図は第１図の半導体装
置がパツケージにダイボンドされた状態を示す断
面図、第３図は従来の半導体装置の構成を示す断
面図、第４図は第３図の半導体装置がパツケージ
にダイボンドされた状態を示す断面図である。 図において、１……シリコン基板、２……拡散
層、３……酸化膜層、４……ＡＩ配線、５……シ
リコン裏面、６……チツプ、８……パツケージ、
９……接着剤である。なお、図中、同一符号は同
一、又は相当部分を示す。
の構成を示す断面図、第２図は第１図の半導体装
置がパツケージにダイボンドされた状態を示す断
面図、第３図は従来の半導体装置の構成を示す断
面図、第４図は第３図の半導体装置がパツケージ
にダイボンドされた状態を示す断面図である。 図において、１……シリコン基板、２……拡散
層、３……酸化膜層、４……ＡＩ配線、５……シ
リコン裏面、６……チツプ、８……パツケージ、
９……接着剤である。なお、図中、同一符号は同
一、又は相当部分を示す。
Claims (1)
- 半導体装置の裏面に予め樹脂系の接着剤を施し
たことを特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP345090U JPH0395639U (ja) | 1990-01-17 | 1990-01-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP345090U JPH0395639U (ja) | 1990-01-17 | 1990-01-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0395639U true JPH0395639U (ja) | 1991-09-30 |
Family
ID=31507269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP345090U Pending JPH0395639U (ja) | 1990-01-17 | 1990-01-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0395639U (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11309219B2 (en) | 2019-09-17 | 2022-04-19 | Kioxia Corporation | Method for manufacturing semiconductor device |
-
1990
- 1990-01-17 JP JP345090U patent/JPH0395639U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11309219B2 (en) | 2019-09-17 | 2022-04-19 | Kioxia Corporation | Method for manufacturing semiconductor device |