JPH0376299U - - Google Patents

Info

Publication number
JPH0376299U
JPH0376299U JP13443289U JP13443289U JPH0376299U JP H0376299 U JPH0376299 U JP H0376299U JP 13443289 U JP13443289 U JP 13443289U JP 13443289 U JP13443289 U JP 13443289U JP H0376299 U JPH0376299 U JP H0376299U
Authority
JP
Japan
Prior art keywords
memory
lock
signal
arbiter
request source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13443289U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13443289U priority Critical patent/JPH0376299U/ja
Publication of JPH0376299U publication Critical patent/JPH0376299U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Dram (AREA)
JP13443289U 1989-11-21 1989-11-21 Pending JPH0376299U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13443289U JPH0376299U (enrdf_load_stackoverflow) 1989-11-21 1989-11-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13443289U JPH0376299U (enrdf_load_stackoverflow) 1989-11-21 1989-11-21

Publications (1)

Publication Number Publication Date
JPH0376299U true JPH0376299U (enrdf_load_stackoverflow) 1991-07-31

Family

ID=31681771

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13443289U Pending JPH0376299U (enrdf_load_stackoverflow) 1989-11-21 1989-11-21

Country Status (1)

Country Link
JP (1) JPH0376299U (enrdf_load_stackoverflow)

Similar Documents

Publication Publication Date Title
US4730268A (en) Distributed bus arbitration for a multiprocessor system
JPH04246758A (ja) 動的バス調停方法及び装置
JPH0376299U (enrdf_load_stackoverflow)
JPH04143993A (ja) Ｄｒａｍコントローラ
US6035372A (en) Dynamic RAM in a microprocessor system
JP4174835B2 (ja) マイクロコントローラ
JPS59229662A (ja) 共有メモリ制御回路
KR19990058860A (ko) 인터럽트를 이용한 1:엔 프로세서간의 시분할 디피램통신 방법
JPS60112162A (ja) デユアルポ−トメモリ制御方式
JPH06325570A (ja) ダイナミックメモリリフレッシュ回路
JPS63271561A (ja) Ｄｍａ制御回路
JPS63314664A (ja) メモリシステム
JPH06103766A (ja) Ｄｒａｍリフレッシュアービタ回路
JPS61243556A (ja) バス制御方式
JPH0620468A (ja) リフレッシュ要求発生回路とそれを有するメモリ制御回路とそれを有するメモリ装置
JPH01178646U (enrdf_load_stackoverflow)
JPH0433141A (ja) メモリ制御装置
JPH04281288A (ja) 二重化主記憶装置の同期制御方式
JPS6289156A (ja) ２ポ−トｒａｍ
JPH0476152B2 (enrdf_load_stackoverflow)
JPH04177446A (ja) バス調停装置
JPH0267446U (enrdf_load_stackoverflow)
JPH04344548A (ja) 共有メモリ制御回路
JPH04303251A (ja) 多ポートメモリ装置
JPH06176567A (ja) リフレッシュ制御回路