JPH0371338A - Pipeline control system - Google Patents

Abstract

PURPOSE:To quickly start the processing of the post-stage without being limited as to its processing contents by constituting the subject system so that the pre-stage instructs directly an initial state for allowing its control part to start the processing, to the post-stage. CONSTITUTION:The pre-stage instructs directly an initial state for starting the processing to a control part of a connection logical control system of the post-stage. The pre-stage of the connection logical control system constituted of, for instance, a data buffer DB1, a logic circuit L1, and a state register HWC1 sends a result of processing to a data buffer DB2 of a connection logical control system of the post-stage, and simultaneously, instructs directly an initial state of a state register HWC2 through a signal line ISSL. In such a way, the post-stage is not limited as to the processing contents, and also, the processing can be started quickly.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a pipeline control method.

(Prior Art) FIG. 2 is a block diagram of a conventional pipeline $13111 system.

Data buffer DB1. Logic circuit 11. The first stage, data buffer 70B2, consists of status register WC1. Logic circuit L2. The subsequent stages consisting of status register date WC2 are all connected I! ? This is a physical control system.

Here, the latter stage always performs a certain predetermined process on the data sent from the previous stage and has been processed up to this step, or performs a process determined by the contents of the sent data.

(Problems to be Solved by the Invention) In the conventional pipeline 1iIIIta11 method described above, when each process always performs a certain process, there are restrictions on the processing content, and each process When performing a process determined by the contents of the data, there is a drawback that it takes time to check the contents of the sent data and start the process determined as a result.

An object of the present invention is to create a pipeline 1lJi that can quickly start processing without being constrained by processing contents.
ll method.

[Means to solve the problem]

In the pipeline t11 control method of the present invention, the first stage directly instructs the i control unit of the connected li1 logic υ1111 method in the subsequent stage about the initial state for starting processing.

[Effect]

Therefore, the processing at the subsequent stage is not affected by υJ constraints on the processing contents, and the processing can be started promptly.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a pipeline control system according to an embodiment of the present invention.

Data buffer DB1. Logic circuit L1 status register W
The first stage of the wiring logic control method composed of C1 is the second stage,
At the same time that the processing result is sent to the data buffer DB2 of the wired logic control method, the initial state of the status register WC2 is directly instructed via the signal line 15SL, and the subsequent stage immediately starts its processing.

It goes without saying that the first stage may be a microprogram 1lJtll system, and that the same effect can be obtained by simply defining part of the code word in the initial state for the first stage in relation to the second stage.

〔Effect of the invention〕

As explained above, in the present invention, the former stage directly instructs the latter stage about the initial state for its control unit to start processing, so that the latter stage is not constrained by the processing content and can start the processing promptly. There is an effect that it can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a pipeline control system according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional pipeline control system. DBI, DB2...Data buffer 7, Ll, L2...
・Logic circuit, WC1, WC2...Status register, l5SL...
- Confidence line for determining initial state.

Claims (1)

[Claims] 1. A pipeline control method characterized in that a former stage directly instructs a subsequent stage, a control unit of a wired logic control method, about an initial state for starting processing.