JPH0365048B2 - - Google Patents
Info
- Publication number
- JPH0365048B2 JPH0365048B2 JP6026483A JP6026483A JPH0365048B2 JP H0365048 B2 JPH0365048 B2 JP H0365048B2 JP 6026483 A JP6026483 A JP 6026483A JP 6026483 A JP6026483 A JP 6026483A JP H0365048 B2 JPH0365048 B2 JP H0365048B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- equation
- output
- smoothing
- addition
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000009499 grossing Methods 0.000 claims description 16
- 230000004069 differentiation Effects 0.000 claims description 4
- 238000001914 filtration Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 5
- 108010076504 Protein Sorting Signals Proteins 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 125000002015 acyclic group Chemical group 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/64—Digital differential analysers, i.e. computing devices for differentiation, integration or solving differential or integral equations, using pulses representing increments; Other incremental computing devices for solving difference equations
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6026483A JPS59185422A (ja) | 1983-04-06 | 1983-04-06 | 信号処理装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6026483A JPS59185422A (ja) | 1983-04-06 | 1983-04-06 | 信号処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59185422A JPS59185422A (ja) | 1984-10-22 |
JPH0365048B2 true JPH0365048B2 (xx) | 1991-10-09 |
Family
ID=13137114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6026483A Granted JPS59185422A (ja) | 1983-04-06 | 1983-04-06 | 信号処理装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59185422A (xx) |
-
1983
- 1983-04-06 JP JP6026483A patent/JPS59185422A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59185422A (ja) | 1984-10-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0340972B2 (xx) | ||
JPH09200042A (ja) | 複合位相濾波器とこれを用いたタイミング誤差補償装置及びその方法 | |
JPH01144732A (ja) | 半帯域幅デジタルフィルタ | |
JPH0828649B2 (ja) | ディジタルフィルタ | |
US4794556A (en) | Method and apparatus for sampling in-phase and quadrature components | |
US5381356A (en) | Cascade digital filters for realizing a transfer function obtained by cascade-connecting moving average filters | |
US6486813B1 (en) | Oversampling circuit digital/analog converter | |
US6938063B2 (en) | Programmable filter architecture | |
JPH0365048B2 (xx) | ||
US6486814B2 (en) | Digital-to-analog converter using different multiplicators between first and second portions of a data holding period | |
JP2005020554A (ja) | デジタルフィルタ | |
US6448918B1 (en) | Digital/analog converter | |
JPH0590897A (ja) | オーバーサンプリングフイルタ回路 | |
EP1195691A1 (en) | Interpolation circuit | |
JPS6118212A (ja) | デイジタルフイルタ | |
JP3258938B2 (ja) | デシメーションフィルタ | |
KR100195220B1 (ko) | 저역통과 iir 필터의 설계방법 및 이에 적합한저역통과iir필터 | |
US20020049799A1 (en) | Parallel implementation for digital infinite impulse response filter | |
SU1056208A1 (ru) | Широтно-импульсный функциональный преобразователь | |
KR0133403B1 (ko) | 대칭계수를 갖는 일차원 유한충격응답(fir) 필터 | |
JPH0334246B2 (xx) | ||
JP2590291B2 (ja) | 切換型iirフィルタ | |
JPS63276910A (ja) | 定遅延フィルタ | |
KR0133402B1 (ko) | 대칭계수를 갖는 일차원 유한충격응답(fir) 필터 | |
Aikawa et al. | Kernel with block structure for sampling rate converter |