JPH0363225B2 - - Google Patents
Info
- Publication number
- JPH0363225B2 JPH0363225B2 JP56197843A JP19784381A JPH0363225B2 JP H0363225 B2 JPH0363225 B2 JP H0363225B2 JP 56197843 A JP56197843 A JP 56197843A JP 19784381 A JP19784381 A JP 19784381A JP H0363225 B2 JPH0363225 B2 JP H0363225B2
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- point metal
- layer
- film
- heat treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56197843A JPS5898968A (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56197843A JPS5898968A (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5898968A JPS5898968A (ja) | 1983-06-13 |
| JPH0363225B2 true JPH0363225B2 (cs) | 1991-09-30 |
Family
ID=16381257
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56197843A Granted JPS5898968A (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5898968A (cs) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4920071A (en) * | 1985-03-15 | 1990-04-24 | Fairchild Camera And Instrument Corporation | High temperature interconnect system for an integrated circuit |
| JP2507567B2 (ja) * | 1988-11-25 | 1996-06-12 | 三菱電機株式会社 | 絶縁体基板上の半導体層に形成されたmos型電界効果トランジスタ |
| JP3086556B2 (ja) * | 1993-02-09 | 2000-09-11 | 株式会社神戸製鋼所 | 半導体ダイヤモンド層上の耐熱性オーミック電極及びその形成方法 |
-
1981
- 1981-12-09 JP JP56197843A patent/JPS5898968A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5898968A (ja) | 1983-06-13 |
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