JPH0361337B2 - - Google Patents
Info
- Publication number
- JPH0361337B2 JPH0361337B2 JP57136430A JP13643082A JPH0361337B2 JP H0361337 B2 JPH0361337 B2 JP H0361337B2 JP 57136430 A JP57136430 A JP 57136430A JP 13643082 A JP13643082 A JP 13643082A JP H0361337 B2 JPH0361337 B2 JP H0361337B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- mask layer
- area
- base
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 36
- 238000005468 ion implantation Methods 0.000 claims description 32
- 238000005530 etching Methods 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 19
- 239000012535 impurity Substances 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 16
- 150000002500 ions Chemical class 0.000 claims description 15
- 238000009792 diffusion process Methods 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 12
- 230000005669 field effect Effects 0.000 claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 10
- 230000001133 acceleration Effects 0.000 claims description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 10
- 230000003647 oxidation Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 230000000873 masking effect Effects 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 230000003213 activating effect Effects 0.000 claims description 3
- 238000011282 treatment Methods 0.000 claims description 3
- 239000003795 chemical substances by application Substances 0.000 claims description 2
- 230000000694 effects Effects 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- 230000005684 electric field Effects 0.000 claims 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005755 formation reaction Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- -1 hot phosphoric acid Chemical compound 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/919—Compensation doping
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/98—Utilizing process equivalents or options
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP81106214.0 | 1981-08-08 | ||
EP81106214A EP0071665B1 (de) | 1981-08-08 | 1981-08-08 | Verfahren zum Herstellen einer monolithisch integrierten Festkörperschaltung mit mindestens einem bipolaren Planartransistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5837961A JPS5837961A (ja) | 1983-03-05 |
JPH0361337B2 true JPH0361337B2 (US06633600-20031014-M00021.png) | 1991-09-19 |
Family
ID=8187852
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57136430A Granted JPS5837961A (ja) | 1981-08-08 | 1982-08-06 | 少なくとも1個のバイポ−ラプレ−ナトランジスタを備えたモノリシツク集積回路の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4477965A (US06633600-20031014-M00021.png) |
EP (1) | EP0071665B1 (US06633600-20031014-M00021.png) |
JP (1) | JPS5837961A (US06633600-20031014-M00021.png) |
DE (1) | DE3174397D1 (US06633600-20031014-M00021.png) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4624046A (en) * | 1982-01-04 | 1986-11-25 | Fairchild Camera & Instrument Corp. | Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM |
US4567644A (en) * | 1982-12-20 | 1986-02-04 | Signetics Corporation | Method of making triple diffused ISL structure |
EP0116654B1 (de) * | 1983-02-12 | 1986-12-10 | Deutsche ITT Industries GmbH | Verfahren zum Herstellen von bipolaren Planartransistoren |
EP0122313B1 (de) * | 1983-04-18 | 1987-01-07 | Deutsche ITT Industries GmbH | Verfahren zum Herstellen einer monolithisch integrierten Schaltung mit mindestens einem integrierten Isolierschicht-Feldeffekttransistor |
DE3317437A1 (de) * | 1983-05-13 | 1984-11-15 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planartransistor mit niedrigem rauschfaktor und verfahren zu dessen herstellung |
US4584763A (en) * | 1983-12-15 | 1986-04-29 | International Business Machines Corporation | One mask technique for substrate contacting in integrated circuits involving deep dielectric isolation |
JPS60258964A (ja) * | 1984-06-06 | 1985-12-20 | Hitachi Ltd | 半導体装置の製造方法 |
US4648909A (en) * | 1984-11-28 | 1987-03-10 | Fairchild Semiconductor Corporation | Fabrication process employing special masks for the manufacture of high speed bipolar analog integrated circuits |
EP0216945B1 (de) * | 1985-09-21 | 1989-07-05 | Deutsche ITT Industries GmbH | Verfahren zum Anbringen eines Kontaktes an einem Kontaktbereich eines Substrats aus Halbleitermaterial |
US4753834A (en) * | 1985-10-07 | 1988-06-28 | Kimberly-Clark Corporation | Nonwoven web with improved softness |
DE3680520D1 (de) * | 1986-03-22 | 1991-08-29 | Itt Ind Gmbh Deutsche | Verfahren zum herstellen einer monolithisch integrierten schaltung mit mindestens einem bipolaren planartransistor. |
US4721685A (en) * | 1986-04-18 | 1988-01-26 | Sperry Corporation | Single layer poly fabrication method and device with shallow emitter/base junctions and optimized channel stopper |
US4727046A (en) * | 1986-07-16 | 1988-02-23 | Fairchild Semiconductor Corporation | Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases |
DE3683054D1 (de) * | 1986-12-12 | 1992-01-30 | Itt Ind Gmbh Deutsche | Verfahren zum herstellen einer monolithisch integrierten schaltung mit mindestens einem bipolaren planartransistor. |
EP0271599B1 (de) * | 1986-12-18 | 1991-09-04 | Deutsche ITT Industries GmbH | Kollektorkontakt eines integrierten Bipolartransistors |
US4740478A (en) * | 1987-01-30 | 1988-04-26 | Motorola Inc. | Integrated circuit method using double implant doping |
US5005066A (en) * | 1987-06-02 | 1991-04-02 | Texas Instruments Incorporated | Self-aligned NPN bipolar transistor built in a double polysilicon CMOS technology |
US4784966A (en) * | 1987-06-02 | 1988-11-15 | Texas Instruments Incorporated | Self-aligned NPN bipolar transistor built in a double polysilicon CMOS technology |
KR890005885A (ko) * | 1987-09-26 | 1989-05-17 | 강진구 | 바이폴라 트랜지스터의 제조방법 |
EP0473194A3 (en) * | 1990-08-30 | 1992-08-05 | Nec Corporation | Method of fabricating a semiconductor device, especially a bipolar transistor |
DE19540309A1 (de) * | 1995-10-28 | 1997-04-30 | Philips Patentverwaltung | Halbleiterbauelement mit Passivierungsaufbau |
DE19611692C2 (de) * | 1996-03-25 | 2002-07-18 | Infineon Technologies Ag | Bipolartransistor mit Hochenergie-implantiertem Kollektor und Herstellverfahren |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5167069A (en) * | 1974-12-07 | 1976-06-10 | Fujitsu Ltd | Handotaisochino seizohoho |
JPS5278387A (en) * | 1975-12-24 | 1977-07-01 | Fujitsu Ltd | Production of semiconductor device |
JPS5381067A (en) * | 1976-12-27 | 1978-07-18 | Fujitsu Ltd | Production of semiconductor device |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE405526B (sv) * | 1973-07-16 | 1978-12-11 | Western Electric Co | Transistor och sett for dess tillverkning |
US4111720A (en) * | 1977-03-31 | 1978-09-05 | International Business Machines Corporation | Method for forming a non-epitaxial bipolar integrated circuit |
US4118250A (en) * | 1977-12-30 | 1978-10-03 | International Business Machines Corporation | Process for producing integrated circuit devices by ion implantation |
US4199380A (en) * | 1978-11-13 | 1980-04-22 | Motorola, Inc. | Integrated circuit method |
JPS5852339B2 (ja) * | 1979-03-20 | 1983-11-22 | 富士通株式会社 | 半導体装置の製造方法 |
US4376664A (en) * | 1979-05-31 | 1983-03-15 | Fujitsu Limited | Method of producing a semiconductor device |
US4242791A (en) * | 1979-09-21 | 1981-01-06 | International Business Machines Corporation | High performance bipolar transistors fabricated by post emitter base implantation process |
-
1981
- 1981-08-08 EP EP81106214A patent/EP0071665B1/de not_active Expired
- 1981-08-08 DE DE8181106214T patent/DE3174397D1/de not_active Expired
-
1982
- 1982-08-03 US US06/404,931 patent/US4477965A/en not_active Expired - Lifetime
- 1982-08-06 JP JP57136430A patent/JPS5837961A/ja active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5167069A (en) * | 1974-12-07 | 1976-06-10 | Fujitsu Ltd | Handotaisochino seizohoho |
JPS5278387A (en) * | 1975-12-24 | 1977-07-01 | Fujitsu Ltd | Production of semiconductor device |
JPS5381067A (en) * | 1976-12-27 | 1978-07-18 | Fujitsu Ltd | Production of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS5837961A (ja) | 1983-03-05 |
US4477965A (en) | 1984-10-23 |
EP0071665B1 (de) | 1986-04-16 |
DE3174397D1 (en) | 1986-05-22 |
EP0071665A1 (de) | 1983-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0361337B2 (US06633600-20031014-M00021.png) | ||
JPH0697665B2 (ja) | 集積回路構成体の製造方法 | |
JPH05347383A (ja) | 集積回路の製法 | |
KR950010287B1 (ko) | 베이스 재결합 전류가 낮은 바이폴라 트랜지스터를 갖는 바이폴라 상보형 금속 산화물 반도체 제조 방법 | |
US4343080A (en) | Method of producing a semiconductor device | |
JP3098848B2 (ja) | 自己整合型プレーナモノリシック集積回路縦型トランジスタプロセス | |
JPH04226064A (ja) | 半導体装置用の相互接続体及びその製造方法 | |
EP0421507B1 (en) | Method of manufacturing a bipolar transistor | |
JPH0241170B2 (US06633600-20031014-M00021.png) | ||
US5449627A (en) | Lateral bipolar transistor and FET compatible process for making it | |
JPH0541385A (ja) | 半導体装置とその製造方法 | |
RU2107972C1 (ru) | Способ изготовления биполярных планарных n-p-n-транзисторов | |
JP2852241B2 (ja) | 半導体装置及びその製造方法 | |
JPH04290273A (ja) | 窒化シリコンコンデンサの製造方法 | |
KR950012742B1 (ko) | 2극성 및 상보 전계효과 트랜지스터들(BiCMOS)을 동시에 제조하는 방법 | |
JP3965476B2 (ja) | 半導体装置の製造方法 | |
JP3093615B2 (ja) | 半導体装置の製造方法 | |
JP2745946B2 (ja) | 半導体集積回路の製造方法 | |
JPH0258781B2 (US06633600-20031014-M00021.png) | ||
JP2533951B2 (ja) | バイポ―ラ半導体装置の製造方法 | |
JP2770762B2 (ja) | 半導体装置の製造方法 | |
JP2573303B2 (ja) | 半導体装置の製造方法 | |
JPS6072228A (ja) | 半導体基板への不純物ド−ピング方法 | |
JP3132023B2 (ja) | 半導体装置の製造方法 | |
JPS61139057A (ja) | 半導体集積回路装置の製造方法 |