JPH0350339U - - Google Patents

Info

Publication number
JPH0350339U
JPH0350339U JP11066189U JP11066189U JPH0350339U JP H0350339 U JPH0350339 U JP H0350339U JP 11066189 U JP11066189 U JP 11066189U JP 11066189 U JP11066189 U JP 11066189U JP H0350339 U JPH0350339 U JP H0350339U
Authority
JP
Japan
Prior art keywords
heat dissipation
high frequency
circuit
board
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11066189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11066189U priority Critical patent/JPH0350339U/ja
Publication of JPH0350339U publication Critical patent/JPH0350339U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例による高周波混成集
積回路の斜視図、第2図は第1図のA−A′線の
断面図、第3図は従来の高周波混成集積回路の斜
視図、第4図は第3図のB−B′線の断面図であ
る。 1……放熱フイン、2……基板、3……放熱ブ
ロツク、4……半導体チツプ、5……ピン。なお
図中同一符号は同一又は相当部分を示す。
FIG. 1 is a perspective view of a high frequency hybrid integrated circuit according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line A-A' in FIG. 1, and FIG. 3 is a perspective view of a conventional high frequency hybrid integrated circuit. FIG. 4 is a sectional view taken along line B-B' in FIG. 3. 1... Heat dissipation fin, 2... Board, 3... Heat dissipation block, 4... Semiconductor chip, 5... Pin. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】 上面に回路パターンを、裏面に接地パターンを
有する基板を基にした高周波混成集積回路におい
て、 上記基板の回路パターン面上に設けられ、外部
の回路と接続するピンと、 上記基板の接地パターン面に接着され、基板を
被う表面積が大なる断面L字型形状である放熱フ
インと、 上記基板の回路パターン面上の一部に取り付け
られ、該放熱フインに接着される断面L字型形状
の放熱ブロツクと、 該放熱ブロツクの上面に設けられた半導体チツ
プとから構成されたことを特徴とする高周波混成
集積回路。
[Claims for Utility Model Registration] In a high frequency hybrid integrated circuit based on a substrate having a circuit pattern on the top surface and a ground pattern on the back surface, a pin provided on the circuit pattern surface of the substrate and connected to an external circuit; A heat dissipation fin that is bonded to the ground pattern surface of the board and has an L-shaped cross section and has a large surface area covering the board; A high frequency hybrid integrated circuit comprising a heat dissipation block having an L-shaped cross section and a semiconductor chip provided on the top surface of the heat dissipation block.
JP11066189U 1989-09-20 1989-09-20 Pending JPH0350339U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11066189U JPH0350339U (en) 1989-09-20 1989-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11066189U JPH0350339U (en) 1989-09-20 1989-09-20

Publications (1)

Publication Number Publication Date
JPH0350339U true JPH0350339U (en) 1991-05-16

Family

ID=31659185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11066189U Pending JPH0350339U (en) 1989-09-20 1989-09-20

Country Status (1)

Country Link
JP (1) JPH0350339U (en)

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