JPS61205145U - - Google Patents

Info

Publication number
JPS61205145U
JPS61205145U JP8981786U JP8981786U JPS61205145U JP S61205145 U JPS61205145 U JP S61205145U JP 8981786 U JP8981786 U JP 8981786U JP 8981786 U JP8981786 U JP 8981786U JP S61205145 U JPS61205145 U JP S61205145U
Authority
JP
Japan
Prior art keywords
heat sink
integrated circuit
mounting portions
registration request
positions corresponding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8981786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8981786U priority Critical patent/JPS61205145U/ja
Publication of JPS61205145U publication Critical patent/JPS61205145U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体集積回路パツケージの一
例を示した斜視図、第2図aおよび第2図bは、
本考案の一実施例を示す斜視図および断面図であ
る。 1……基板、2……放熱板、3……集積回路チ
ツプ、21……基板、22……放熱板、23……
半導体集積回路チツプ、24……導体、25……
絶縁層。
FIG. 1 is a perspective view showing an example of a conventional semiconductor integrated circuit package, and FIGS. 2a and 2b are
1 is a perspective view and a sectional view showing an embodiment of the present invention. FIG. 1... Board, 2... Heat sink, 3... Integrated circuit chip, 21... Board, 22... Heat sink, 23...
Semiconductor integrated circuit chip, 24... Conductor, 25...
insulation layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 表面が平らな放熱板と、この放熱板の表面の取
付け部分に密着された複数の集積回路チツプと、
前記取付け部分に対応する位置に穴が明けられ前
記放熱板の表面に形成された基板とを含むことを
特徴とする集積回路パツケージ。
a heat sink with a flat surface; a plurality of integrated circuit chips closely attached to the mounting portions on the surface of the heat sink;
An integrated circuit package comprising: a substrate formed on the surface of the heat sink and having holes formed at positions corresponding to the mounting portions.
JP8981786U 1986-06-12 1986-06-12 Pending JPS61205145U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8981786U JPS61205145U (en) 1986-06-12 1986-06-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8981786U JPS61205145U (en) 1986-06-12 1986-06-12

Publications (1)

Publication Number Publication Date
JPS61205145U true JPS61205145U (en) 1986-12-24

Family

ID=30644255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8981786U Pending JPS61205145U (en) 1986-06-12 1986-06-12

Country Status (1)

Country Link
JP (1) JPS61205145U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012064914A (en) * 2010-09-16 2012-03-29 Samsung Electro-Mechanics Co Ltd Heat dissipation substrate and manufacturing method of the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50143072A (en) * 1974-05-08 1975-11-18

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50143072A (en) * 1974-05-08 1975-11-18

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012064914A (en) * 2010-09-16 2012-03-29 Samsung Electro-Mechanics Co Ltd Heat dissipation substrate and manufacturing method of the same

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