JPH0344U - - Google Patents

Info

Publication number
JPH0344U
JPH0344U JP5821989U JP5821989U JPH0344U JP H0344 U JPH0344 U JP H0344U JP 5821989 U JP5821989 U JP 5821989U JP 5821989 U JP5821989 U JP 5821989U JP H0344 U JPH0344 U JP H0344U
Authority
JP
Japan
Prior art keywords
semiconductor device
heat sink
thick film
film substrate
ferrite
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5821989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5821989U priority Critical patent/JPH0344U/ja
Publication of JPH0344U publication Critical patent/JPH0344U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本考案の実施例に係り、
第1図は半導体装置の概略構成を示す外観斜視図
、第2図はその分解斜視図である。また、第3図
は、従来例に係る半導体装置の概略構成を示す外
観斜視図である。 図における符号、1は厚膜基板、2は放熱板、
3はリード端子、4はキヤツプである。なお、図
中の同一符号は、互いに同一もしくは相当する部
品、部分を示している。
1 and 2 relate to an embodiment of the present invention,
FIG. 1 is an external perspective view showing a schematic configuration of a semiconductor device, and FIG. 2 is an exploded perspective view thereof. Further, FIG. 3 is an external perspective view showing a schematic configuration of a conventional semiconductor device. In the figure, 1 is a thick film substrate, 2 is a heat sink,
3 is a lead terminal, and 4 is a cap. Note that the same reference numerals in the figures indicate the same or corresponding parts and portions.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波回路が形成された放熱板上に装着された
厚膜基板を、電磁波を吸収するフエライトからな
るキヤツプで外囲したことを特徴とする半導体装
置。
A semiconductor device characterized in that a thick film substrate mounted on a heat sink on which a high frequency circuit is formed is surrounded by a cap made of ferrite that absorbs electromagnetic waves.
JP5821989U 1989-05-18 1989-05-18 Pending JPH0344U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5821989U JPH0344U (en) 1989-05-18 1989-05-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5821989U JPH0344U (en) 1989-05-18 1989-05-18

Publications (1)

Publication Number Publication Date
JPH0344U true JPH0344U (en) 1991-01-07

Family

ID=31583628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5821989U Pending JPH0344U (en) 1989-05-18 1989-05-18

Country Status (1)

Country Link
JP (1) JPH0344U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009138448A (en) * 2007-12-07 2009-06-25 Azuma Seisakusho:Kk Self-luminous delineator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009138448A (en) * 2007-12-07 2009-06-25 Azuma Seisakusho:Kk Self-luminous delineator

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