JPH0342847A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0342847A
JPH0342847A JP1178587A JP17858789A JPH0342847A JP H0342847 A JPH0342847 A JP H0342847A JP 1178587 A JP1178587 A JP 1178587A JP 17858789 A JP17858789 A JP 17858789A JP H0342847 A JPH0342847 A JP H0342847A
Authority
JP
Japan
Prior art keywords
chip
die pad
die
pad
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1178587A
Other languages
Japanese (ja)
Inventor
Akira Kojima
Hiroshi Murakami
Takeyoshi Uchiyama
Hiroyuki Fukazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP1178587A priority Critical patent/JPH0342847A/en
Publication of JPH0342847A publication Critical patent/JPH0342847A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PURPOSE: To prevent a short circuit between a wire and a die pad by forming an insulating member around a chip on the chip loading surface of the die pad while connecting the chip and an inner lead by the metallic small-gage wire and sealing the whole surface with a resin.
CONSTITUTION: In a die pad 1, on the chip loading surface of a top face of which a chip 2 is placed, a die-pad hanging lead 3 is arranged to the opposed side sections 1a of the die pad 1 while a large number of inner leads 4 are mounted respectively in a mutually symmetric manner centering around the extension of the die-pad hanging lead 3, and a plurality of these inner leads are connected, thus constituting a lead frame. Bonding pads 2a and the inner leads 4 are connected by bonding wires 5, and sealed by a molding resin layer 6. A frame-shaped insulating film 7 is stuck to the chip loading surface of the die pad 1 so as to surround the chip 2 at that time. Accordingly, the hanging of the wires and short circuit among the wires and the die pad are prevented while constraint on the mounting of the die pad and the chip is removed, and the diversified chips can be mounted by using the same lead frame.
COPYRIGHT: (C)1991,JPO&Japio
JP1178587A 1989-07-11 1989-07-11 Semiconductor device Pending JPH0342847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1178587A JPH0342847A (en) 1989-07-11 1989-07-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1178587A JPH0342847A (en) 1989-07-11 1989-07-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0342847A true JPH0342847A (en) 1991-02-25

Family

ID=16051080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1178587A Pending JPH0342847A (en) 1989-07-11 1989-07-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0342847A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5409863A (en) * 1993-02-19 1995-04-25 Lsi Logic Corporation Method and apparatus for controlling adhesive spreading when attaching an integrated circuit die
KR100247908B1 (en) * 1992-12-30 2000-03-15 윤종용 Semiconductor apparatus

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114263A (en) * 1981-01-07 1982-07-16 Toshiba Corp Semiconductor device
JPS58182859A (en) * 1982-04-21 1983-10-25 Toshiba Corp Lead frame for semiconductor device
JPS59166611A (en) * 1983-03-12 1984-09-20 Nippon Steel Corp Reduction refining of molten steel containing chromium
JPS59181656A (en) * 1983-03-31 1984-10-16 Toshiba Corp Semiconductor device
JPS62183078A (en) * 1986-02-06 1987-08-11 Fujitsu Ltd Magnetic head supporting mechanism
JPS6427236A (en) * 1987-07-22 1989-01-30 Mitsubishi Electric Corp Wire bonding method
JPH01124227A (en) * 1987-11-09 1989-05-17 Mitsubishi Electric Corp Semiconductor device
JPH01128440A (en) * 1987-11-11 1989-05-22 Fukuoka Nippon Denki Kk Resin-sealed semiconductor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114263A (en) * 1981-01-07 1982-07-16 Toshiba Corp Semiconductor device
JPS58182859A (en) * 1982-04-21 1983-10-25 Toshiba Corp Lead frame for semiconductor device
JPS59166611A (en) * 1983-03-12 1984-09-20 Nippon Steel Corp Reduction refining of molten steel containing chromium
JPS59181656A (en) * 1983-03-31 1984-10-16 Toshiba Corp Semiconductor device
JPS62183078A (en) * 1986-02-06 1987-08-11 Fujitsu Ltd Magnetic head supporting mechanism
JPS6427236A (en) * 1987-07-22 1989-01-30 Mitsubishi Electric Corp Wire bonding method
JPH01124227A (en) * 1987-11-09 1989-05-17 Mitsubishi Electric Corp Semiconductor device
JPH01128440A (en) * 1987-11-11 1989-05-22 Fukuoka Nippon Denki Kk Resin-sealed semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100247908B1 (en) * 1992-12-30 2000-03-15 윤종용 Semiconductor apparatus
US5409863A (en) * 1993-02-19 1995-04-25 Lsi Logic Corporation Method and apparatus for controlling adhesive spreading when attaching an integrated circuit die

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